From a13c81952444d032ad3b5b7027b330150dbe2408 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 25 Apr 2008 15:03:18 +0200 Subject: ns9xxx: fix handle_prio_irq to unmask irqs with lower priority MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When an irq is reported all lower prio irqs are masked until the current irq is acked. So never leave handle_prio_irq without acking. desc->status & IRQ_INPROGRESS should never become true because the current irq is masked until it is acked, too. Signed-off-by: Uwe Kleine-König --- arch/arm/mach-ns9xxx/irq.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index 7ddc8fde774..ba7a9e4888f 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c @@ -64,15 +64,14 @@ void handle_prio_irq(unsigned int irq, struct irq_desc *desc) spin_lock(&desc->lock); - if (unlikely(desc->status & IRQ_INPROGRESS)) - goto out_unlock; + BUG_ON(desc->status & IRQ_INPROGRESS); desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); kstat_cpu(cpu).irqs[irq]++; action = desc->action; if (unlikely(!action || (desc->status & IRQ_DISABLED))) - goto out_unlock; + goto out_mask; desc->status |= IRQ_INPROGRESS; spin_unlock(&desc->lock); @@ -81,10 +80,14 @@ void handle_prio_irq(unsigned int irq, struct irq_desc *desc) spin_lock(&desc->lock); desc->status &= ~IRQ_INPROGRESS; - if (!(desc->status & IRQ_DISABLED) && desc->chip->ack) - desc->chip->ack(irq); -out_unlock: + if (desc->status & IRQ_DISABLED) +out_mask: + desc->chip->mask(irq); + + /* ack unconditionally to unmask lower prio irqs */ + desc->chip->ack(irq); + spin_unlock(&desc->lock); } #define handle_irq handle_prio_irq -- cgit v1.2.3 From a57a0b1d0f66da5ff5dc8f1a5a999f4d2f66090a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 25 Apr 2008 15:16:17 +0200 Subject: ns9xxx: check for irq lockups MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When I copy-adapted handle_level_irq I skipped note_interrupt because I considered it unimportant. If I had understand its importance I would have saved myself some ours of debugging. Signed-off-by: Uwe Kleine-König --- arch/arm/mach-ns9xxx/irq.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index ba7a9e4888f..75f2070dec7 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c @@ -78,6 +78,11 @@ void handle_prio_irq(unsigned int irq, struct irq_desc *desc) action_ret = handle_IRQ_event(irq, action); + /* XXX: There is no direct way to access noirqdebug, so check + * unconditionally for spurious irqs... + * Maybe this function should go to kernel/irq/chip.c? */ + note_interrupt(irq, desc, action_ret); + spin_lock(&desc->lock); desc->status &= ~IRQ_INPROGRESS; -- cgit v1.2.3 From 21f20b69a567ca8971fe643d2ebe5d680c9b43af Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 25 Apr 2008 15:24:59 +0200 Subject: ns9xxx: fix sparse warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The actual warning is arch/arm/mach-ns9xxx/irq.c:65:6: warning: symbol 'handle_prio_irq' was not declared. Should it be static? Signed-off-by: Uwe Kleine-König --- arch/arm/mach-ns9xxx/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index 75f2070dec7..bfd906be754 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c @@ -56,7 +56,7 @@ static struct irq_chip ns9xxx_chip = { #if 0 #define handle_irq handle_level_irq #else -void handle_prio_irq(unsigned int irq, struct irq_desc *desc) +static void handle_prio_irq(unsigned int irq, struct irq_desc *desc) { unsigned int cpu = smp_processor_id(); struct irqaction *action; -- cgit v1.2.3 From fa3959f457109cc7d082b86ea6daae927982815b Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 24 Apr 2008 01:27:02 +0200 Subject: mv643xx_eth: get rid of static variables, allow multiple instances Move mv643xx_eth's static state (ethernet register block base address and MII management interface spinlock) into a struct hanging off the shared platform device. This is necessary to support chips that contain multiple mv643xx_eth silicon blocks. Signed-off-by: Lennert Buytenhek Acked-by: Nicolas Pitre Signed-off-by: Dale Farnsworth --- arch/arm/mach-orion5x/common.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 439c7784af0..2bedf71659c 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -223,7 +223,9 @@ static struct platform_device orion5x_eth = { void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) { + eth_data->shared = &orion5x_eth_shared; orion5x_eth.dev.platform_data = eth_data; + platform_device_register(&orion5x_eth_shared); platform_device_register(&orion5x_eth); } -- cgit v1.2.3 From d35c7b0e54a596c5a8134d75999b7f391a9c6550 Mon Sep 17 00:00:00 2001 From: Ulrich Drepper Date: Sat, 3 May 2008 15:10:37 -0400 Subject: unified (weak) sys_pipe implementation This replaces the duplicated arch-specific versions of "sys_pipe()" with one unified implementation. This removes almost 250 lines of duplicated code. It's marked __weak, so that *if* an architecture wants to override the default implementation it can do so by simply having its own replacement version, since many architectures use alternate calling conventions for the 'pipe()' system call for legacy reasons (ie traditional UNIX implementations often return the two file descriptors in registers) I still haven't changed the cris version even though Linus says the BKL isn't needed. The arch maintainer can easily do it if there are really no obstacles. Signed-off-by: Ulrich Drepper Signed-off-by: Linus Torvalds --- arch/arm/kernel/sys_arm.c | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c index 9bd1870d980..0128687ba0f 100644 --- a/arch/arm/kernel/sys_arm.c +++ b/arch/arm/kernel/sys_arm.c @@ -34,23 +34,6 @@ extern unsigned long do_mremap(unsigned long addr, unsigned long old_len, unsigned long new_len, unsigned long flags, unsigned long new_addr); -/* - * sys_pipe() is the normal C calling standard for creating - * a pipe. It's not the way unix traditionally does this, though. - */ -asmlinkage int sys_pipe(unsigned long __user *fildes) -{ - int fd[2]; - int error; - - error = do_pipe(fd); - if (!error) { - if (copy_to_user(fildes, fd, 2*sizeof(int))) - error = -EFAULT; - } - return error; -} - /* common code for old and new mmaps */ inline long do_mmap2( unsigned long addr, unsigned long len, -- cgit v1.2.3 From f8b6389bd53361a19ec5236e298527c9c905ca4d Mon Sep 17 00:00:00 2001 From: Ryan Mallon Date: Mon, 28 Apr 2008 23:35:47 +0100 Subject: [ARM] 5023/1: Fix broken gpio interrupts on ep93xx Change gpio_direction_output to gpio_direction_input in ep93xx_gpio_irq_type. Fixes broken gpio interrupts. Signed-off-by: Ryan Mallon Signed-off-by: Russell King --- arch/arm/mach-ep93xx/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 8bc18724054..1d7bca6aa44 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -280,7 +280,7 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) const int port = gpio >> 3; const int port_mask = 1 << (gpio & 7); - gpio_direction_output(gpio, gpio_get_value(gpio)); + gpio_direction_input(gpio); switch (type) { case IRQT_RISING: -- cgit v1.2.3 From 649de51b883746d76c5fa1614dd067054c9d702a Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Fri, 2 May 2008 21:17:06 +0100 Subject: [ARM] 5027/1: Fixed random memory corruption on pxa suspend cycle. Each time a pxa type cpu went in suspend, a portion of kmalloc memory was corrupted. The issue was an incorrect length allocation introduced by the commit 711be5ccfe9a02ba560aa918a008c31ea4760163 for the save registers array (=> overflow). Signed-off-by: Robert Jarzmik Signed-off-by: Russell King --- arch/arm/mach-pxa/pm.c | 7 ++++--- arch/arm/mach-pxa/pxa25x.c | 8 +++----- arch/arm/mach-pxa/pxa27x.c | 8 +++----- arch/arm/mach-pxa/pxa3xx.c | 7 +++---- arch/arm/mach-sa1100/pm.c | 8 +++----- 5 files changed, 16 insertions(+), 22 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index ec1bbf333a3..329df2152dc 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -42,7 +42,7 @@ int pxa_pm_enter(suspend_state_t state) if (state != PM_SUSPEND_STANDBY) { pxa_cpu_pm_fns->save(sleep_save); /* before sleeping, calculate and save a checksum */ - for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) + for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++) sleep_save_checksum += sleep_save[i]; } @@ -55,7 +55,7 @@ int pxa_pm_enter(suspend_state_t state) if (state != PM_SUSPEND_STANDBY) { /* after sleeping, validate the checksum */ - for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) + for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++) checksum += sleep_save[i]; /* if invalid, display message and wait for a hardware reset */ @@ -101,7 +101,8 @@ static int __init pxa_pm_init(void) return -EINVAL; } - sleep_save = kmalloc(pxa_cpu_pm_fns->save_size, GFP_KERNEL); + sleep_save = kmalloc(pxa_cpu_pm_fns->save_count * sizeof(unsigned long), + GFP_KERNEL); if (!sleep_save) { printk(KERN_ERR "failed to alloc memory for pm save\n"); return -ENOMEM; diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index d9b5450aee5..3642f81f8f0 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -150,9 +150,7 @@ static struct clk pxa25x_clks[] = { * More ones like CP and general purpose register values are preserved * with the stack pointer in sleep.S. */ -enum { SLEEP_SAVE_START = 0, - - SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, +enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, @@ -162,7 +160,7 @@ enum { SLEEP_SAVE_START = 0, SLEEP_SAVE_CKEN, - SLEEP_SAVE_SIZE + SLEEP_SAVE_COUNT }; @@ -210,7 +208,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state) } static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { - .save_size = SLEEP_SAVE_SIZE, + .save_count = SLEEP_SAVE_COUNT, .valid = suspend_valid_only_mem, .save = pxa25x_cpu_pm_save, .restore = pxa25x_cpu_pm_restore, diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 7a2449dd0fd..505dccaa51f 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -181,9 +181,7 @@ static struct clk pxa27x_clks[] = { * More ones like CP and general purpose register values are preserved * with the stack pointer in sleep.S. */ -enum { SLEEP_SAVE_START = 0, - - SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, +enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, @@ -198,7 +196,7 @@ enum { SLEEP_SAVE_START = 0, SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR, - SLEEP_SAVE_SIZE + SLEEP_SAVE_COUNT }; void pxa27x_cpu_pm_save(unsigned long *sleep_save) @@ -269,7 +267,7 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state) } static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { - .save_size = SLEEP_SAVE_SIZE, + .save_count = SLEEP_SAVE_COUNT, .save = pxa27x_cpu_pm_save, .restore = pxa27x_cpu_pm_restore, .valid = pxa27x_cpu_pm_valid, diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index b6a6f5fcc77..644550bfa33 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -256,12 +256,11 @@ static unsigned long wakeup_src; #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] -enum { SLEEP_SAVE_START = 0, - SLEEP_SAVE_CKENA, +enum { SLEEP_SAVE_CKENA, SLEEP_SAVE_CKENB, SLEEP_SAVE_ACCR, - SLEEP_SAVE_SIZE, + SLEEP_SAVE_COUNT, }; static void pxa3xx_cpu_pm_save(unsigned long *sleep_save) @@ -376,7 +375,7 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state) } static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { - .save_size = SLEEP_SAVE_SIZE, + .save_count = SLEEP_SAVE_COUNT, .save = pxa3xx_cpu_pm_save, .restore = pxa3xx_cpu_pm_restore, .valid = pxa3xx_cpu_pm_valid, diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c index 246c573e725..1693d447a22 100644 --- a/arch/arm/mach-sa1100/pm.c +++ b/arch/arm/mach-sa1100/pm.c @@ -43,20 +43,18 @@ extern void sa1100_cpu_resume(void); * More ones like CP and general purpose register values are preserved * on the stack and then the stack pointer is stored last in sleep.S. */ -enum { SLEEP_SAVE_SP = 0, - - SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR, +enum { SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR, SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR, SLEEP_SAVE_Ser1SDCR0, - SLEEP_SAVE_SIZE + SLEEP_SAVE_COUNT }; static int sa11x0_pm_enter(suspend_state_t state) { - unsigned long gpio, sleep_save[SLEEP_SAVE_SIZE]; + unsigned long gpio, sleep_save[SLEEP_SAVE_COUNT]; gpio = GPLR; -- cgit v1.2.3 From bdd0f5f06e7647b545bec3ead2fa2a5fcdf0f0f9 Mon Sep 17 00:00:00 2001 From: Davide Rizzo Date: Sat, 3 May 2008 07:53:14 +0100 Subject: [ARM] 4882/2: Correction for S3C2410 clkout generation This is a correction for 2 small bugs for the Samsung S3C2410 ARM9 SoC clocks generator Signed-off-by: Davide Rizzo Acked-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/plat-s3c24xx/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index d84167fb33b..3ac8d8d781b 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c @@ -411,7 +411,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent) clk->parent = parent; - if (clk == &s3c24xx_dclk0) + if (clk == &s3c24xx_clkout0) mask = S3C2410_MISCCR_CLK0_MASK; else { source <<= 4; @@ -437,7 +437,7 @@ struct clk s3c24xx_dclk0 = { struct clk s3c24xx_dclk1 = { .name = "dclk1", .id = -1, - .ctrlbit = S3C2410_DCLKCON_DCLK0EN, + .ctrlbit = S3C2410_DCLKCON_DCLK1EN, .enable = s3c24xx_dclk_enable, .set_parent = s3c24xx_dclk_setparent, .set_rate = s3c24xx_set_dclk_rate, -- cgit v1.2.3 From 3679389b880a318f9b9cfebab5714443796f2f71 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Wed, 7 May 2008 20:36:34 +0100 Subject: [ARM] 5031/1: Indentation correction in cpu-pxa.c. These indentation corrections prepare the pxa27x support. Signed-off-by: Robert Jarzmik Signed-off-by: Russell King --- arch/arm/mach-pxa/cpu-pxa.c | 98 +++++++++++++++++++++++---------------------- 1 file changed, 51 insertions(+), 47 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpu-pxa.c index 4b21479332a..0f5660200bf 100644 --- a/arch/arm/mach-pxa/cpu-pxa.c +++ b/arch/arm/mach-pxa/cpu-pxa.c @@ -57,29 +57,29 @@ typedef struct { } pxa_freqs_t; /* Define the refresh period in mSec for the SDRAM and the number of rows */ -#define SDRAM_TREF 64 /* standard 64ms SDRAM */ -#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */ -#define MDREFR_DRI(x) (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32)) +#define SDRAM_TREF 64 /* standard 64ms SDRAM */ +#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */ +#define MDREFR_DRI(x) (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32)) -#define CCLKCFG_TURBO 0x1 -#define CCLKCFG_FCS 0x2 -#define PXA25x_MIN_FREQ 99500 -#define PXA25x_MAX_FREQ 398100 -#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2) -#define MDREFR_DRI_MASK 0xFFF +#define CCLKCFG_TURBO 0x1 +#define CCLKCFG_FCS 0x2 +#define PXA25x_MIN_FREQ 99500 +#define PXA25x_MAX_FREQ 398100 +#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2) +#define MDREFR_DRI_MASK 0xFFF /* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */ static pxa_freqs_t pxa255_run_freqs[] = { - /* CPU MEMBUS CCCR DIV2*/ - { 99500, 99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */ - {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */ - {199100, 99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */ - {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */ - {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */ - {398100, 99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */ - {0,} + /* CPU MEMBUS CCCR DIV2 run turbo PXbus SDRAM */ + { 99500, 99500, 0x121, 1}, /* 99, 99, 50, 50 */ + {132700, 132700, 0x123, 1}, /* 133, 133, 66, 66 */ + {199100, 99500, 0x141, 0}, /* 199, 199, 99, 99 */ + {265400, 132700, 0x143, 1}, /* 265, 265, 133, 66 */ + {331800, 165900, 0x145, 1}, /* 331, 331, 166, 83 */ + {398100, 99500, 0x161, 0}, /* 398, 398, 196, 99 */ + {0,} }; #define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs) @@ -88,17 +88,18 @@ static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1]; /* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ static pxa_freqs_t pxa255_turbo_freqs[] = { - /* CPU MEMBUS CCCR DIV2*/ - { 99500, 99500, 0x121, 1}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */ - {199100, 99500, 0x221, 0}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */ - {298500, 99500, 0x321, 0}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */ - {298600, 99500, 0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */ - {398100, 99500, 0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */ - {0,} + /* CPU MEMBUS CCCR DIV2 run turbo PXbus SDRAM */ + { 99500, 99500, 0x121, 1}, /* 99, 99, 50, 50 */ + {199100, 99500, 0x221, 0}, /* 99, 199, 50, 99 */ + {298500, 99500, 0x321, 0}, /* 99, 287, 50, 99 */ + {298600, 99500, 0x1c1, 0}, /* 199, 287, 99, 99 */ + {398100, 99500, 0x241, 0}, /* 199, 398, 99, 99 */ + {0,} }; #define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs) -static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1]; +static struct cpufreq_frequency_table + pxa255_turbo_freq_table[NUM_TURBO_FREQS+1]; extern unsigned get_clk_frequency_khz(int info); @@ -122,14 +123,14 @@ static int pxa_verify_policy(struct cpufreq_policy *policy) if (freq_debug) pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n", - policy->min, policy->max); + policy->min, policy->max); return ret; } static int pxa_set_target(struct cpufreq_policy *policy, - unsigned int target_freq, - unsigned int relation) + unsigned int target_freq, + unsigned int relation) { struct cpufreq_frequency_table *pxa_freqs_table; pxa_freqs_t *pxa_freq_settings; @@ -155,7 +156,7 @@ static int pxa_set_target(struct cpufreq_policy *policy, /* Lookup the next frequency */ if (cpufreq_frequency_table_target(policy, pxa_freqs_table, - target_freq, relation, &idx)) { + target_freq, relation, &idx)) { return -EINVAL; } @@ -164,10 +165,11 @@ static int pxa_set_target(struct cpufreq_policy *policy, freqs.cpu = policy->cpu; if (freq_debug) - pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n", - freqs.new / 1000, (pxa_freq_settings[idx].div2) ? - (pxa_freq_settings[idx].membus / 2000) : - (pxa_freq_settings[idx].membus / 1000)); + pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, " + "(SDRAM %d Mhz)\n", + freqs.new / 1000, (pxa_freq_settings[idx].div2) ? + (pxa_freq_settings[idx].membus / 2000) : + (pxa_freq_settings[idx].membus / 1000)); /* * Tell everyone what we're about to do... @@ -177,16 +179,17 @@ static int pxa_set_target(struct cpufreq_policy *policy, cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); /* Calculate the next MDREFR. If we're slowing down the SDRAM clock - * we need to preset the smaller DRI before the change. If we're speeding - * up we need to set the larger DRI value after the change. + * we need to preset the smaller DRI before the change. If we're + * speeding up we need to set the larger DRI value after the change. */ preset_mdrefr = postset_mdrefr = MDREFR; - if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) { + if ((MDREFR & MDREFR_DRI_MASK) > + MDREFR_DRI(pxa_freq_settings[idx].membus)) { preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) | - MDREFR_DRI(pxa_freq_settings[idx].membus); + MDREFR_DRI(pxa_freq_settings[idx].membus); } postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) | - MDREFR_DRI(pxa_freq_settings[idx].membus); + MDREFR_DRI(pxa_freq_settings[idx].membus); /* If we're dividing the memory clock by two for the SDRAM clock, this * must be set prior to the change. Clearing the divide must be done @@ -207,7 +210,7 @@ static int pxa_set_target(struct cpufreq_policy *policy, asm volatile(" \n\ ldr r4, [%1] /* load MDREFR */ \n\ b 2f \n\ - .align 5 \n\ + .align 5 \n\ 1: \n\ str %4, [%1] /* preset the MDREFR */ \n\ mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\ @@ -217,10 +220,10 @@ static int pxa_set_target(struct cpufreq_policy *policy, 2: b 1b \n\ 3: nop \n\ " - : "=&r" (unused) - : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), - "r" (preset_mdrefr), "r" (postset_mdrefr) - : "r4", "r5"); + : "=&r" (unused) + : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), + "r" (preset_mdrefr), "r" (postset_mdrefr) + : "r4", "r5"); local_irq_restore(flags); /* @@ -248,7 +251,7 @@ static int pxa_cpufreq_init(struct cpufreq_policy *policy) policy->cpuinfo.max_freq = PXA25x_MAX_FREQ; policy->cpuinfo.min_freq = PXA25x_MIN_FREQ; policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ - policy->cur = get_clk_frequency_khz(0); /* current freq */ + policy->cur = get_clk_frequency_khz(0); /* current freq */ policy->min = policy->max = policy->cur; /* Generate the run cpufreq_frequency_table struct */ @@ -260,7 +263,8 @@ static int pxa_cpufreq_init(struct cpufreq_policy *policy) pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; /* Generate the turbo cpufreq_frequency_table struct */ for (i = 0; i < NUM_TURBO_FREQS; i++) { - pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz; + pxa255_turbo_freq_table[i].frequency = + pxa255_turbo_freqs[i].khz; pxa255_turbo_freq_table[i].index = i; } pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; @@ -293,8 +297,8 @@ static void __exit pxa_cpu_exit(void) } -MODULE_AUTHOR ("Intrinsyc Software Inc."); -MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture"); +MODULE_AUTHOR("Intrinsyc Software Inc."); +MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture"); MODULE_LICENSE("GPL"); module_init(pxa_cpu_init); module_exit(pxa_cpu_exit); -- cgit v1.2.3 From 592eb9997dc89cd0c8f89a505e5348bbddce70f6 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Wed, 7 May 2008 20:39:06 +0100 Subject: [ARM] 5032/1: Added cpufreq support for pxa27x CPU PXA cpus maximum frequency depends on the cpu (624 for pxa270, 520 for pxa272, 416 for pxa271). It should be provided on kernel or module start (cpu-pxa pxa27x_maxfreq parameter). Make use of cpufreq_frequency_table_cpuinfo (patch by Bill Reese provided by Philipp Zabel). Some additionnal fixes from Philipp Zabel include : * rename PXA cpufreq driver to reflect added PXA27x support * remove unused variable ramstart from PXA cpufreq driver Signed-off-by: Philipp Zabel Signed-off-by: Robert Jarzmik Signed-off-by: Russell King --- arch/arm/mach-pxa/cpu-pxa.c | 266 +++++++++++++++++++++++++++++++------------- 1 file changed, 186 insertions(+), 80 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpu-pxa.c index 0f5660200bf..fb9ba1ab282 100644 --- a/arch/arm/mach-pxa/cpu-pxa.c +++ b/arch/arm/mach-pxa/cpu-pxa.c @@ -49,76 +49,170 @@ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0"); #define freq_debug 0 #endif +static unsigned int pxa27x_maxfreq; +module_param(pxa27x_maxfreq, uint, 0); +MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz" + "(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)"); + typedef struct { unsigned int khz; unsigned int membus; unsigned int cccr; unsigned int div2; + unsigned int cclkcfg; } pxa_freqs_t; /* Define the refresh period in mSec for the SDRAM and the number of rows */ #define SDRAM_TREF 64 /* standard 64ms SDRAM */ #define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */ -#define MDREFR_DRI(x) (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32)) #define CCLKCFG_TURBO 0x1 #define CCLKCFG_FCS 0x2 -#define PXA25x_MIN_FREQ 99500 -#define PXA25x_MAX_FREQ 398100 +#define CCLKCFG_HALFTURBO 0x4 +#define CCLKCFG_FASTBUS 0x8 #define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2) #define MDREFR_DRI_MASK 0xFFF - +/* + * PXA255 definitions + */ /* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */ +#define CCLKCFG CCLKCFG_TURBO | CCLKCFG_FCS + static pxa_freqs_t pxa255_run_freqs[] = { - /* CPU MEMBUS CCCR DIV2 run turbo PXbus SDRAM */ - { 99500, 99500, 0x121, 1}, /* 99, 99, 50, 50 */ - {132700, 132700, 0x123, 1}, /* 133, 133, 66, 66 */ - {199100, 99500, 0x141, 0}, /* 199, 199, 99, 99 */ - {265400, 132700, 0x143, 1}, /* 265, 265, 133, 66 */ - {331800, 165900, 0x145, 1}, /* 331, 331, 166, 83 */ - {398100, 99500, 0x161, 0}, /* 398, 398, 196, 99 */ - {0,} + /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */ + { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */ + {132700, 132700, 0x123, 1, CCLKCFG}, /* 133, 133, 66, 66 */ + {199100, 99500, 0x141, 0, CCLKCFG}, /* 199, 199, 99, 99 */ + {265400, 132700, 0x143, 1, CCLKCFG}, /* 265, 265, 133, 66 */ + {331800, 165900, 0x145, 1, CCLKCFG}, /* 331, 331, 166, 83 */ + {398100, 99500, 0x161, 0, CCLKCFG}, /* 398, 398, 196, 99 */ }; -#define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs) - -static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1]; /* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ static pxa_freqs_t pxa255_turbo_freqs[] = { - /* CPU MEMBUS CCCR DIV2 run turbo PXbus SDRAM */ - { 99500, 99500, 0x121, 1}, /* 99, 99, 50, 50 */ - {199100, 99500, 0x221, 0}, /* 99, 199, 50, 99 */ - {298500, 99500, 0x321, 0}, /* 99, 287, 50, 99 */ - {298600, 99500, 0x1c1, 0}, /* 199, 287, 99, 99 */ - {398100, 99500, 0x241, 0}, /* 199, 398, 99, 99 */ - {0,} + /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */ + { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */ + {199100, 99500, 0x221, 0, CCLKCFG}, /* 99, 199, 50, 99 */ + {298500, 99500, 0x321, 0, CCLKCFG}, /* 99, 287, 50, 99 */ + {298600, 99500, 0x1c1, 0, CCLKCFG}, /* 199, 287, 99, 99 */ + {398100, 99500, 0x241, 0, CCLKCFG}, /* 199, 398, 99, 99 */ }; -#define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs) +#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs) +#define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs) + +static struct cpufreq_frequency_table + pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1]; static struct cpufreq_frequency_table - pxa255_turbo_freq_table[NUM_TURBO_FREQS+1]; + pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1]; + +/* + * PXA270 definitions + * + * For the PXA27x: + * Control variables are A, L, 2N for CCCR; B, HT, T for CLKCFG. + * + * A = 0 => memory controller clock from table 3-7, + * A = 1 => memory controller clock = system bus clock + * Run mode frequency = 13 MHz * L + * Turbo mode frequency = 13 MHz * L * N + * System bus frequency = 13 MHz * L / (B + 1) + * + * In CCCR: + * A = 1 + * L = 16 oscillator to run mode ratio + * 2N = 6 2 * (turbo mode to run mode ratio) + * + * In CCLKCFG: + * B = 1 Fast bus mode + * HT = 0 Half-Turbo mode + * T = 1 Turbo mode + * + * For now, just support some of the combinations in table 3-7 of + * PXA27x Processor Family Developer's Manual to simplify frequency + * change sequences. + */ +#define PXA27x_CCCR(A, L, N2) (A << 25 | N2 << 7 | L) +#define CCLKCFG2(B, HT, T) \ + (CCLKCFG_FCS | \ + ((B) ? CCLKCFG_FASTBUS : 0) | \ + ((HT) ? CCLKCFG_HALFTURBO : 0) | \ + ((T) ? CCLKCFG_TURBO : 0)) + +static pxa_freqs_t pxa27x_freqs[] = { + {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1)}, + {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1)}, + {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1)}, + {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1)}, + {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1)}, + {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1)}, + {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1)} +}; + +#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs) +static struct cpufreq_frequency_table + pxa27x_freq_table[NUM_PXA27x_FREQS+1]; extern unsigned get_clk_frequency_khz(int info); +static void find_freq_tables(struct cpufreq_policy *policy, + struct cpufreq_frequency_table **freq_table, + pxa_freqs_t **pxa_freqs) +{ + if (cpu_is_pxa25x()) { + if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { + *pxa_freqs = pxa255_run_freqs; + *freq_table = pxa255_run_freq_table; + } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { + *pxa_freqs = pxa255_turbo_freqs; + *freq_table = pxa255_turbo_freq_table; + } else { + printk("CPU PXA: Unknown policy found. " + "Using CPUFREQ_POLICY_PERFORMANCE\n"); + *pxa_freqs = pxa255_run_freqs; + *freq_table = pxa255_run_freq_table; + } + } + if (cpu_is_pxa27x()) { + *pxa_freqs = pxa27x_freqs; + *freq_table = pxa27x_freq_table; + } +} + +static void pxa27x_guess_max_freq(void) +{ + if (!pxa27x_maxfreq) { + pxa27x_maxfreq = 416000; + printk(KERN_INFO "PXA CPU 27x max frequency not defined " + "(pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n", + pxa27x_maxfreq); + } else { + pxa27x_maxfreq *= 1000; + } +} + +static u32 mdrefr_dri(unsigned int freq) +{ + u32 dri = 0; + + if (cpu_is_pxa25x()) + dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS * 32)); + if (cpu_is_pxa27x()) + dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS - 31)) / 32; + return dri; +} + /* find a valid frequency point */ static int pxa_verify_policy(struct cpufreq_policy *policy) { struct cpufreq_frequency_table *pxa_freqs_table; + pxa_freqs_t *pxa_freqs; int ret; - if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { - pxa_freqs_table = pxa255_run_freq_table; - } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { - pxa_freqs_table = pxa255_turbo_freq_table; - } else { - printk("CPU PXA: Unknown policy found. " - "Using CPUFREQ_POLICY_PERFORMANCE\n"); - pxa_freqs_table = pxa255_run_freq_table; - } - + find_freq_tables(policy, &pxa_freqs_table, &pxa_freqs); ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table); if (freq_debug) @@ -128,6 +222,11 @@ static int pxa_verify_policy(struct cpufreq_policy *policy) return ret; } +static unsigned int pxa_cpufreq_get(unsigned int cpu) +{ + return get_clk_frequency_khz(0); +} + static int pxa_set_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) @@ -137,22 +236,11 @@ static int pxa_set_target(struct cpufreq_policy *policy, struct cpufreq_freqs freqs; unsigned int idx; unsigned long flags; - unsigned int unused, preset_mdrefr, postset_mdrefr; - void *ramstart = phys_to_virt(0xa0000000); + unsigned int new_freq_cpu, new_freq_mem; + unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg; /* Get the current policy */ - if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { - pxa_freq_settings = pxa255_run_freqs; - pxa_freqs_table = pxa255_run_freq_table; - } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { - pxa_freq_settings = pxa255_turbo_freqs; - pxa_freqs_table = pxa255_turbo_freq_table; - } else { - printk("CPU PXA: Unknown policy found. " - "Using CPUFREQ_POLICY_PERFORMANCE\n"); - pxa_freq_settings = pxa255_run_freqs; - pxa_freqs_table = pxa255_run_freq_table; - } + find_freq_tables(policy, &pxa_freqs_table, &pxa_freq_settings); /* Lookup the next frequency */ if (cpufreq_frequency_table_target(policy, pxa_freqs_table, @@ -160,16 +248,17 @@ static int pxa_set_target(struct cpufreq_policy *policy, return -EINVAL; } + new_freq_cpu = pxa_freq_settings[idx].khz; + new_freq_mem = pxa_freq_settings[idx].membus; freqs.old = policy->cur; - freqs.new = pxa_freq_settings[idx].khz; + freqs.new = new_freq_cpu; freqs.cpu = policy->cpu; if (freq_debug) pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, " "(SDRAM %d Mhz)\n", freqs.new / 1000, (pxa_freq_settings[idx].div2) ? - (pxa_freq_settings[idx].membus / 2000) : - (pxa_freq_settings[idx].membus / 1000)); + (new_freq_mem / 2000) : (new_freq_mem / 1000)); /* * Tell everyone what we're about to do... @@ -183,13 +272,12 @@ static int pxa_set_target(struct cpufreq_policy *policy, * speeding up we need to set the larger DRI value after the change. */ preset_mdrefr = postset_mdrefr = MDREFR; - if ((MDREFR & MDREFR_DRI_MASK) > - MDREFR_DRI(pxa_freq_settings[idx].membus)) { - preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) | - MDREFR_DRI(pxa_freq_settings[idx].membus); + if ((MDREFR & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) { + preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK); + preset_mdrefr |= mdrefr_dri(new_freq_mem); } - postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) | - MDREFR_DRI(pxa_freq_settings[idx].membus); + postset_mdrefr = + (postset_mdrefr & ~MDREFR_DRI_MASK) | mdrefr_dri(new_freq_mem); /* If we're dividing the memory clock by two for the SDRAM clock, this * must be set prior to the change. Clearing the divide must be done @@ -204,25 +292,26 @@ static int pxa_set_target(struct cpufreq_policy *policy, local_irq_save(flags); - /* Set new the CCCR */ + /* Set new the CCCR and prepare CCLKCFG */ CCCR = pxa_freq_settings[idx].cccr; + cclkcfg = pxa_freq_settings[idx].cclkcfg; asm volatile(" \n\ ldr r4, [%1] /* load MDREFR */ \n\ b 2f \n\ .align 5 \n\ 1: \n\ - str %4, [%1] /* preset the MDREFR */ \n\ + str %3, [%1] /* preset the MDREFR */ \n\ mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\ - str %5, [%1] /* postset the MDREFR */ \n\ + str %4, [%1] /* postset the MDREFR */ \n\ \n\ b 3f \n\ 2: b 1b \n\ 3: nop \n\ " : "=&r" (unused) - : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), - "r" (preset_mdrefr), "r" (postset_mdrefr) + : "r" (&MDREFR), "r" (cclkcfg), + "r" (preset_mdrefr), "r" (postset_mdrefr) : "r4", "r5"); local_irq_restore(flags); @@ -236,39 +325,57 @@ static int pxa_set_target(struct cpufreq_policy *policy, return 0; } -static unsigned int pxa_cpufreq_get(unsigned int cpu) -{ - return get_clk_frequency_khz(0); -} - -static int pxa_cpufreq_init(struct cpufreq_policy *policy) +static __init int pxa_cpufreq_init(struct cpufreq_policy *policy) { int i; + unsigned int freq; + + /* try to guess pxa27x cpu */ + if (cpu_is_pxa27x()) + pxa27x_guess_max_freq(); /* set default policy and cpuinfo */ policy->governor = CPUFREQ_DEFAULT_GOVERNOR; - policy->policy = CPUFREQ_POLICY_PERFORMANCE; - policy->cpuinfo.max_freq = PXA25x_MAX_FREQ; - policy->cpuinfo.min_freq = PXA25x_MIN_FREQ; + if (cpu_is_pxa25x()) + policy->policy = CPUFREQ_POLICY_PERFORMANCE; policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ policy->cur = get_clk_frequency_khz(0); /* current freq */ policy->min = policy->max = policy->cur; - /* Generate the run cpufreq_frequency_table struct */ - for (i = 0; i < NUM_RUN_FREQS; i++) { + /* Generate pxa25x the run cpufreq_frequency_table struct */ + for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) { pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; pxa255_run_freq_table[i].index = i; } - pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; - /* Generate the turbo cpufreq_frequency_table struct */ - for (i = 0; i < NUM_TURBO_FREQS; i++) { + + /* Generate pxa25x the turbo cpufreq_frequency_table struct */ + for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) { pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz; pxa255_turbo_freq_table[i].index = i; } pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; + /* Generate the pxa27x cpufreq_frequency_table struct */ + for (i = 0; i < NUM_PXA27x_FREQS; i++) { + freq = pxa27x_freqs[i].khz; + if (freq > pxa27x_maxfreq) + break; + pxa27x_freq_table[i].frequency = freq; + pxa27x_freq_table[i].index = i; + } + pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END; + + /* + * Set the policy's minimum and maximum frequencies from the tables + * just constructed. This sets cpuinfo.mxx_freq, min and max. + */ + if (cpu_is_pxa25x()) + cpufreq_frequency_table_cpuinfo(policy, pxa255_run_freq_table); + else if (cpu_is_pxa27x()) + cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table); + printk(KERN_INFO "PXA CPU frequency change support initialized\n"); return 0; @@ -279,21 +386,20 @@ static struct cpufreq_driver pxa_cpufreq_driver = { .target = pxa_set_target, .init = pxa_cpufreq_init, .get = pxa_cpufreq_get, - .name = "PXA25x", + .name = "PXA2xx", }; static int __init pxa_cpu_init(void) { int ret = -ENODEV; - if (cpu_is_pxa25x()) + if (cpu_is_pxa25x() || cpu_is_pxa27x()) ret = cpufreq_register_driver(&pxa_cpufreq_driver); return ret; } static void __exit pxa_cpu_exit(void) { - if (cpu_is_pxa25x()) - cpufreq_unregister_driver(&pxa_cpufreq_driver); + cpufreq_unregister_driver(&pxa_cpufreq_driver); } -- cgit v1.2.3 From ffebabe0bf0de9ee500d4605d6acb71e1ee3b79f Mon Sep 17 00:00:00 2001 From: Alexey Dobriyan Date: Thu, 8 May 2008 10:58:39 +0100 Subject: [ARM] lubbock: fix compilation arch/arm/mach-pxa/lubbock.c:399: error: expected '}' before ';' token Signed-off-by: Alexey Dobriyan Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/mach-pxa/lubbock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 0993f4d1a0b..7b9bdd0c666 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -396,7 +396,7 @@ static struct pxafb_mach_info sharp_lm8v31 = { .cmap_inverse = 0, .cmap_static = 0, .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL | - LCD_AC_BIAS_FREQ(255); + LCD_AC_BIAS_FREQ(255), }; #define MMC_POLL_RATE msecs_to_jiffies(1000) -- cgit v1.2.3 From dc38e2ad53ca27968919dea6d7fa60575782d5a6 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 8 May 2008 16:50:39 +0100 Subject: [ARM] pxa: Fix RCSR handling Related to d3930614e68bdf83a120d904c039a64e9f75dba1. RCSR is only present on PXA2xx CPUs, not on PXA3xx CPUs. Therefore, we should not be unconditionally writing to RCSR from generic code. Since we now clear the RCSR status from the SoC specific PXA PM code and before reset in the arch_reset() function, the duplication in the corgi, poodle, spitz and tosa code can be removed. Acked-by: Richard Purdie Signed-off-by: Russell King --- arch/arm/mach-pxa/corgi.c | 4 ---- arch/arm/mach-pxa/pm.c | 3 --- arch/arm/mach-pxa/poodle.c | 2 -- arch/arm/mach-pxa/pxa25x.c | 3 +++ arch/arm/mach-pxa/pxa27x.c | 3 +++ arch/arm/mach-pxa/spitz.c | 2 -- arch/arm/mach-pxa/spitz_pm.c | 3 --- arch/arm/mach-pxa/tosa.c | 2 -- 8 files changed, 6 insertions(+), 16 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 259ca821e46..b757dd75665 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -493,8 +493,6 @@ static struct platform_device *devices[] __initdata = { static void corgi_poweroff(void) { - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; - if (!machine_is_corgi()) /* Green LED off tells the bootloader to halt */ reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); @@ -503,8 +501,6 @@ static void corgi_poweroff(void) static void corgi_restart(char mode) { - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; - if (!machine_is_corgi()) /* Green LED on tells the bootloader to reboot */ set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 329df2152dc..7d4debbdcca 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -46,9 +46,6 @@ int pxa_pm_enter(suspend_state_t state) sleep_save_checksum += sleep_save[i]; } - /* Clear reset status */ - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; - /* *** go zzz *** */ pxa_cpu_pm_fns->enter(state); cpu_init(); diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index ca5ac196b47..0b30f25cff3 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -326,13 +326,11 @@ static struct platform_device *devices[] __initdata = { static void poodle_poweroff(void) { - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; arm_machine_restart('h'); } static void poodle_restart(char mode) { - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; arm_machine_restart('h'); } diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 3642f81f8f0..e5b417d14bb 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -198,6 +198,9 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) static void pxa25x_cpu_pm_enter(suspend_state_t state) { + /* Clear reset status */ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + switch (state) { case PM_SUSPEND_MEM: /* set resume return address */ diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 505dccaa51f..7e945836e12 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -249,6 +249,9 @@ void pxa27x_cpu_pm_enter(suspend_state_t state) /* Clear edge-detect status register. */ PEDR = 0xDF12FE1B; + /* Clear reset status */ + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + switch (state) { case PM_SUSPEND_STANDBY: pxa_cpu_standby(); diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 62a02c3927c..e7d0fcd9b43 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -529,8 +529,6 @@ static struct platform_device *devices[] __initdata = { static void spitz_poweroff(void) { - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; - pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT); GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET); diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 7a7f5f947cc..23f050feb20 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -119,9 +119,6 @@ static void spitz_presuspend(void) /* nRESET_OUT Disable */ PSLR |= PSLR_SL_ROD; - /* Clear reset status */ - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; - /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ PCFR = PCFR_GPR_EN | PCFR_OPDE; } diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 6458f6d371d..c2cbd66db81 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -467,8 +467,6 @@ static struct platform_device *devices[] __initdata = { static void tosa_poweroff(void) { - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; - pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT); GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET); -- cgit v1.2.3 From d236f5a5f77183c270223e8816804e7763463282 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 26 Apr 2008 14:48:11 -0400 Subject: [ARM] Orion: use mv643xx_eth driver mbus window handling Make the Orion 5x platform code use the mbus window handling code that's in the mv643xx_eth driver, instead of programming the GigE block's mbus window registers by hand. Signed-off-by: Lennert Buytenhek Reviewed-by: Tzachi Perelstein Acked-by: Russell King Signed-off-by: Nicolas Pitre --- arch/arm/mach-orion5x/addr-map.c | 47 ---------------------------------------- arch/arm/mach-orion5x/common.c | 8 ++++++- arch/arm/mach-orion5x/common.h | 1 - 3 files changed, 7 insertions(+), 49 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 9608503d67f..186f51ce7c1 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c @@ -81,17 +81,6 @@ #define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4)) #define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4)) -/* - * Gigabit Ethernet Address Decode Windows registers - */ -#define ETH_WIN_BASE(win) ORION5X_ETH_REG(0x200 + ((win) * 8)) -#define ETH_WIN_SIZE(win) ORION5X_ETH_REG(0x204 + ((win) * 8)) -#define ETH_WIN_REMAP(win) ORION5X_ETH_REG(0x280 + ((win) * 4)) -#define ETH_WIN_EN ORION5X_ETH_REG(0x290) -#define ETH_WIN_PROT ORION5X_ETH_REG(0x294) -#define ETH_MAX_WIN 6 -#define ETH_MAX_REMAP_WIN 4 - struct mbus_dram_target_info orion5x_mbus_dram_info; @@ -202,39 +191,3 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size) { setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1); } - -void __init orion5x_setup_eth_wins(void) -{ - int i; - - /* - * First, disable and clear windows - */ - for (i = 0; i < ETH_MAX_WIN; i++) { - orion5x_write(ETH_WIN_BASE(i), 0); - orion5x_write(ETH_WIN_SIZE(i), 0); - orion5x_setbits(ETH_WIN_EN, 1 << i); - orion5x_clrbits(ETH_WIN_PROT, 0x3 << (i * 2)); - if (i < ETH_MAX_REMAP_WIN) - orion5x_write(ETH_WIN_REMAP(i), 0); - } - - /* - * Setup windows for DDR banks. - */ - for (i = 0; i < DDR_MAX_CS; i++) { - u32 base, size; - size = orion5x_read(DDR_SIZE_CS(i)); - base = orion5x_read(DDR_BASE_CS(i)); - if (size & DDR_BANK_EN) { - base = DDR_REG_TO_BASE(base); - size = DDR_REG_TO_SIZE(size); - orion5x_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000); - orion5x_write(ETH_WIN_BASE(i), (base & 0xffff0000) | - (ATTR_DDR_CS(i) << 8) | - TARGET_DDR); - orion5x_clrbits(ETH_WIN_EN, 1 << i); - orion5x_setbits(ETH_WIN_PROT, 0x3 << (i * 2)); - } - } -} diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 0ecff5a6197..da6e5deab07 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -190,6 +190,10 @@ static struct platform_device orion5x_ehci1 = { * (The Orion and Discovery (MV643xx) families use the same Ethernet driver) ****************************************************************************/ +struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = { + .dram = &orion5x_mbus_dram_info, +}; + static struct resource orion5x_eth_shared_resources[] = { { .start = ORION5X_ETH_PHYS_BASE + 0x2000, @@ -201,6 +205,9 @@ static struct resource orion5x_eth_shared_resources[] = { static struct platform_device orion5x_eth_shared = { .name = MV643XX_ETH_SHARED_NAME, .id = 0, + .dev = { + .platform_data = &orion5x_eth_shared_data, + }, .num_resources = 1, .resource = orion5x_eth_shared_resources, }; @@ -362,7 +369,6 @@ void __init orion5x_init(void) * Setup Orion address map */ orion5x_setup_cpu_mbus_bridge(); - orion5x_setup_eth_wins(); /* * Register devices. diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index 14adf8d1a54..bd0f05de6e1 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -22,7 +22,6 @@ void orion5x_setup_dev0_win(u32 base, u32 size); void orion5x_setup_dev1_win(u32 base, u32 size); void orion5x_setup_dev2_win(u32 base, u32 size); void orion5x_setup_pcie_wa_win(u32 base, u32 size); -void orion5x_setup_eth_wins(void); /* * Shared code used internally by other Orion core functions. -- cgit v1.2.3 From b8c15a6084e84497e31e75c9cededb73af768632 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 26 Apr 2008 14:48:11 -0400 Subject: [ARM] Orion: pass proper t_clk into mv643xx_eth Pass the Orion TCLK tick rate into the ethernet driver. Signed-off-by: Lennert Buytenhek Signed-off-by: Nicolas Pitre --- arch/arm/mach-orion5x/common.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index da6e5deab07..4f13fd037f0 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -192,6 +192,7 @@ static struct platform_device orion5x_ehci1 = { struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = { .dram = &orion5x_mbus_dram_info, + .t_clk = ORION5X_TCLK, }; static struct resource orion5x_eth_shared_resources[] = { -- cgit v1.2.3 From da109897a142dd017172c0ce7abf0be8646f7109 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 26 Apr 2008 14:48:11 -0400 Subject: [ARM] Orion: clean up addr-map.c after window setting code purge This patch cleans up Orion's addr-map.c a bit after all peripheral window programming code has been moved out into the relevant drivers. Signed-off-by: Lennert Buytenhek Reviewed-by: Tzachi Perelstein Acked-by: Russell King Signed-off-by: Nicolas Pitre --- arch/arm/mach-orion5x/addr-map.c | 19 +++---------------- 1 file changed, 3 insertions(+), 16 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 186f51ce7c1..e63fb05dc89 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c @@ -34,11 +34,7 @@ * Non-CPU Masters address decoding -- * Unlike the CPU, we setup the access from Orion's master interfaces to DDR * banks only (the typical use case). - * Setup access for each master to DDR is issued by common.c. - * - * Note: although orion_setbits() and orion_clrbits() are not atomic - * no locking is necessary here since code in this file is only called - * at boot time when there is no concurrency issues. + * Setup access for each master to DDR is issued by platform device setup. */ /* @@ -48,10 +44,6 @@ #define TARGET_DEV_BUS 1 #define TARGET_PCI 3 #define TARGET_PCIE 4 -#define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \ - ((n) == 1) ? 0xd : \ - ((n) == 2) ? 0xb : \ - ((n) == 3) ? 0x7 : 0xf) #define ATTR_PCIE_MEM 0x59 #define ATTR_PCIE_IO 0x51 #define ATTR_PCIE_WA 0x79 @@ -61,17 +53,12 @@ #define ATTR_DEV_CS1 0x1d #define ATTR_DEV_CS2 0x1b #define ATTR_DEV_BOOT 0xf -#define WIN_EN 1 /* * Helpers to get DDR bank info */ -#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) * 8)) -#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) * 8)) -#define DDR_MAX_CS 4 -#define DDR_REG_TO_SIZE(reg) (((reg) | 0xffffff) + 1) -#define DDR_REG_TO_BASE(reg) ((reg) & 0xff000000) -#define DDR_BANK_EN 1 +#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3)) +#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3)) /* * CPU Address Decode Windows registers -- cgit v1.2.3 From c8d2eb8e56b93c69a30793f19ac1bc784398fbd5 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 7 May 2008 16:55:13 -0700 Subject: ARM: OMAP: Add calls to omap2_set_globals_*() Add the omap2_set_globals_{242x,243x,343x}() functions. These functions are called early upon boot in the map_io() functions in the board-specific init files. This patch was accidentally left out of the earlier series. This fixes omap2 booting as noted by Kyungmin Park . Signed-off-by: Paul Walmsley Cc: Kyungmin Park Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-2430sdp.c | 1 + arch/arm/mach-omap2/board-apollon.c | 1 + arch/arm/mach-omap2/board-generic.c | 1 + arch/arm/mach-omap2/board-h4.c | 1 + 4 files changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 1c12d7c6c7f..1682eb77c46 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -208,6 +208,7 @@ static void __init omap_2430sdp_init(void) static void __init omap_2430sdp_map_io(void) { + omap2_set_globals_243x(); omap2_map_common_io(); } diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index a1e1e6765b5..620fa0f120e 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -394,6 +394,7 @@ static void __init omap_apollon_init(void) static void __init omap_apollon_map_io(void) { + omap2_set_globals_242x(); omap2_map_common_io(); } diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 90938151bcf..df8be081e15 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -65,6 +65,7 @@ static void __init omap_generic_init(void) static void __init omap_generic_map_io(void) { + omap2_set_globals_242x(); /* should be 242x, 243x, or 343x */ omap2_map_common_io(); } diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index d1915f99a5f..0d28f6897c8 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -420,6 +420,7 @@ static void __init omap_h4_init(void) static void __init omap_h4_map_io(void) { + omap2_set_globals_242x(); omap2_map_common_io(); } -- cgit v1.2.3 From 7cf95774190e423370945e116b07410c860407db Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 7 Aug 2007 05:20:00 -0700 Subject: ARM: OMAP: Warn on disabling clocks with no users Instead of BUG(), warn on disabling clocks with no users. Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/clock.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 72d34a23a2e..2946c193a7d 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -134,9 +134,17 @@ void clk_disable(struct clk *clk) return; spin_lock_irqsave(&clockfw_lock, flags); - BUG_ON(clk->usecount == 0); + if (clk->usecount == 0) { + printk(KERN_ERR "Trying disable clock %s with 0 usecount\n", + clk->name); + WARN_ON(1); + goto out; + } + if (arch_clock->clk_disable) arch_clock->clk_disable(clk); + +out: spin_unlock_irqrestore(&clockfw_lock, flags); } EXPORT_SYMBOL(clk_disable); -- cgit v1.2.3 From 0692f05dffaac5fc7b152f9b83625d3077639eba Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 17 Mar 2008 17:01:10 +0200 Subject: ARM: OMAP: DMA: Fix incorrect channel linking Function enable_lnk does incorrect channel link on non-omap1 builds if chain is created manually with omap_request_dma and omap_dma_link_lch functions. Fix this by making sure that next_linked_ch field is initialized to -1 just in omap_request_dma. Signed-off-by: Jarkko Nikula Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 793740686be..c00eda588cd 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -604,6 +604,7 @@ int omap_request_dma(int dev_id, const char *dev_name, chan->data = data; #ifndef CONFIG_ARCH_OMAP1 chan->chain_id = -1; + chan->next_linked_ch = -1; #endif chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; @@ -1087,7 +1088,6 @@ int omap_request_dma_chain(int dev_id, const char *dev_name, printk(KERN_ERR "omap_dma: Request failed %d\n", err); return err; } - dma_chan[channels[i]].next_linked_ch = -1; dma_chan[channels[i]].prev_linked_ch = -1; dma_chan[channels[i]].state = DMA_CH_NOTSTARTED; -- cgit v1.2.3 From bfbdcf8a14ec4bd0c692bed3ddfa40bd72eae473 Mon Sep 17 00:00:00 2001 From: Hiroshi DOYU Date: Mon, 30 Jul 2007 14:04:04 +0300 Subject: ARM: OMAP: Fix Unbalanced enable for IRQ in omap mailbox Signed-off-by: Hiroshi DOYU Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mailbox.c | 25 +++++++++++++++---------- arch/arm/plat-omap/mailbox.c | 1 - 2 files changed, 15 insertions(+), 11 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index b03cd06e055..4799561c5a9 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -70,6 +70,9 @@ struct omap_mbox2_priv { static struct clk *mbox_ick_handle; +static void omap2_mbox_enable_irq(struct omap_mbox *mbox, + omap_mbox_type_t irq); + static inline unsigned int mbox_read_reg(unsigned int reg) { return __raw_readl(mbox_base + reg); @@ -81,7 +84,7 @@ static inline void mbox_write_reg(unsigned int val, unsigned int reg) } /* Mailbox H/W preparations */ -static inline int omap2_mbox_startup(struct omap_mbox *mbox) +static int omap2_mbox_startup(struct omap_mbox *mbox) { unsigned int l; @@ -97,38 +100,40 @@ static inline int omap2_mbox_startup(struct omap_mbox *mbox) l |= 0x00000011; mbox_write_reg(l, MAILBOX_SYSCONFIG); + omap2_mbox_enable_irq(mbox, IRQ_RX); + return 0; } -static inline void omap2_mbox_shutdown(struct omap_mbox *mbox) +static void omap2_mbox_shutdown(struct omap_mbox *mbox) { clk_disable(mbox_ick_handle); clk_put(mbox_ick_handle); } /* Mailbox FIFO handle functions */ -static inline mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) +static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) { struct omap_mbox2_fifo *fifo = &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; return (mbox_msg_t) mbox_read_reg(fifo->msg); } -static inline void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) +static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) { struct omap_mbox2_fifo *fifo = &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; mbox_write_reg(msg, fifo->msg); } -static inline int omap2_mbox_fifo_empty(struct omap_mbox *mbox) +static int omap2_mbox_fifo_empty(struct omap_mbox *mbox) { struct omap_mbox2_fifo *fifo = &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; return (mbox_read_reg(fifo->msg_stat) == 0); } -static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox) +static int omap2_mbox_fifo_full(struct omap_mbox *mbox) { struct omap_mbox2_fifo *fifo = &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; @@ -136,7 +141,7 @@ static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox) } /* Mailbox IRQ handle functions */ -static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox, +static void omap2_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) { struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; @@ -147,7 +152,7 @@ static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox, mbox_write_reg(l, p->irqenable); } -static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox, +static void omap2_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) { struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; @@ -158,7 +163,7 @@ static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox, mbox_write_reg(l, p->irqenable); } -static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox, +static void omap2_mbox_ack_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) { struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; @@ -167,7 +172,7 @@ static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox, mbox_write_reg(bit, p->irqstatus); } -static inline int omap2_mbox_is_irq(struct omap_mbox *mbox, +static int omap2_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) { struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 1945ddfec18..6f33f58bca4 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c @@ -355,7 +355,6 @@ static int omap_mbox_init(struct omap_mbox *mbox) "failed to register mailbox interrupt:%d\n", ret); goto fail_request_irq; } - enable_mbox_irq(mbox, IRQ_RX); mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work); if (!mq) { -- cgit v1.2.3 From ec44dfa866cc9779b83e9eab9efe6f7d48966eb8 Mon Sep 17 00:00:00 2001 From: Eduardo Valentin Date: Thu, 27 Mar 2008 11:09:42 -0400 Subject: ARM: OMAP: Keymap fix for palmte and palmz71 Keymap fix for palmte and palmz71 Signed-off-by: Eduardo Valentin Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-palmte.c | 2 +- arch/arm/mach-omap1/board-palmz71.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index ca1a4bf78a1..a0b16a7e8a0 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -63,7 +63,7 @@ static const int palmte_keymap[] = { KEY(1, 1, KEY_DOWN), KEY(1, 2, KEY_UP), KEY(1, 3, KEY_RIGHT), - KEY(1, 4, KEY_CENTER), + KEY(1, 4, KEY_ENTER), 0, }; diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 156510777ff..e020c277460 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -65,7 +65,7 @@ static int palmz71_keymap[] = { KEY(1, 1, KEY_DOWN), KEY(1, 2, KEY_UP), KEY(1, 3, KEY_RIGHT), - KEY(1, 4, KEY_CENTER), + KEY(1, 4, KEY_ENTER), KEY(2, 0, KEY_CAMERA), 0, }; -- cgit v1.2.3 From c3aa044aa3c70a24b606b9265cba305717ac131a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jouni=20H=C3=B6gander?= Date: Fri, 28 Mar 2008 14:57:50 +0200 Subject: ARM: OMAP: Fix 34xx to use correct shift values for gpio2-6 fclks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Wrong shift values were used for gpio2-6 fclks (gpt2-6 shift). Signed-off-by: Jouni Högander Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index cf4644a94b9..a7281174c6e 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -2344,7 +2344,7 @@ static struct clk gpio6_fck = { .name = "gpio6_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT6_SHIFT, + .enable_bit = OMAP3430_EN_GPIO6_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2353,7 +2353,7 @@ static struct clk gpio5_fck = { .name = "gpio5_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT5_SHIFT, + .enable_bit = OMAP3430_EN_GPIO5_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2362,7 +2362,7 @@ static struct clk gpio4_fck = { .name = "gpio4_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT4_SHIFT, + .enable_bit = OMAP3430_EN_GPIO4_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2371,7 +2371,7 @@ static struct clk gpio3_fck = { .name = "gpio3_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT3_SHIFT, + .enable_bit = OMAP3430_EN_GPIO3_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2380,7 +2380,7 @@ static struct clk gpio2_fck = { .name = "gpio2_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT2_SHIFT, + .enable_bit = OMAP3430_EN_GPIO2_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; -- cgit v1.2.3 From 31c203d49ca04e042722d764feec0b80c2afb575 Mon Sep 17 00:00:00 2001 From: Hiroshi DOYU Date: Tue, 1 Apr 2008 10:11:22 +0300 Subject: ARM: OMAP: Add fuctional clock enabler for iva2 Add fuctional clock enabler for iva2 Signed-off-by: Hiroshi DOYU Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.h | 5 +++-- arch/arm/mach-omap2/cm-regbits-34xx.h | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index a7281174c6e..3f133a0df08 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -1046,12 +1046,13 @@ static struct clk iva2_ck = { .name = "iva2_ck", .parent = &dpll2_m2_ck, .init = &omap2_init_clksel_parent, + .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), + .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL), .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, .clksel = iva2_clksel, - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | - PARENT_CONTROLS_CLOCK, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, .recalc = &omap2_clksel_recalc, }; diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index 9249129a5f4..3c38395f644 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h @@ -56,6 +56,7 @@ /* CM_FCLKEN_IVA2 */ #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2 (1 << 0) +#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0 /* CM_CLKEN_PLL_IVA2 */ #define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8 -- cgit v1.2.3 From 1971a3900a4fd61643de950248309598c3e23215 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jouni=20H=C3=B6gander?= Date: Mon, 14 Apr 2008 16:06:11 +0300 Subject: ARM: OMAP: PRCM fixes to ssi clock handling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ssi_l4_ick should have PARENT_CONTROLS_CLOCK flag. ST_SSI_STDBY bit in idlest register cannot be used in omap2_clk_wait_ready Signed-off-by: Jouni Högander Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock.c | 4 +++- arch/arm/mach-omap2/clock34xx.h | 3 ++- 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index b57ffb5a22a..ab9fc57d25f 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -205,7 +205,9 @@ static void omap2_clk_wait_ready(struct clk *clk) /* REVISIT: What are the appropriate exclusions for 34XX? */ /* OMAP3: ignore DSS-mod clocks */ if (cpu_is_omap34xx() && - (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0))) + (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0) || + ((((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(CORE_MOD, 0)) && + clk->enable_bit == OMAP3430_EN_SSI_SHIFT))) return; /* Check if both functional and interface clocks diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 3f133a0df08..f8bdcc1e3d3 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -1837,7 +1837,8 @@ static struct clk omapctrl_ick = { static struct clk ssi_l4_ick = { .name = "ssi_l4_ick", .parent = &l4_ick, - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; -- cgit v1.2.3 From d756f54e57a261db39c46f1853b71be85608b15f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?H=C3=B6gander=20Jouni?= Date: Wed, 23 Apr 2008 16:12:19 +0300 Subject: ARM: OMAP: Add PARENT_CONTROLS_CLOCK flag to dpll5_m2_ck This patch removes following message on dpll5_m2_ck enable and disable: clock.c: Enable for dpll5_m2_ck without enable code clock: clk_disable called on independent clock dpll5_m2_ck which has no enable_reg Signed-off-by: Jouni Hogander Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index f8bdcc1e3d3..c9c5972a2e2 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -836,7 +836,8 @@ static struct clk dpll5_m2_ck = { .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), .clksel_mask = OMAP3430ES2_DIV_120M_MASK, .clksel = div16_dpll5_clksel, - .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; -- cgit v1.2.3 From dfa3d039dae89e8e9a7302ebf25370caaf1b62e3 Mon Sep 17 00:00:00 2001 From: Kalle Jokiniemi Date: Tue, 6 May 2008 10:33:01 +0300 Subject: ARM: OMAP: Fixed comments on global PRM register usage Fixed comments on global PRM register usage. Signed-off-by: Kalle Jokiniemi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/prm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index ab7649afd89..618f8111658 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -30,7 +30,7 @@ /* * Architecture-specific global PRM registers - * Use prm_{read,write}_reg() with these registers. + * Use __raw_{read,write}l() with these registers. * * With a few exceptions, these are the register names beginning with * PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the -- cgit v1.2.3 From 5bf6c6e30d8b71d092e8830208e182d84b907fcd Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 9 May 2008 08:56:54 +0100 Subject: [ARM] 5033/1: Unbreak corgi_ssp by registering ssp drivers earlier. A lot of stuff in spitz/akita/etc. depends on corgi_ssp to be initialised early. However corgi_ssp initialisation fails, because at that time pxa*-ssp devices don't have drivers. Move ssp earlier in the makefile so they are registered before corgi-ssp. Also move sleep/suspend and cpu-freq to more logical places Signed-off-by: Dmitry Baryshkov Signed-off-by: Russell King --- arch/arm/mach-pxa/Makefile | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 6a830853aa6..0e6d05bb81a 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -5,6 +5,13 @@ # Common support (must be linked before board specific support) obj-y += clock.o devices.o generic.o irq.o dma.o \ time.o gpio.o +obj-$(CONFIG_PM) += pm.o sleep.o standby.o +obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o + +# Generic drivers that other drivers may depend upon +obj-$(CONFIG_PXA_SSP) += ssp.o + +# SoC-specific code obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa25x.o obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa27x.o obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o @@ -48,11 +55,6 @@ led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o obj-$(CONFIG_LEDS) += $(led-y) -# Misc features -obj-$(CONFIG_PM) += pm.o sleep.o standby.o -obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o -obj-$(CONFIG_PXA_SSP) += ssp.o - ifeq ($(CONFIG_PCI),y) obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o endif -- cgit v1.2.3 From 90898709dfca860d9550c85f0924007f4c0467ea Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Wed, 14 May 2008 16:05:38 -0700 Subject: atmel_lcdfb: fix initialization of a pre-allocated framebuffer Fix initialization of framebuffer not calling ioremap_writecombine() function and not using internal SRAM for at91sam9rl. This is a little rework of the "Don't initialize a pre-allocated framebuffer" patch that corrects the call to ioremap_writecombine() function. It also cuts the use of internal SRAM for at91sam9rl : it is a bit small for a framebuffer. Signed-off-by: Nicolas Ferre Cc: Andrew Victor Cc: Haavard Skinnemoen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/arm/mach-at91/at91sam9261_devices.c | 4 ++-- arch/arm/mach-at91/at91sam9rl_devices.c | 21 --------------------- 2 files changed, 2 insertions(+), 23 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 728bb8f3944..0babb645b83 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -544,10 +544,10 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) struct resource *fb_res = &lcdc_resources[2]; size_t fb_len = fb_res->end - fb_res->start + 1; - fb = ioremap_writecombine(fb_res->start, fb_len); + fb = ioremap(fb_res->start, fb_len); if (fb) { memset(fb, 0, fb_len); - iounmap(fb, fb_len); + iounmap(fb); } } lcdc_data = *data; diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 054689804e7..450db304936 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -332,13 +332,6 @@ static struct resource lcdc_resources[] = { .end = AT91SAM9RL_ID_LCDC, .flags = IORESOURCE_IRQ, }, -#if defined(CONFIG_FB_INTSRAM) - [2] = { - .start = AT91SAM9RL_SRAM_BASE, - .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -#endif }; static struct platform_device at91_lcdc_device = { @@ -381,20 +374,6 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ -#ifdef CONFIG_FB_INTSRAM - { - void __iomem *fb; - struct resource *fb_res = &lcdc_resources[2]; - size_t fb_len = fb_res->end - fb_res->start + 1; - - fb = ioremap_writecombine(fb_res->start, fb_len); - if (fb) { - memset(fb, 0, fb_len); - iounmap(fb, fb_len); - } - } -#endif - lcdc_data = *data; platform_device_register(&at91_lcdc_device); } -- cgit v1.2.3 From f52111b1546943545e67573c4dde1c7613ca33d3 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Thu, 8 May 2008 18:19:16 -0400 Subject: [PATCH] take init_files to fs/file.c Signed-off-by: Al Viro --- arch/arm/kernel/init_task.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/init_task.c b/arch/arm/kernel/init_task.c index bd4ef53bc6b..8b8c9d38a76 100644 --- a/arch/arm/kernel/init_task.c +++ b/arch/arm/kernel/init_task.c @@ -13,7 +13,6 @@ #include static struct fs_struct init_fs = INIT_FS; -static struct files_struct init_files = INIT_FILES; static struct signal_struct init_signals = INIT_SIGNALS(init_signals); static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); struct mm_struct init_mm = INIT_MM(init_mm); -- cgit v1.2.3 From 2a52efb2cecf78201d61bd4930153bf52e57503b Mon Sep 17 00:00:00 2001 From: Thomas Kunze Date: Tue, 29 Apr 2008 17:44:54 +0100 Subject: [ARM] 5026/1: locomo: add .settype for gpio and several small fixes irqs.h: * rename IRQ_LOCOMO_SPI_OVRN to IRQ_LOCOMO_SPI_REND locomo.h: * add some definition for locomo spi controller * correct some errors locomo.c: * correct some errors * add set_type for locomo gpio irq chip Signed-off-by: Thomas Kunze Signed-off-by: Russell King --- arch/arm/common/locomo.c | 66 +++++++++++++++++++++++++++++++++++------------- 1 file changed, 48 insertions(+), 18 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index ae21755872e..d973c986f72 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -321,11 +321,42 @@ static void locomo_gpio_unmask_irq(unsigned int irq) locomo_writel(r, mapbase + LOCOMO_GIE); } +static int GPIO_IRQ_rising_edge; +static int GPIO_IRQ_falling_edge; + +static int locomo_gpio_type(unsigned int irq, unsigned int type) +{ + unsigned int mask; + void __iomem *mapbase = get_irq_chip_data(irq); + + mask = 1 << (irq - LOCOMO_IRQ_GPIO_START); + + if (type == IRQT_PROBE) { + if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) + return 0; + type = __IRQT_RISEDGE | __IRQT_FALEDGE; + } + + if (type & __IRQT_RISEDGE) + GPIO_IRQ_rising_edge |= mask; + else + GPIO_IRQ_rising_edge &= ~mask; + if (type & __IRQT_FALEDGE) + GPIO_IRQ_falling_edge |= mask; + else + GPIO_IRQ_falling_edge &= ~mask; + locomo_writel(GPIO_IRQ_rising_edge, mapbase + LOCOMO_GRIE); + locomo_writel(GPIO_IRQ_falling_edge, mapbase + LOCOMO_GFIE); + + return 0; +} + static struct irq_chip locomo_gpio_chip = { - .name = "LOCOMO-gpio", - .ack = locomo_gpio_ack_irq, - .mask = locomo_gpio_mask_irq, - .unmask = locomo_gpio_unmask_irq, + .name = "LOCOMO-gpio", + .ack = locomo_gpio_ack_irq, + .mask = locomo_gpio_mask_irq, + .unmask = locomo_gpio_unmask_irq, + .set_type = locomo_gpio_type, }; static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc) @@ -450,22 +481,18 @@ static void locomo_setup_irq(struct locomo *lchip) set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip); set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase); set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler); - set_irq_flags(IRQ_LOCOMO_KEY_BASE, IRQF_VALID | IRQF_PROBE); set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip); set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase); set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler); - set_irq_flags(IRQ_LOCOMO_GPIO_BASE, IRQF_VALID | IRQF_PROBE); set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip); set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase); set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler); - set_irq_flags(IRQ_LOCOMO_LT_BASE, IRQF_VALID | IRQF_PROBE); set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip); set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase); set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler); - set_irq_flags(IRQ_LOCOMO_SPI_BASE, IRQF_VALID | IRQF_PROBE); /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */ set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip); @@ -488,7 +515,7 @@ static void locomo_setup_irq(struct locomo *lchip) set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE); /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */ - for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 3; irq++) { + for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 4; irq++) { set_irq_chip(irq, &locomo_spi_chip); set_irq_chip_data(irq, irqbase); set_irq_handler(irq, handle_edge_irq); @@ -574,20 +601,20 @@ static int locomo_suspend(struct platform_device *dev, pm_message_t state) save->LCM_GPO = locomo_readl(lchip->base + LOCOMO_GPO); /* GPIO */ locomo_writel(0x00, lchip->base + LOCOMO_GPO); - save->LCM_SPICT = locomo_readl(lchip->base + LOCOMO_SPICT); /* SPI */ + save->LCM_SPICT = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPICT); /* SPI */ locomo_writel(0x40, lchip->base + LOCOMO_SPICT); save->LCM_GPE = locomo_readl(lchip->base + LOCOMO_GPE); /* GPIO */ locomo_writel(0x00, lchip->base + LOCOMO_GPE); save->LCM_ASD = locomo_readl(lchip->base + LOCOMO_ASD); /* ADSTART */ locomo_writel(0x00, lchip->base + LOCOMO_ASD); - save->LCM_SPIMD = locomo_readl(lchip->base + LOCOMO_SPIMD); /* SPI */ - locomo_writel(0x3C14, lchip->base + LOCOMO_SPIMD); + save->LCM_SPIMD = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPIMD); /* SPI */ + locomo_writel(0x3C14, lchip->base + LOCOMO_SPI + LOCOMO_SPIMD); locomo_writel(0x00, lchip->base + LOCOMO_PAIF); locomo_writel(0x00, lchip->base + LOCOMO_DAC); locomo_writel(0x00, lchip->base + LOCOMO_BACKLIGHT + LOCOMO_TC); - if ( (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT0) & 0x88) && (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT1) & 0x88) ) + if ((locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT0) & 0x88) && (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT1) & 0x88)) locomo_writel(0x00, lchip->base + LOCOMO_C32K); /* CLK32 off */ else /* 18MHz already enabled, so no wait */ @@ -616,10 +643,10 @@ static int locomo_resume(struct platform_device *dev) spin_lock_irqsave(&lchip->lock, flags); locomo_writel(save->LCM_GPO, lchip->base + LOCOMO_GPO); - locomo_writel(save->LCM_SPICT, lchip->base + LOCOMO_SPICT); + locomo_writel(save->LCM_SPICT, lchip->base + LOCOMO_SPI + LOCOMO_SPICT); locomo_writel(save->LCM_GPE, lchip->base + LOCOMO_GPE); locomo_writel(save->LCM_ASD, lchip->base + LOCOMO_ASD); - locomo_writel(save->LCM_SPIMD, lchip->base + LOCOMO_SPIMD); + locomo_writel(save->LCM_SPIMD, lchip->base + LOCOMO_SPI + LOCOMO_SPIMD); locomo_writel(0x00, lchip->base + LOCOMO_C32K); locomo_writel(0x90, lchip->base + LOCOMO_TADC); @@ -688,9 +715,9 @@ __locomo_probe(struct device *me, struct resource *mem, int irq) /* GPIO */ locomo_writel(0, lchip->base + LOCOMO_GPO); - locomo_writel( (LOCOMO_GPIO(2) | LOCOMO_GPIO(3) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) + locomo_writel((LOCOMO_GPIO(1) | LOCOMO_GPIO(2) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) , lchip->base + LOCOMO_GPE); - locomo_writel( (LOCOMO_GPIO(2) | LOCOMO_GPIO(3) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) + locomo_writel((LOCOMO_GPIO(1) | LOCOMO_GPIO(2) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) , lchip->base + LOCOMO_GPD); locomo_writel(0, lchip->base + LOCOMO_GIE); @@ -833,7 +860,10 @@ void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir spin_lock_irqsave(&lchip->lock, flags); r = locomo_readl(lchip->base + LOCOMO_GPD); - r &= ~bits; + if (dir) + r |= bits; + else + r &= ~bits; locomo_writel(r, lchip->base + LOCOMO_GPD); r = locomo_readl(lchip->base + LOCOMO_GPE); -- cgit v1.2.3 From db2c4392907524fa376ffbd04f5781d6394e2666 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 11 May 2008 22:36:03 +0100 Subject: [ARM] export copy_page Martin Michlmayr reported that fuse complains: ERROR: "copy_page" [fs/fuse/fuse.ko] undefined! so export the needed function. Signed-off-by: Russell King --- arch/arm/kernel/armksyms.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index f73d62e8ab6..688b7b1ee41 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -179,3 +179,5 @@ EXPORT_SYMBOL(_find_next_zero_bit_be); EXPORT_SYMBOL(_find_first_bit_be); EXPORT_SYMBOL(_find_next_bit_be); #endif + +EXPORT_SYMBOL(copy_page); -- cgit v1.2.3 From b3a8b751c1c2997653c6bf2b5d10467c39f3cc6e Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 10 May 2008 21:05:31 +0100 Subject: [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode The CPU's dma_flush_range() operation needs to clean+invalidate the given memory area if the cache is in writeback mode, or do just the invalidate part if the cache is in writethrough mode, but the current proc-arm{925,926,940,946} (incorrectly) do a cache clean in the latter case. This patch fixes that. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/mm/proc-arm925.S | 2 +- arch/arm/mm/proc-arm926.S | 2 +- arch/arm/mm/proc-arm940.S | 2 +- arch/arm/mm/proc-arm946.S | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 065087afb77..d045812f339 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S @@ -332,7 +332,7 @@ ENTRY(arm925_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry #else - mcr p15, 0, r0, c7, c10, 1 @ clean D entry + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry #endif add r0, r0, #CACHE_DLINESIZE cmp r0, r1 diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 997db8472b5..4cd33169a7c 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S @@ -295,7 +295,7 @@ ENTRY(arm926_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry #else - mcr p15, 0, r0, c7, c10, 1 @ clean D entry + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry #endif add r0, r0, #CACHE_DLINESIZE cmp r0, r1 diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index 44ead902bd5..1a3d63df8e9 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S @@ -222,7 +222,7 @@ ENTRY(arm940_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r3, c7, c14, 2 @ clean/flush D entry #else - mcr p15, 0, r3, c7, c10, 2 @ clean D entry + mcr p15, 0, r3, c7, c6, 2 @ invalidate D entry #endif subs r3, r3, #1 << 26 bcs 2b @ entries 63 to 0 diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 2218b0c0133..82d579ac9b9 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S @@ -265,7 +265,7 @@ ENTRY(arm946_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry #else - mcr p15, 0, r0, c7, c10, 1 @ clean D entry + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry #endif add r0, r0, #CACHE_DLINESIZE cmp r0, r1 -- cgit v1.2.3 From bbdf1c1e58f215940243bedc235e48ed7e8d6f2d Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 15 May 2008 10:31:14 +0100 Subject: [ARM] 5037/1: Orion: fix DNS323/Kurobox Pro PCI initialisation Whereas most Orion 5x machine support code would initialise the PCI subsystem with nr_controllers in their struct hw_pci set to 2, the DNS323 and Kurobox Pro machine support code had nr_controllers set to 1. This was presumably done because on those two machines, the PCI(-X) controller (nr == 1) isn't used, requiring initialisation of only the PCIe controller (nr == 0.) However, not initialising the PCI(-X) controller on boards that don't use it leads to a situation where both the PCIe and the PCI(-X) controller think that their root bus is zero, and it messes up IRQ assignment. This patch changes the DNS323 and Kurobox Pro support code to always use nr_controllers == 2. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/mach-orion5x/dns323-setup.c | 2 +- arch/arm/mach-orion5x/kurobox_pro-setup.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index f9430f5ca9a..27ce967ab9e 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -58,7 +58,7 @@ static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) } static struct hw_pci dns323_pci __initdata = { - .nr_controllers = 1, + .nr_controllers = 2, .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index 88410862fee..f5074b877b7 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -138,7 +138,7 @@ static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) } static struct hw_pci kurobox_pro_pci __initdata = { - .nr_controllers = 1, + .nr_controllers = 2, .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, -- cgit v1.2.3 From 7cc09c248f4e286a153b5068a30b3fa857f5ce71 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Mon, 31 Mar 2008 12:08:16 +0300 Subject: [ARM] arm/kernel/arthur.c: add MODULE_LICENSE This patch adds the missing MODULE_LICENSE("GPL"). Signed-off-by: Adrian Bunk Signed-off-by: Russell King --- arch/arm/kernel/arthur.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/kernel/arthur.c b/arch/arm/kernel/arthur.c index 0ee2e981963..321c5291d05 100644 --- a/arch/arm/kernel/arthur.c +++ b/arch/arm/kernel/arthur.c @@ -90,3 +90,5 @@ static void __exit arthur_exit(void) module_init(arthur_init); module_exit(arthur_exit); + +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From d0afc85f15deda94abdfe9118ac225c4208d5897 Mon Sep 17 00:00:00 2001 From: Michael Abbott Date: Wed, 14 May 2008 16:29:24 -0700 Subject: [ARM] colibri: fix support for DM9000 ethernet device Two changes are necessary to enable proper operation of the DM9000 device with the Colibri PXA 270 board: firstly, the IRQ type needs to be configured for rising edge interrupts, and secondly this configuration needs to be communicated through to the DM9000. [akpm@linux-foundation.org: remove set_irq_type() call as per ben-linux request] Signed-off-by: Michael Abbott Cc: Daniel Mack Cc: Jeff Garzik Cc: Ben Dooks Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/mach-pxa/colibri.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c index 43bf5a183e9..574839d7c13 100644 --- a/arch/arm/mach-pxa/colibri.c +++ b/arch/arm/mach-pxa/colibri.c @@ -98,7 +98,7 @@ static struct resource dm9000_resources[] = { [2] = { .start = COLIBRI_ETH_IRQ, .end = COLIBRI_ETH_IRQ, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, }, }; @@ -119,7 +119,6 @@ static void __init colibri_init(void) /* DM9000 LAN */ pxa_gpio_mode(GPIO78_nCS_2_MD); pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); - set_irq_type(COLIBRI_ETH_IRQ, IRQT_FALLING); platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); } -- cgit v1.2.3 From 53491e042e79578765e2d33512a45d50eb0d8801 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 17 May 2008 22:51:35 +0100 Subject: [ARM] pxa: spitz wants PXA27x UDC definitions ... so include the header file. Signed-off-by: Russell King --- arch/arm/mach-pxa/spitz.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index e7d0fcd9b43..dace3820f1e 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3 From 864d0ec9db9c0c18b79cebb9d8b7ac75c3b70571 Mon Sep 17 00:00:00 2001 From: Thomas Kunze Date: Mon, 19 May 2008 22:06:51 +0100 Subject: [ARM] 5025/2: fix collie cpu initialisation collie.h: * add some meaningfull names to some gpios collie.c: * initialize cpu registers correctly Signed-off-by: Thomas Kunze Signed-off-by: Russell King --- arch/arm/mach-sa1100/collie.c | 42 ++++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 20 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index 6496eb645ce..2f772a3965c 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c @@ -225,26 +225,28 @@ static void __init collie_init(void) int ret = 0; /* cpu initialize */ - GAFR = ( GPIO_SSP_TXD | \ - GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SSP_CLK | GPIO_TIC_ACK | \ - GPIO_32_768kHz ); - - GPDR = ( GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | \ - GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD | \ - GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK | \ - GPIO_SDLC_AAF | GPIO_UART_SCLK1 | GPIO_32_768kHz ); - GPLR = GPIO_GPIO18; - - // PPC pin setting - PPDR = ( PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 | \ - PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | \ - PPC_TXD1 | PPC_TXD2 | PPC_RXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM ); - - PSDR = ( PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4 ); - - GAFR |= GPIO_32_768kHz; - GPDR |= GPIO_32_768kHz; - TUCR = TUCR_32_768kHz; + GAFR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SSP_CLK | + GPIO_MCP_CLK | GPIO_32_768kHz; + + GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | + GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD | + GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK | + COLLIE_GPIO_UCB1x00_RESET | COLLIE_GPIO_nMIC_ON | + COLLIE_GPIO_nREMOCON_ON | GPIO_32_768kHz; + + PPDR = PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 | + PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | + PPC_TXD1 | PPC_TXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM; + + PWER = COLLIE_GPIO_AC_IN | COLLIE_GPIO_CO | COLLIE_GPIO_ON_KEY | + COLLIE_GPIO_WAKEUP | COLLIE_GPIO_nREMOCON_INT | PWER_RTC; + + PGSR = COLLIE_GPIO_nREMOCON_ON; + + PSDR = PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4; + + PCFR = PCFR_OPDE; + platform_scoop_config = &collie_pcmcia_config; -- cgit v1.2.3 From 59d83db559315bb75aea849ee773f571ddcc3574 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 19 May 2008 05:20:56 +0100 Subject: [ARM] 5038/1: ARM: OMAP: Remove tsc2102 references from board-palmte.c As noted by Russell King. These depend on tsc210x drivers getting integrated first. Signed-off-by: Tony Lindgren Signed-off-by: Russell King --- arch/arm/mach-omap1/board-palmte.c | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index a0b16a7e8a0..a4d20127a60 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include @@ -315,14 +314,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery) #define palmte_get_power_status NULL #endif -static struct tsc2102_config palmte_tsc2102_config = { - .use_internal = 0, - .monitor = TSC_BAT1 | TSC_AUX | TSC_TEMP, - .temp_at25c = { 2200, 2615 }, - .apm_report = palmte_get_power_status, - .alsa_config = &palmte_alsa_config, -}; - static struct omap_board_config_kernel palmte_config[] __initdata = { { OMAP_TAG_USB, &palmte_usb_config }, { OMAP_TAG_MMC, &palmte_mmc_config }, @@ -336,7 +327,6 @@ static struct spi_board_info palmte_spi_info[] __initdata = { .bus_num = 2, /* uWire (officially) */ .chip_select = 0, /* As opposed to 3 */ .irq = OMAP_GPIO_IRQ(PALMTE_PINTDAV_GPIO), - .platform_data = &palmte_tsc2102_config, .max_speed_hz = 8000000, }, }; -- cgit v1.2.3 From ace94f9efb8ad2c21b308b3bdf02db984d8b3c5f Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 21 May 2008 10:24:46 +0100 Subject: [ARM] 5040/1: BAST: Fix DM9000 IRQ flags initialisation Add the IRQF_TRIGGER_ type to the DM9000 IRQ resource to stop the driver itself complaining it was not given any flags to use. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/mach-bast.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 661a2358ac2..27f63d5d3a7 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -374,7 +374,7 @@ static struct resource bast_dm9k_resource[] = { [2] = { .start = IRQ_DM9000, .end = IRQ_DM9000, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, } }; -- cgit v1.2.3 From e142848300b1a13d59a6e5fff8c914096d3830fb Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 21 May 2008 10:25:01 +0100 Subject: [ARM] 5041/1: VR1000: Fix DM9000 IRQ flags initialisation Add the IRQF_TRIGGER_ type to the DM9000 IRQ resource to stop the driver itself complaining it was not given any flags to use. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/mach-vr1000.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index c56423373ff..4c4b5c4207c 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -263,7 +263,7 @@ static struct resource vr1000_dm9k0_resource[] = { [2] = { .start = IRQ_VR1000_DM9000A, .end = IRQ_VR1000_DM9000A, - .flags = IORESOURCE_IRQ + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, } }; @@ -282,7 +282,7 @@ static struct resource vr1000_dm9k1_resource[] = { [2] = { .start = IRQ_VR1000_DM9000N, .end = IRQ_VR1000_DM9000N, - .flags = IORESOURCE_IRQ + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, } }; -- cgit v1.2.3 From 90239bbd598c6a0fc7f2c7352e9886bd3be968d0 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 21 May 2008 10:24:17 +0100 Subject: [ARM] 5039/1: S3C244X: Rename SDI device if running on S3C244X. Rename the SDI device if on an S3C2440 or S3C2442. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/plat-s3c24xx/s3c244x.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c index f197bb3a236..2f01af5f64c 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/plat-s3c24xx/s3c244x.c @@ -65,6 +65,7 @@ void __init s3c244x_map_io(struct map_desc *mach_desc, int size) /* rename any peripherals used differing from the s3c2410 */ + s3c_device_sdi.name = "s3c2440-sdi"; s3c_device_i2c.name = "s3c2440-i2c"; s3c_device_nand.name = "s3c2440-nand"; s3c_device_usbgadget.name = "s3c2440-usbgadget"; -- cgit v1.2.3 From b851cb289d905ea04e5f0b518bf3f28407a72118 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 22 May 2008 16:38:50 +0100 Subject: [ARM] omap: fix omap clk support build errors arch/arm/plat-omap/clock.c:397: warning: "struct cpufreq_frequency_table" declared inside parameter list arch/arm/plat-omap/clock.c:397: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/plat-omap/clock.c: In function `clk_init_cpufreq_table': arch/arm/plat-omap/clock.c:402: error: structure has no member named `clk_init_cpufreq_table' arch/arm/plat-omap/clock.c:403: error: structure has no member named `clk_init_cpufreq_table' Signed-off-by: Russell King --- arch/arm/plat-omap/clock.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 2946c193a7d..2db5580048d 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -21,6 +21,7 @@ #include #include #include +#include #include -- cgit v1.2.3 From 66aaeff1c27545909e502546120be2c5432394e3 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 23 May 2008 08:26:24 +0100 Subject: [ARM] 5052/1: export clock functions for the at91x40 Export the AT91 clock functions for the AT91X40. Some external code common to all AT91 family parts relys on this, like the gpio and serial support. Signed-off-by: Greg Ungerer Signed-off-by: Russell King --- arch/arm/mach-at91/at91x40.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index 1de121fc55f..f44647738ee 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c @@ -16,16 +16,32 @@ #include #include #include +#include #include "generic.h" /* - * This is used in the gpio code, stub locally. + * Export the clock functions for the AT91X40. Some external code common + * to all AT91 family parts relys on this, like the gpio and serial support. */ int clk_enable(struct clk *clk) { return 0; } +void clk_disable(struct clk *clk) +{ +} + +unsigned long clk_get_rate(struct clk *clk) +{ + return AT91X40_MASTER_CLOCK; +} + +struct clk *clk_get(struct device *dev, const char *id) +{ + return NULL; +} + void __init at91x40_initialize(unsigned long main_clock) { at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) -- cgit v1.2.3 From 2a740d7a64807acaceb7e44ccf50df35107a34ab Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 23 May 2008 13:53:31 +0100 Subject: Revert "[ARM] pxa: spitz wants PXA27x UDC definitions" This reverts commit 53491e042e79578765e2d33512a45d50eb0d8801, which hit the kernel tree too early. Signed-off-by: Russell King --- arch/arm/mach-pxa/spitz.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index dace3820f1e..e7d0fcd9b43 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.3 From 7c28472a5d4ecf7c61b3c3901994be878cd6c5d2 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 23 May 2008 19:35:52 +0100 Subject: [ARM] integrator: fix build warnings and errors Fix resource_size_t warning in impd1.c, and printascii() build errors in pci_v3.c Signed-off-by: Russell King --- arch/arm/mach-integrator/impd1.c | 3 ++- arch/arm/mach-integrator/pci_v3.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index 92d79fb3931..62e653a3ea1 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c @@ -369,7 +369,8 @@ static int impd1_probe(struct lm_device *dev) lm_set_drvdata(dev, impd1); - printk("IM-PD1 found at 0x%08lx\n", dev->resource.start); + printk("IM-PD1 found at 0x%08lx\n", + (unsigned long)dev->resource.start); for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) { impd1->vcos[i].owner = THIS_MODULE, diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index d55fa4e9bb4..c07f497000c 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -405,7 +405,6 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) addr, fsr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255, v3_readb(V3_LB_ISTAT)); printk(KERN_DEBUG "%s", buf); - printascii(buf); #endif v3_writeb(V3_LB_ISTAT, 0); @@ -447,6 +446,7 @@ static irqreturn_t v3_irq(int dummy, void *devid) unsigned long pc = instruction_pointer(regs); unsigned long instr = *(unsigned long *)pc; char buf[128]; + extern void printascii(const char *); sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x " "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr, -- cgit v1.2.3 From 6d2545738a7c6ad1831d84ecc6483ea21c327bf4 Mon Sep 17 00:00:00 2001 From: eric miao Date: Mon, 26 May 2008 03:23:14 +0100 Subject: [ARM] 5062/1: pxa: remove unused definition of CONFIG_ARCH_COTULLA_IDP Signed-off-by: Eric Miao Signed-off-by: Russell King --- arch/arm/boot/compressed/head-xscale.S | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/compressed/head-xscale.S b/arch/arm/boot/compressed/head-xscale.S index 67ea99ef652..dd3fbd6766e 100644 --- a/arch/arm/boot/compressed/head-xscale.S +++ b/arch/arm/boot/compressed/head-xscale.S @@ -33,10 +33,6 @@ __XScale_start: bic r0, r0, #0x1000 @ clear Icache mcr p15, 0, r0, c1, c0, 0 -#ifdef CONFIG_ARCH_COTULLA_IDP - mov r7, #MACH_TYPE_COTULLA_IDP -#endif - #ifdef CONFIG_ARCH_IXP2000 mov r1, #-1 mov r0, #0xd6000000 -- cgit v1.2.3 From b095723526cb80494bd5a13de0e5078f8846866a Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Mon, 2 Jun 2008 12:58:24 +0100 Subject: [ARM] 5065/2: CM-X270: Fix DM9000 IRQ flags initialisation Add the IORESOURCE_IRQ_HIGHEDGE to the DM9000 IRQ resource to stop the driver itself complaining it was not given any flags to use. Signed-off-by: Mike Rapoport Acked-by: Eric Miao Signed-off-by: Russell King --- arch/arm/mach-pxa/cm-x270.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index 6d4416a4f37..f5851d1adc2 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c @@ -59,7 +59,7 @@ static struct resource cmx270_dm9k_resource[] = { [2] = { .start = CMX270_ETHIRQ, .end = CMX270_ETHIRQ, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } }; -- cgit v1.2.3 From 31ab3ffb2b20cda79684a0b3a4265fd7170cdacc Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Mon, 2 Jun 2008 12:58:23 +0100 Subject: [ARM] 5066/2: EM-X270: Fix DM9000 IRQ flags initialisation Add the IORESOURCE_IRQ_HIGHEDGE to the DM9000 IRQ resource to stop the driver itself complaining it was not given any flags to use. Signed-off-by: Mike Rapoport Acked-by: Eric Miao Signed-off-by: Russell King --- arch/arm/mach-pxa/em-x270.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index edc4f07a230..9c57700ee5c 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -50,7 +50,7 @@ static struct resource em_x270_dm9k_resource[] = { [2] = { .start = EM_X270_ETHIRQ, .end = EM_X270_ETHIRQ, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } }; -- cgit v1.2.3 From 0ef2cfc0ca4625424e5b8ead6c47359c35a7a841 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 2 Jun 2008 20:38:15 +0100 Subject: [ARM] pxa: fix tosa.c build error Work around: arch/arm/mach-pxa/tosa.c: In function `tosa_poweroff': arch/arm/mach-pxa/tosa.c:470: error: `GPIO_OUT' undeclared (first use in this function) arch/arm/mach-pxa/tosa.c:470: error: (Each undeclared identifier is reported only once arch/arm/mach-pxa/tosa.c:470: error: for each function it appears in.) The proper fix exists in the PXA branch of my kernel git tree, which will be pushed during the next merge window. Signed-off-by: Russell King --- arch/arm/mach-pxa/tosa.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index c2cbd66db81..ab4a9f57991 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -467,8 +467,8 @@ static struct platform_device *devices[] __initdata = { static void tosa_poweroff(void) { - pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT); - GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET); + gpio_direction_output(TOSA_GPIO_ON_RESET, 0); + gpio_set_value(TOSA_GPIO_ON_RESET, 1); mdelay(1000); arm_machine_restart('h'); -- cgit v1.2.3 From 66c23551b1b774e2be3c7bdf91c0ebf2c7a3519e Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Tue, 13 May 2008 13:26:03 +0300 Subject: ARM: OMAP: DMA: Don't mark channel active in omap_enable_channel_irq Channel should be marked active only when DMA is really started. Otherwise just omap_request_dma, omap_dma_link_lch and omap_dma_unlink_lch will cause incorrect dump_stack(). Signed-off-by: Jarkko Nikula Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/dma.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index c00eda588cd..39c637b0ffe 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -501,8 +501,6 @@ static inline void omap_enable_channel_irq(int lch) /* Enable some nice interrupts. */ OMAP_DMA_CICR_REG(lch) = dma_chan[lch].enabled_irqs; - - dma_chan[lch].flags |= OMAP_DMA_ACTIVE; } static void omap_disable_channel_irq(int lch) -- cgit v1.2.3 From 15e02a3b510aa4ef3d077ebc25eb3cd08b9af034 Mon Sep 17 00:00:00 2001 From: Thara Gopinath Date: Mon, 28 Apr 2008 16:55:01 +0530 Subject: ARM: OMAP: Correcting the gpmc prefetch control register address Correcting the GPMC_PREFETCH_CONTROL register address Signed-off-by: Thara Gopinath Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 02cede295e8..dbf68dc50ae 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -42,7 +42,7 @@ #define GPMC_STATUS 0x54 #define GPMC_PREFETCH_CONFIG1 0x1e0 #define GPMC_PREFETCH_CONFIG2 0x1e4 -#define GPMC_PREFETCH_CONTROL 0x1e8 +#define GPMC_PREFETCH_CONTROL 0x1ec #define GPMC_PREFETCH_STATUS 0x1f0 #define GPMC_ECC_CONFIG 0x1f4 #define GPMC_ECC_CONTROL 0x1f8 -- cgit v1.2.3 From a4aff2233786640c10b178ad78d4dd7e375f1955 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Thu, 5 Jun 2008 10:43:14 +0100 Subject: [ARM] 5077/1: spi: fix list scan success verification in PXA ssp driver The list search success check in arch/arm/mach-pxa/ssp.c is wrong: for example, it didn't recognise failure for me when I requested port 0. Signed-off-by: Guennadi Liakhovetski Acked-by: Eric Miao Signed-off-by: Russell King --- arch/arm/mach-pxa/ssp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 00af7f2fed6..0bb31982fb6 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c @@ -330,7 +330,7 @@ struct ssp_device *ssp_request(int port, const char *label) mutex_unlock(&ssp_lock); - if (ssp->port_id != port) + if (&ssp->node == &ssp_list) return NULL; return ssp; -- cgit v1.2.3 From fc6e14f4fb50bc734d08e65eb8a5798d54a2ad77 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 22 Jun 2008 15:41:30 +0100 Subject: [ARM] Export dma_sync_sg_for_device() Noticed by Martin Michlmayr, this missing export prevents IEEE1394 from building with: ERROR: "dma_sync_sg_for_device" [drivers/ieee1394/ieee1394.ko] undefined! Signed-off-by: Russell King --- arch/arm/common/dmabounce.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 52fc6a88328..2744673314b 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c @@ -650,7 +650,8 @@ EXPORT_SYMBOL(dma_map_sg); EXPORT_SYMBOL(dma_unmap_sg); EXPORT_SYMBOL(dma_sync_single_for_cpu); EXPORT_SYMBOL(dma_sync_single_for_device); -EXPORT_SYMBOL(dma_sync_sg); +EXPORT_SYMBOL(dma_sync_sg_for_cpu); +EXPORT_SYMBOL(dma_sync_sg_for_device); EXPORT_SYMBOL(dmabounce_register_dev); EXPORT_SYMBOL(dmabounce_unregister_dev); -- cgit v1.2.3 From 08383ef29faa7fa247962e6b8662c8683e34da01 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Fri, 27 Jun 2008 15:15:12 +0100 Subject: [ARM] 5131/1: Annotate platform_secondary_init with trace_hardirqs_off This patch annotates the platform_secondary_init function in arch/arm/mach-realview/platsmp.c with trace_hardirqs_off to avoid a warning when LOCKDEP and TRACE_IRQFLAGS are enabled. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/mach-realview/platsmp.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index 3e57428affe..8e813ed5751 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -74,6 +74,8 @@ static DEFINE_SPINLOCK(boot_lock); void __cpuinit platform_secondary_init(unsigned int cpu) { + trace_hardirqs_off(); + /* * the primary core may have used a "cross call" soft interrupt * to get this processor out of WFI in the BootMonitor - make -- cgit v1.2.3