From 07aa7be5708afb3d9afa68f6f853c98e51bc64b3 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 13 Aug 2008 16:16:11 +0800 Subject: Blackfin arch: convert L2 defines to be the same as the L1 defines Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/kernel/cplb-nompu/cplbinit.c | 6 +----- arch/blackfin/kernel/setup.c | 14 +++++++------- arch/blackfin/kernel/traps.c | 2 +- arch/blackfin/kernel/vmlinux.lds.S | 10 ++++------ 4 files changed, 13 insertions(+), 19 deletions(-) (limited to 'arch/blackfin/kernel') diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 224e7cc30bc..728f708d398 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c @@ -164,17 +164,13 @@ static struct cplb_desc cplb_data[] = { .name = "Asynchronous Memory Banks", }, { -#ifdef L2_START .start = L2_START, .end = L2_START + L2_LENGTH, .psize = SIZE_1M, .attr = SWITCH_T | I_CPLB | D_CPLB, .i_conf = L2_MEMORY, .d_conf = L2_MEMORY, - .valid = 1, -#else - .valid = 0, -#endif + .valid = (L2_LENGTH > 0), .name = "L2 Memory", }, { diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 15967e7578c..936c06d820d 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -131,14 +131,14 @@ void __init bf53x_relocate_l1_mem(void) dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length + l1_data_a_length, l1_data_b_length); -#ifdef L2_LENGTH - l2_length = _ebss_l2 - _stext_l2; - if (l2_length > L2_LENGTH) - panic("L2 SRAM Overflow\n"); + if (L2_LENGTH != 0) { + l2_length = _ebss_l2 - _stext_l2; + if (l2_length > L2_LENGTH) + panic("L2 SRAM Overflow\n"); - /* Copy _stext_l2 to _edata_l2 to L2 SRAM */ - dma_memcpy(_stext_l2, _l2_lma_start, l2_length); -#endif + /* Copy _stext_l2 to _edata_l2 to L2 SRAM */ + dma_memcpy(_stext_l2, _l2_lma_start, l2_length); + } } /* add_memory_region to memmap */ diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c index ad922ab9154..62a47d67d87 100644 --- a/arch/blackfin/kernel/traps.c +++ b/arch/blackfin/kernel/traps.c @@ -567,7 +567,7 @@ bool get_instruction(unsigned short *val, unsigned short *address) * we don't read something in the async space that can hang forever */ if ((addr >= FIXED_CODE_START && (addr + 2) <= physical_mem_end) || -#ifdef L2_START +#if L2_LENGTH != 0 (addr >= L2_START && (addr + 2) <= (L2_START + L2_LENGTH)) || #endif (addr >= BOOT_ROM_START && (addr + 2) <= (BOOT_ROM_START + BOOT_ROM_LENGTH)) || diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S index d062597e621..7d12c6692a6 100644 --- a/arch/blackfin/kernel/vmlinux.lds.S +++ b/arch/blackfin/kernel/vmlinux.lds.S @@ -102,7 +102,7 @@ SECTIONS #if !L1_DATA_B_LENGTH *(.l1.data.B) #endif -#ifndef L2_LENGTH +#if !L2_LENGTH . = ALIGN(32); *(.data_l2.cacheline_aligned) *(.l2.data) @@ -212,20 +212,19 @@ SECTIONS __ebss_b_l1 = .; } -#ifdef L2_LENGTH __l2_lma_start = .; .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1)) { . = ALIGN(4); __stext_l2 = .; - *(.l1.text) + *(.l2.text) . = ALIGN(4); __etext_l2 = .; . = ALIGN(4); __sdata_l2 = .; - *(.l1.data) + *(.l2.data) __edata_l2 = .; . = ALIGN(32); @@ -233,11 +232,10 @@ SECTIONS . = ALIGN(4); __sbss_l2 = .; - *(.l1.bss) + *(.l2.bss) . = ALIGN(4); __ebss_l2 = .; } -#endif /* Force trailing alignment of our init section so that when we * free our init memory, we don't leave behind a partial page. -- cgit v1.2.3