From cd741b604b94a4d5bebf2672626ffec7de44652c Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 06:00:01 +0900 Subject: MIPS: EMMA: Kconfig reorganization - Move EMMA related stuff into arch/mips/emma/Kconfig - Create CONFIG_SOC_EMMA* to handle more EMMA SoCs effectively - Rename CONFIG_MARKEINS into CONFIG_NEC_MARKEINS Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/Kconfig | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 arch/mips/emma/Kconfig (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/Kconfig b/arch/mips/emma/Kconfig new file mode 100644 index 00000000000..9669c72123c --- /dev/null +++ b/arch/mips/emma/Kconfig @@ -0,0 +1,29 @@ +choice + prompt "Machine type" + depends on MACH_EMMA + default NEC_MARKEINS + +config NEC_MARKEINS + bool "NEC EMMA2RH Mark-eins board" + select SOC_EMMA2RH + select HW_HAS_PCI + help + This enables support for the NEC Electronics Mark-eins boards. + +endchoice + +config SOC_EMMA2RH + bool + select SOC_EMMA + select SYS_HAS_CPU_R5500 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + +config SOC_EMMA + bool + select CEVT_R4K + select CSRC_R4K + select DMA_NONCOHERENT + select IRQ_CPU + select SWAP_IO_SPACE + select SYS_SUPPORTS_BIG_ENDIAN -- cgit v1.2.3 From f27655e34171b0ae9ea5a0aadae894e817f0f875 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:29:16 +0900 Subject: MIPS: EMMA: Move arch/mips/emma2rh/ into arch/mips/emma/ git mv arch/mips/{emma2rh,emma} and fixups Makefiles. We'll put all NEC EMMA series based machines there in the future. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/common/Makefile | 13 +++ arch/mips/emma/common/irq.c | 105 ++++++++++++++++++ arch/mips/emma/common/irq_emma2rh.c | 106 ++++++++++++++++++ arch/mips/emma/common/prom.c | 72 +++++++++++++ arch/mips/emma/markeins/Makefile | 13 +++ arch/mips/emma/markeins/irq.c | 132 +++++++++++++++++++++++ arch/mips/emma/markeins/irq_markeins.c | 158 +++++++++++++++++++++++++++ arch/mips/emma/markeins/led.c | 60 +++++++++++ arch/mips/emma/markeins/platform.c | 191 +++++++++++++++++++++++++++++++++ arch/mips/emma/markeins/setup.c | 135 +++++++++++++++++++++++ 10 files changed, 985 insertions(+) create mode 100644 arch/mips/emma/common/Makefile create mode 100644 arch/mips/emma/common/irq.c create mode 100644 arch/mips/emma/common/irq_emma2rh.c create mode 100644 arch/mips/emma/common/prom.c create mode 100644 arch/mips/emma/markeins/Makefile create mode 100644 arch/mips/emma/markeins/irq.c create mode 100644 arch/mips/emma/markeins/irq_markeins.c create mode 100644 arch/mips/emma/markeins/led.c create mode 100644 arch/mips/emma/markeins/platform.c create mode 100644 arch/mips/emma/markeins/setup.c (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/common/Makefile b/arch/mips/emma/common/Makefile new file mode 100644 index 00000000000..cb0fd328c61 --- /dev/null +++ b/arch/mips/emma/common/Makefile @@ -0,0 +1,13 @@ +# +# arch/mips/emma2rh/common/Makefile +# Makefile for the common code of NEC EMMA2RH based board. +# +# Copyright (C) NEC Electronics Corporation 2005-2006 +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# + +obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_emma2rh.o prom.o diff --git a/arch/mips/emma/common/irq.c b/arch/mips/emma/common/irq.c new file mode 100644 index 00000000000..91cbd959ab6 --- /dev/null +++ b/arch/mips/emma/common/irq.c @@ -0,0 +1,105 @@ +/* + * arch/mips/emma2rh/common/irq.c + * This file is common irq dispatcher. + * + * Copyright (C) NEC Electronics Corporation 2005-2006 + * + * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c + * + * Copyright 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +/* + * the first level int-handler will jump here if it is a emma2rh irq + */ +void emma2rh_irq_dispatch(void) +{ + u32 intStatus; + u32 bitmask; + u32 i; + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) + & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0); + +#ifdef EMMA2RH_SW_CASCADE + if (intStatus & + (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { + u32 swIntStatus; + swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT) + & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (swIntStatus & bitmask) { + do_IRQ(EMMA2RH_SW_IRQ_BASE + i); + return; + } + } + } +#endif + + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) + & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1); + +#ifdef EMMA2RH_GPIO_CASCADE + if (intStatus & + (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { + u32 gpioIntStatus; + gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST) + & emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (gpioIntStatus & bitmask) { + do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i); + return; + } + } + } +#endif + + for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) + & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2); + + for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } +} diff --git a/arch/mips/emma/common/irq_emma2rh.c b/arch/mips/emma/common/irq_emma2rh.c new file mode 100644 index 00000000000..96df37b7775 --- /dev/null +++ b/arch/mips/emma/common/irq_emma2rh.c @@ -0,0 +1,106 @@ +/* + * arch/mips/emma2rh/common/irq_emma2rh.c + * This file defines the irq handler for EMMA2RH. + * + * Copyright (C) NEC Electronics Corporation 2005-2006 + * + * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c + * + * Copyright 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * EMMA2RH defines 64 IRQs. + * + * This file exports one function: + * emma2rh_irq_init(u32 irq_base); + */ + +#include +#include +#include + +#include + +#include + +/* number of total irqs supported by EMMA2RH */ +#define NUM_EMMA2RH_IRQ 96 + +static int emma2rh_irq_base = -1; + +void ll_emma2rh_irq_enable(int); +void ll_emma2rh_irq_disable(int); + +static void emma2rh_irq_enable(unsigned int irq) +{ + ll_emma2rh_irq_enable(irq - emma2rh_irq_base); +} + +static void emma2rh_irq_disable(unsigned int irq) +{ + ll_emma2rh_irq_disable(irq - emma2rh_irq_base); +} + +struct irq_chip emma2rh_irq_controller = { + .name = "emma2rh_irq", + .ack = emma2rh_irq_disable, + .mask = emma2rh_irq_disable, + .mask_ack = emma2rh_irq_disable, + .unmask = emma2rh_irq_enable, +}; + +void emma2rh_irq_init(u32 irq_base) +{ + u32 i; + + for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) + set_irq_chip_and_handler(i, &emma2rh_irq_controller, + handle_level_irq); + + emma2rh_irq_base = irq_base; +} + +void ll_emma2rh_irq_enable(int emma2rh_irq) +{ + u32 reg_value; + u32 reg_bitmask; + u32 reg_index; + + reg_index = EMMA2RH_BHIF_INT_EN_0 + + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) + * (emma2rh_irq / 32); + reg_value = emma2rh_in32(reg_index); + reg_bitmask = 0x1 << (emma2rh_irq % 32); + db_assert((reg_value & reg_bitmask) == 0); + emma2rh_out32(reg_index, reg_value | reg_bitmask); +} + +void ll_emma2rh_irq_disable(int emma2rh_irq) +{ + u32 reg_value; + u32 reg_bitmask; + u32 reg_index; + + reg_index = EMMA2RH_BHIF_INT_EN_0 + + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) + * (emma2rh_irq / 32); + reg_value = emma2rh_in32(reg_index); + reg_bitmask = 0x1 << (emma2rh_irq % 32); + db_assert((reg_value & reg_bitmask) != 0); + emma2rh_out32(reg_index, reg_value & ~reg_bitmask); +} diff --git a/arch/mips/emma/common/prom.c b/arch/mips/emma/common/prom.c new file mode 100644 index 00000000000..97bf29e755a --- /dev/null +++ b/arch/mips/emma/common/prom.c @@ -0,0 +1,72 @@ +/* + * arch/mips/emma2rh/common/prom.c + * This file is prom file. + * + * Copyright (C) NEC Electronics Corporation 2004-2006 + * + * This file is based on the arch/mips/ddb5xxx/common/prom.c + * + * Copyright 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include + +#include +#include +#include + +const char *get_system_type(void) +{ +#ifdef CONFIG_NEC_MARKEINS + return "NEC EMMA2RH Mark-eins"; +#else +#error Unknown NEC board +#endif +} + +/* [jsun@junsun.net] PMON passes arguments in C main() style */ +void __init prom_init(void) +{ + int argc = fw_arg0; + char **arg = (char **)fw_arg1; + int i; + + /* if user passes kernel args, ignore the default one */ + if (argc > 1) + arcs_cmdline[0] = '\0'; + + /* arg[0] is "g", the rest is boot parameters */ + for (i = 1; i < argc; i++) { + if (strlen(arcs_cmdline) + strlen(arg[i] + 1) + >= sizeof(arcs_cmdline)) + break; + strcat(arcs_cmdline, arg[i]); + strcat(arcs_cmdline, " "); + } + +#ifdef CONFIG_NEC_MARKEINS + add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM); +#else +#error Unknown NEC board +#endif +} + +void __init prom_free_prom_memory(void) +{ +} diff --git a/arch/mips/emma/markeins/Makefile b/arch/mips/emma/markeins/Makefile new file mode 100644 index 00000000000..3c8b864f7bc --- /dev/null +++ b/arch/mips/emma/markeins/Makefile @@ -0,0 +1,13 @@ +# +# arch/mips/emma2rh/markeins/Makefile +# Makefile for the common code of NEC EMMA2RH based board. +# +# Copyright (C) NEC Electronics Corporation 2005-2006 +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# + +obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c new file mode 100644 index 00000000000..6bcf6a06367 --- /dev/null +++ b/arch/mips/emma/markeins/irq.c @@ -0,0 +1,132 @@ +/* + * arch/mips/emma2rh/markeins/irq.c + * This file defines the irq handler for EMMA2RH. + * + * Copyright (C) NEC Electronics Corporation 2004-2006 + * + * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c + * + * Copyright 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +/* + * IRQ mapping + * + * 0-7: 8 CPU interrupts + * 0 - software interrupt 0 + * 1 - software interrupt 1 + * 2 - most Vrc5477 interrupts are routed to this pin + * 3 - (optional) some other interrupts routed to this pin for debugg + * 4 - not used + * 5 - not used + * 6 - not used + * 7 - cpu timer (used by default) + * + */ + +extern void emma2rh_sw_irq_init(u32 base); +extern void emma2rh_gpio_irq_init(u32 base); +extern void emma2rh_irq_init(u32 base); +extern void emma2rh_irq_dispatch(void); + +static struct irqaction irq_cascade = { + .handler = no_action, + .flags = 0, + .mask = CPU_MASK_NONE, + .name = "cascade", + .dev_id = NULL, + .next = NULL, +}; + +void __init arch_init_irq(void) +{ + u32 reg; + + db_run(printk("markeins_irq_setup invoked.\n")); + + /* by default, interrupts are disabled. */ + emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0); + emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0); + emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0); + emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0); + emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0); + emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0); + emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0); + + clear_c0_status(0xff00); + set_c0_status(0x0400); + +#define GPIO_PCI (0xf<<15) + /* setup GPIO interrupt for PCI interface */ + /* direction input */ + reg = emma2rh_in32(EMMA2RH_GPIO_DIR); + emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI); + /* disable interrupt */ + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI); + /* level triggerd */ + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE); + emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI); + reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A); + emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI)); + /* interrupt clear */ + emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI); + + /* init all controllers */ + emma2rh_irq_init(EMMA2RH_IRQ_BASE); + emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE); + emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); + mips_cpu_irq_init(); + + /* setup cascade interrupts */ + setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); + setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade); + setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade); +} + +asmlinkage void plat_irq_dispatch(void) +{ + unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; + + if (pending & STATUSF_IP7) + do_IRQ(CPU_IRQ_BASE + 7); + else if (pending & STATUSF_IP2) + emma2rh_irq_dispatch(); + else if (pending & STATUSF_IP1) + do_IRQ(CPU_IRQ_BASE + 1); + else if (pending & STATUSF_IP0) + do_IRQ(CPU_IRQ_BASE + 0); + else + spurious_interrupt(); +} + + diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c new file mode 100644 index 00000000000..fba5c156f47 --- /dev/null +++ b/arch/mips/emma/markeins/irq_markeins.c @@ -0,0 +1,158 @@ +/* + * arch/mips/emma2rh/markeins/irq_markeins.c + * This file defines the irq handler for Mark-eins. + * + * Copyright (C) NEC Electronics Corporation 2004-2006 + * + * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c + * + * Copyright 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include + +#include +#include + +static int emma2rh_sw_irq_base = -1; +static int emma2rh_gpio_irq_base = -1; + +void ll_emma2rh_sw_irq_enable(int reg); +void ll_emma2rh_sw_irq_disable(int reg); +void ll_emma2rh_gpio_irq_enable(int reg); +void ll_emma2rh_gpio_irq_disable(int reg); + +static void emma2rh_sw_irq_enable(unsigned int irq) +{ + ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base); +} + +static void emma2rh_sw_irq_disable(unsigned int irq) +{ + ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base); +} + +struct irq_chip emma2rh_sw_irq_controller = { + .name = "emma2rh_sw_irq", + .ack = emma2rh_sw_irq_disable, + .mask = emma2rh_sw_irq_disable, + .mask_ack = emma2rh_sw_irq_disable, + .unmask = emma2rh_sw_irq_enable, +}; + +void emma2rh_sw_irq_init(u32 irq_base) +{ + u32 i; + + for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) + set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller, + handle_level_irq); + + emma2rh_sw_irq_base = irq_base; +} + +void ll_emma2rh_sw_irq_enable(int irq) +{ + u32 reg; + + db_assert(irq >= 0); + db_assert(irq < NUM_EMMA2RH_IRQ_SW); + + reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + reg |= 1 << irq; + emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); +} + +void ll_emma2rh_sw_irq_disable(int irq) +{ + u32 reg; + + db_assert(irq >= 0); + db_assert(irq < 32); + + reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + reg &= ~(1 << irq); + emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); +} + +static void emma2rh_gpio_irq_enable(unsigned int irq) +{ + ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); +} + +static void emma2rh_gpio_irq_disable(unsigned int irq) +{ + ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base); +} + +static void emma2rh_gpio_irq_ack(unsigned int irq) +{ + irq -= emma2rh_gpio_irq_base; + emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); + ll_emma2rh_gpio_irq_disable(irq); +} + +static void emma2rh_gpio_irq_end(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); +} + +struct irq_chip emma2rh_gpio_irq_controller = { + .name = "emma2rh_gpio_irq", + .ack = emma2rh_gpio_irq_ack, + .mask = emma2rh_gpio_irq_disable, + .mask_ack = emma2rh_gpio_irq_ack, + .unmask = emma2rh_gpio_irq_enable, + .end = emma2rh_gpio_irq_end, +}; + +void emma2rh_gpio_irq_init(u32 irq_base) +{ + u32 i; + + for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) + set_irq_chip(i, &emma2rh_gpio_irq_controller); + + emma2rh_gpio_irq_base = irq_base; +} + +void ll_emma2rh_gpio_irq_enable(int irq) +{ + u32 reg; + + db_assert(irq >= 0); + db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg |= 1 << irq; + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); +} + +void ll_emma2rh_gpio_irq_disable(int irq) +{ + u32 reg; + + db_assert(irq >= 0); + db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg &= ~(1 << irq); + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); +} diff --git a/arch/mips/emma/markeins/led.c b/arch/mips/emma/markeins/led.c new file mode 100644 index 00000000000..b65254c1bfe --- /dev/null +++ b/arch/mips/emma/markeins/led.c @@ -0,0 +1,60 @@ +/* + * arch/mips/emma2rh/markeins/led.c + * This file defines the led display for Mark-eins. + * + * Copyright (C) NEC Electronics Corporation 2004-2006 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include + +const unsigned long clear = 0x20202020; + +#define LED_BASE 0xb1400038 + +void markeins_led_clear(void) +{ + emma2rh_out32(LED_BASE, clear); + emma2rh_out32(LED_BASE + 4, clear); +} + +void markeins_led(const char *str) +{ + int i; + int len = strlen(str); + + markeins_led_clear(); + if (len > 8) + len = 8; + + if (emma2rh_in32(0xb0000800) & (0x1 << 18)) + for (i = 0; i < len; i++) + emma2rh_out8(LED_BASE + i, str[i]); + else + for (i = 0; i < len; i++) + emma2rh_out8(LED_BASE + (i & 4) + (3 - (i & 3)), + str[i]); +} + +void markeins_led_hex(u32 val) +{ + char str[10]; + + sprintf(str, "%08x", val); + markeins_led(str); +} diff --git a/arch/mips/emma/markeins/platform.c b/arch/mips/emma/markeins/platform.c new file mode 100644 index 00000000000..fb9cda253ab --- /dev/null +++ b/arch/mips/emma/markeins/platform.c @@ -0,0 +1,191 @@ +/* + * arch/mips/emma2rh/markeins/platofrm.c + * This file sets up platform devices for EMMA2RH Mark-eins. + * + * Copyright(C) MontaVista Software Inc, 2006 + * + * Author: dmitry pervushin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + + +#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */ + +static struct resource i2c_emma_resources_0[] = { + { + .name = NULL, + .start = EMMA2RH_IRQ_PIIC0, + .end = EMMA2RH_IRQ_PIIC0, + .flags = IORESOURCE_IRQ + }, { + .name = NULL, + .start = EMMA2RH_PIIC0_BASE, + .end = EMMA2RH_PIIC0_BASE + 0x1000, + .flags = 0 + }, +}; + +struct resource i2c_emma_resources_1[] = { + { + .name = NULL, + .start = EMMA2RH_IRQ_PIIC1, + .end = EMMA2RH_IRQ_PIIC1, + .flags = IORESOURCE_IRQ + }, { + .name = NULL, + .start = EMMA2RH_PIIC1_BASE, + .end = EMMA2RH_PIIC1_BASE + 0x1000, + .flags = 0 + }, +}; + +struct resource i2c_emma_resources_2[] = { + { + .name = NULL, + .start = EMMA2RH_IRQ_PIIC2, + .end = EMMA2RH_IRQ_PIIC2, + .flags = IORESOURCE_IRQ + }, { + .name = NULL, + .start = EMMA2RH_PIIC2_BASE, + .end = EMMA2RH_PIIC2_BASE + 0x1000, + .flags = 0 + }, +}; + +struct platform_device i2c_emma_devices[] = { + [0] = { + .name = I2C_EMMA2RH, + .id = 0, + .resource = i2c_emma_resources_0, + .num_resources = ARRAY_SIZE(i2c_emma_resources_0), + }, + [1] = { + .name = I2C_EMMA2RH, + .id = 1, + .resource = i2c_emma_resources_1, + .num_resources = ARRAY_SIZE(i2c_emma_resources_1), + }, + [2] = { + .name = I2C_EMMA2RH, + .id = 2, + .resource = i2c_emma_resources_2, + .num_resources = ARRAY_SIZE(i2c_emma_resources_2), + }, +}; + +#define EMMA2RH_SERIAL_CLOCK 18544000 +#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST + +static struct plat_serial8250_port platform_serial_ports[] = { + [0] = { + .membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3), + .irq = EMMA2RH_IRQ_PFUR0, + .uartclk = EMMA2RH_SERIAL_CLOCK, + .regshift = 4, + .iotype = UPIO_MEM, + .flags = EMMA2RH_SERIAL_FLAGS, + }, [1] = { + .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3), + .irq = EMMA2RH_IRQ_PFUR1, + .uartclk = EMMA2RH_SERIAL_CLOCK, + .regshift = 4, + .iotype = UPIO_MEM, + .flags = EMMA2RH_SERIAL_FLAGS, + }, [2] = { + .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3), + .irq = EMMA2RH_IRQ_PFUR2, + .uartclk = EMMA2RH_SERIAL_CLOCK, + .regshift = 4, + .iotype = UPIO_MEM, + .flags = EMMA2RH_SERIAL_FLAGS, + }, [3] = { + .flags = 0, + }, +}; + +static struct platform_device serial_emma = { + .name = "serial8250", + .dev = { + .platform_data = &platform_serial_ports, + }, +}; + +static struct platform_device *devices[] = { + &i2c_emma_devices[0], + &i2c_emma_devices[1], + &i2c_emma_devices[2], + &serial_emma, +}; + +static struct mtd_partition markeins_parts[] = { + [0] = { + .name = "RootFS", + .offset = 0x00000000, + .size = 0x00c00000, + }, + [1] = { + .name = "boot code area", + .offset = MTDPART_OFS_APPEND, + .size = 0x00100000, + }, + [2] = { + .name = "kernel image", + .offset = MTDPART_OFS_APPEND, + .size = 0x00300000, + }, + [3] = { + .name = "RootFS2", + .offset = MTDPART_OFS_APPEND, + .size = 0x00c00000, + }, + [4] = { + .name = "boot code area2", + .offset = MTDPART_OFS_APPEND, + .size = 0x00100000, + }, + [5] = { + .name = "kernel image2", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static int __init platform_devices_setup(void) +{ + physmap_set_partitions(markeins_parts, ARRAY_SIZE(markeins_parts)); + return platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +arch_initcall(platform_devices_setup); + diff --git a/arch/mips/emma/markeins/setup.c b/arch/mips/emma/markeins/setup.c new file mode 100644 index 00000000000..b6a23ad539f --- /dev/null +++ b/arch/mips/emma/markeins/setup.c @@ -0,0 +1,135 @@ +/* + * arch/mips/emma2rh/markeins/setup.c + * This file is setup for EMMA2RH Mark-eins. + * + * Copyright (C) NEC Electronics Corporation 2004-2006 + * + * This file is based on the arch/mips/ddb5xxx/ddb5477/setup.c. + * + * Copyright 2001 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include + +#include +#include + +#include + +#define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */ + +extern void markeins_led(const char *); + +static int bus_frequency = 0; + +static void markeins_machine_restart(char *command) +{ + static void (*back_to_prom) (void) = (void (*)(void))0xbfc00000; + + printk("cannot EMMA2RH Mark-eins restart.\n"); + markeins_led("restart."); + back_to_prom(); +} + +static void markeins_machine_halt(void) +{ + printk("EMMA2RH Mark-eins halted.\n"); + markeins_led("halted."); + while (1) ; +} + +static void markeins_machine_power_off(void) +{ + printk("EMMA2RH Mark-eins halted. Please turn off the power.\n"); + markeins_led("poweroff."); + while (1) ; +} + +static unsigned long __initdata emma2rh_clock[4] = { + 166500000, 187312500, 199800000, 210600000 +}; + +static unsigned int __init detect_bus_frequency(unsigned long rtc_base) +{ + u32 reg; + + /* detect from boot strap */ + reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0); + reg = (reg >> 4) & 0x3; + + return emma2rh_clock[reg]; +} + +void __init plat_time_init(void) +{ + u32 reg; + if (bus_frequency == 0) + bus_frequency = detect_bus_frequency(0); + + reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0); + if ((reg & 0x3) == 0) + reg = (reg >> 6) & 0x3; + else { + reg = emma2rh_in32(EMMA2RH_BHIF_MAIN_CTRL); + reg = (reg >> 4) & 0x3; + } + mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2; +} + +static void markeins_board_init(void); +extern void markeins_irq_setup(void); + +static void inline __init markeins_sio_setup(void) +{ +} + +void __init plat_mem_setup(void) +{ + /* initialize board - we don't trust the loader */ + markeins_board_init(); + + set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE)); + + _machine_restart = markeins_machine_restart; + _machine_halt = markeins_machine_halt; + pm_power_off = markeins_machine_power_off; + + /* setup resource limits */ + ioport_resource.start = EMMA2RH_PCI_IO_BASE; + ioport_resource.end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1; + iomem_resource.start = EMMA2RH_IO_BASE; + iomem_resource.end = EMMA2RH_ROM_BASE - 1; + + /* Reboot on panic */ + panic_timeout = 180; + + markeins_sio_setup(); +} + +static void __init markeins_board_init(void) +{ + u32 val; + + val = emma2rh_in32(EMMA2RH_PBRD_INT_EN); /* open serial interrupts. */ + emma2rh_out32(EMMA2RH_PBRD_INT_EN, val | 0xaa); + val = emma2rh_in32(EMMA2RH_PBRD_CLKSEL); /* set serial clocks. */ + emma2rh_out32(EMMA2RH_PBRD_CLKSEL, val | 0x5); /* 18MHz */ + emma2rh_out32(EMMA2RH_PCI_CONTROL, 0); + + markeins_led("MVL E2RH"); +} -- cgit v1.2.3 From d91f2cbe698cf70b50099343dac1ec8061bfd045 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:30:20 +0900 Subject: MIPS: EMMA: Move to dir We'll put all EMMA related headers there in the future. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/common/irq.c | 2 +- arch/mips/emma/common/irq_emma2rh.c | 2 +- arch/mips/emma/common/prom.c | 2 +- arch/mips/emma/markeins/irq.c | 2 +- arch/mips/emma/markeins/irq_markeins.c | 2 +- arch/mips/emma/markeins/led.c | 2 +- arch/mips/emma/markeins/platform.c | 2 +- arch/mips/emma/markeins/setup.c | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/common/irq.c b/arch/mips/emma/common/irq.c index 91cbd959ab6..4158f808aa8 100644 --- a/arch/mips/emma/common/irq.c +++ b/arch/mips/emma/common/irq.c @@ -32,7 +32,7 @@ #include #include -#include +#include /* * the first level int-handler will jump here if it is a emma2rh irq diff --git a/arch/mips/emma/common/irq_emma2rh.c b/arch/mips/emma/common/irq_emma2rh.c index 96df37b7775..23ac959ce43 100644 --- a/arch/mips/emma/common/irq_emma2rh.c +++ b/arch/mips/emma/common/irq_emma2rh.c @@ -36,7 +36,7 @@ #include -#include +#include /* number of total irqs supported by EMMA2RH */ #define NUM_EMMA2RH_IRQ 96 diff --git a/arch/mips/emma/common/prom.c b/arch/mips/emma/common/prom.c index 97bf29e755a..120f53fbdb4 100644 --- a/arch/mips/emma/common/prom.c +++ b/arch/mips/emma/common/prom.c @@ -29,7 +29,7 @@ #include #include -#include +#include const char *get_system_type(void) { diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 6bcf6a06367..dcb939205be 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -36,7 +36,7 @@ #include #include -#include +#include /* * IRQ mapping diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c index fba5c156f47..bbe0d711f00 100644 --- a/arch/mips/emma/markeins/irq_markeins.c +++ b/arch/mips/emma/markeins/irq_markeins.c @@ -28,7 +28,7 @@ #include #include -#include +#include static int emma2rh_sw_irq_base = -1; static int emma2rh_gpio_irq_base = -1; diff --git a/arch/mips/emma/markeins/led.c b/arch/mips/emma/markeins/led.c index b65254c1bfe..377a181b656 100644 --- a/arch/mips/emma/markeins/led.c +++ b/arch/mips/emma/markeins/led.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include const unsigned long clear = 0x20202020; diff --git a/arch/mips/emma/markeins/platform.c b/arch/mips/emma/markeins/platform.c index fb9cda253ab..88e87f6b344 100644 --- a/arch/mips/emma/markeins/platform.c +++ b/arch/mips/emma/markeins/platform.c @@ -36,7 +36,7 @@ #include #include -#include +#include #define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */ diff --git a/arch/mips/emma/markeins/setup.c b/arch/mips/emma/markeins/setup.c index b6a23ad539f..67f45650008 100644 --- a/arch/mips/emma/markeins/setup.c +++ b/arch/mips/emma/markeins/setup.c @@ -29,7 +29,7 @@ #include #include -#include +#include #define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */ -- cgit v1.2.3 From 9b6c04bc9726edf2655dd69d2e40c0ae4f07e525 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:31:16 +0900 Subject: MIPS: EMMA2RH: Remove emma2rh_irq_base global variable Let's use immediate value, instead. This also saves memory footprint, and probably a little bit faster. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/common/irq_emma2rh.c | 15 ++++++--------- arch/mips/emma/markeins/irq.c | 4 ++-- 2 files changed, 8 insertions(+), 11 deletions(-) (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/common/irq_emma2rh.c b/arch/mips/emma/common/irq_emma2rh.c index 23ac959ce43..4f84fede4c4 100644 --- a/arch/mips/emma/common/irq_emma2rh.c +++ b/arch/mips/emma/common/irq_emma2rh.c @@ -41,19 +41,17 @@ /* number of total irqs supported by EMMA2RH */ #define NUM_EMMA2RH_IRQ 96 -static int emma2rh_irq_base = -1; - void ll_emma2rh_irq_enable(int); void ll_emma2rh_irq_disable(int); static void emma2rh_irq_enable(unsigned int irq) { - ll_emma2rh_irq_enable(irq - emma2rh_irq_base); + ll_emma2rh_irq_enable(irq - EMMA2RH_IRQ_BASE); } static void emma2rh_irq_disable(unsigned int irq) { - ll_emma2rh_irq_disable(irq - emma2rh_irq_base); + ll_emma2rh_irq_disable(irq - EMMA2RH_IRQ_BASE); } struct irq_chip emma2rh_irq_controller = { @@ -64,15 +62,14 @@ struct irq_chip emma2rh_irq_controller = { .unmask = emma2rh_irq_enable, }; -void emma2rh_irq_init(u32 irq_base) +void emma2rh_irq_init(void) { u32 i; - for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) - set_irq_chip_and_handler(i, &emma2rh_irq_controller, + for (i = 0; i < NUM_EMMA2RH_IRQ; i++) + set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i, + &emma2rh_irq_controller, handle_level_irq); - - emma2rh_irq_base = irq_base; } void ll_emma2rh_irq_enable(int emma2rh_irq) diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index dcb939205be..86b9b6a34f4 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -55,7 +55,7 @@ extern void emma2rh_sw_irq_init(u32 base); extern void emma2rh_gpio_irq_init(u32 base); -extern void emma2rh_irq_init(u32 base); +extern void emma2rh_irq_init(void); extern void emma2rh_irq_dispatch(void); static struct irqaction irq_cascade = { @@ -102,7 +102,7 @@ void __init arch_init_irq(void) emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI); /* init all controllers */ - emma2rh_irq_init(EMMA2RH_IRQ_BASE); + emma2rh_irq_init(); emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE); emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); mips_cpu_irq_init(); -- cgit v1.2.3 From 68ed1ca9120506b2a0f80e4542deea24f89081ab Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:31:43 +0900 Subject: MIPS: EMMA2RH: Remove emma2rh_sw_irq_base Let's use immediate value, instead. This also saves memory footprint, and probably a little bit faster. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/markeins/irq.c | 4 ++-- arch/mips/emma/markeins/irq_markeins.c | 14 ++++++-------- 2 files changed, 8 insertions(+), 10 deletions(-) (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 86b9b6a34f4..c0f9d46c69f 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -53,7 +53,7 @@ * */ -extern void emma2rh_sw_irq_init(u32 base); +extern void emma2rh_sw_irq_init(void); extern void emma2rh_gpio_irq_init(u32 base); extern void emma2rh_irq_init(void); extern void emma2rh_irq_dispatch(void); @@ -103,7 +103,7 @@ void __init arch_init_irq(void) /* init all controllers */ emma2rh_irq_init(); - emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE); + emma2rh_sw_irq_init(); emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); mips_cpu_irq_init(); diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c index bbe0d711f00..18834216d6f 100644 --- a/arch/mips/emma/markeins/irq_markeins.c +++ b/arch/mips/emma/markeins/irq_markeins.c @@ -30,7 +30,6 @@ #include #include -static int emma2rh_sw_irq_base = -1; static int emma2rh_gpio_irq_base = -1; void ll_emma2rh_sw_irq_enable(int reg); @@ -40,12 +39,12 @@ void ll_emma2rh_gpio_irq_disable(int reg); static void emma2rh_sw_irq_enable(unsigned int irq) { - ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base); + ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE); } static void emma2rh_sw_irq_disable(unsigned int irq) { - ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base); + ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE); } struct irq_chip emma2rh_sw_irq_controller = { @@ -56,15 +55,14 @@ struct irq_chip emma2rh_sw_irq_controller = { .unmask = emma2rh_sw_irq_enable, }; -void emma2rh_sw_irq_init(u32 irq_base) +void emma2rh_sw_irq_init(void) { u32 i; - for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) - set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller, + for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++) + set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i, + &emma2rh_sw_irq_controller, handle_level_irq); - - emma2rh_sw_irq_base = irq_base; } void ll_emma2rh_sw_irq_enable(int irq) -- cgit v1.2.3 From fcb3cfe7f087fb27c35be911791883fb725055b1 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:32:11 +0900 Subject: MIPS: EMMA2RH: Remove emma2rh_gpio_irq_base Let's use immediate value, instead. This also saves memory footprint, and probably a little bit faster. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/markeins/irq.c | 4 ++-- arch/mips/emma/markeins/irq_markeins.c | 19 ++++++++----------- 2 files changed, 10 insertions(+), 13 deletions(-) (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index c0f9d46c69f..3577fd52030 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -54,7 +54,7 @@ */ extern void emma2rh_sw_irq_init(void); -extern void emma2rh_gpio_irq_init(u32 base); +extern void emma2rh_gpio_irq_init(void); extern void emma2rh_irq_init(void); extern void emma2rh_irq_dispatch(void); @@ -104,7 +104,7 @@ void __init arch_init_irq(void) /* init all controllers */ emma2rh_irq_init(); emma2rh_sw_irq_init(); - emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); + emma2rh_gpio_irq_init(); mips_cpu_irq_init(); /* setup cascade interrupts */ diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c index 18834216d6f..ea27ec573d9 100644 --- a/arch/mips/emma/markeins/irq_markeins.c +++ b/arch/mips/emma/markeins/irq_markeins.c @@ -30,8 +30,6 @@ #include #include -static int emma2rh_gpio_irq_base = -1; - void ll_emma2rh_sw_irq_enable(int reg); void ll_emma2rh_sw_irq_disable(int reg); void ll_emma2rh_gpio_irq_enable(int reg); @@ -91,17 +89,17 @@ void ll_emma2rh_sw_irq_disable(int irq) static void emma2rh_gpio_irq_enable(unsigned int irq) { - ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); + ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); } static void emma2rh_gpio_irq_disable(unsigned int irq) { - ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base); + ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE); } static void emma2rh_gpio_irq_ack(unsigned int irq) { - irq -= emma2rh_gpio_irq_base; + irq -= EMMA2RH_GPIO_IRQ_BASE; emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); ll_emma2rh_gpio_irq_disable(irq); } @@ -109,7 +107,7 @@ static void emma2rh_gpio_irq_ack(unsigned int irq) static void emma2rh_gpio_irq_end(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); + ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); } struct irq_chip emma2rh_gpio_irq_controller = { @@ -121,14 +119,13 @@ struct irq_chip emma2rh_gpio_irq_controller = { .end = emma2rh_gpio_irq_end, }; -void emma2rh_gpio_irq_init(u32 irq_base) +void emma2rh_gpio_irq_init(void) { u32 i; - for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) - set_irq_chip(i, &emma2rh_gpio_irq_controller); - - emma2rh_gpio_irq_base = irq_base; + for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++) + set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i, + &emma2rh_gpio_irq_controller); } void ll_emma2rh_gpio_irq_enable(int irq) -- cgit v1.2.3 From 9ae9fd79af28d6488e97311a3b60379b59ff4c90 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:32:40 +0900 Subject: MIPS: EMMA: Fold arch/mips/emma/{common,markeins}/irq*.c into markeins/irq.c Current EMMA2RH irq code is mess. Before cleaning it up, gather them in one place as a first step. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/common/Makefile | 2 +- arch/mips/emma/common/irq.c | 105 -------------- arch/mips/emma/common/irq_emma2rh.c | 103 -------------- arch/mips/emma/markeins/Makefile | 2 +- arch/mips/emma/markeins/irq.c | 251 ++++++++++++++++++++++++++++++++- arch/mips/emma/markeins/irq_markeins.c | 153 -------------------- 6 files changed, 249 insertions(+), 367 deletions(-) delete mode 100644 arch/mips/emma/common/irq.c delete mode 100644 arch/mips/emma/common/irq_emma2rh.c delete mode 100644 arch/mips/emma/markeins/irq_markeins.c (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/common/Makefile b/arch/mips/emma/common/Makefile index cb0fd328c61..c392d28c1ef 100644 --- a/arch/mips/emma/common/Makefile +++ b/arch/mips/emma/common/Makefile @@ -10,4 +10,4 @@ # (at your option) any later version. # -obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_emma2rh.o prom.o +obj-$(CONFIG_NEC_MARKEINS) += prom.o diff --git a/arch/mips/emma/common/irq.c b/arch/mips/emma/common/irq.c deleted file mode 100644 index 4158f808aa8..00000000000 --- a/arch/mips/emma/common/irq.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * arch/mips/emma2rh/common/irq.c - * This file is common irq dispatcher. - * - * Copyright (C) NEC Electronics Corporation 2005-2006 - * - * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c - * - * Copyright 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -/* - * the first level int-handler will jump here if it is a emma2rh irq - */ -void emma2rh_irq_dispatch(void) -{ - u32 intStatus; - u32 bitmask; - u32 i; - - intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) - & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0); - -#ifdef EMMA2RH_SW_CASCADE - if (intStatus & - (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { - u32 swIntStatus; - swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT) - & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); - for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { - if (swIntStatus & bitmask) { - do_IRQ(EMMA2RH_SW_IRQ_BASE + i); - return; - } - } - } -#endif - - for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { - if (intStatus & bitmask) { - do_IRQ(EMMA2RH_IRQ_BASE + i); - return; - } - } - - intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) - & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1); - -#ifdef EMMA2RH_GPIO_CASCADE - if (intStatus & - (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { - u32 gpioIntStatus; - gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST) - & emma2rh_in32(EMMA2RH_GPIO_INT_MASK); - for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { - if (gpioIntStatus & bitmask) { - do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i); - return; - } - } - } -#endif - - for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { - if (intStatus & bitmask) { - do_IRQ(EMMA2RH_IRQ_BASE + i); - return; - } - } - - intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) - & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2); - - for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { - if (intStatus & bitmask) { - do_IRQ(EMMA2RH_IRQ_BASE + i); - return; - } - } -} diff --git a/arch/mips/emma/common/irq_emma2rh.c b/arch/mips/emma/common/irq_emma2rh.c deleted file mode 100644 index 4f84fede4c4..00000000000 --- a/arch/mips/emma/common/irq_emma2rh.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * arch/mips/emma2rh/common/irq_emma2rh.c - * This file defines the irq handler for EMMA2RH. - * - * Copyright (C) NEC Electronics Corporation 2005-2006 - * - * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c - * - * Copyright 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * EMMA2RH defines 64 IRQs. - * - * This file exports one function: - * emma2rh_irq_init(u32 irq_base); - */ - -#include -#include -#include - -#include - -#include - -/* number of total irqs supported by EMMA2RH */ -#define NUM_EMMA2RH_IRQ 96 - -void ll_emma2rh_irq_enable(int); -void ll_emma2rh_irq_disable(int); - -static void emma2rh_irq_enable(unsigned int irq) -{ - ll_emma2rh_irq_enable(irq - EMMA2RH_IRQ_BASE); -} - -static void emma2rh_irq_disable(unsigned int irq) -{ - ll_emma2rh_irq_disable(irq - EMMA2RH_IRQ_BASE); -} - -struct irq_chip emma2rh_irq_controller = { - .name = "emma2rh_irq", - .ack = emma2rh_irq_disable, - .mask = emma2rh_irq_disable, - .mask_ack = emma2rh_irq_disable, - .unmask = emma2rh_irq_enable, -}; - -void emma2rh_irq_init(void) -{ - u32 i; - - for (i = 0; i < NUM_EMMA2RH_IRQ; i++) - set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i, - &emma2rh_irq_controller, - handle_level_irq); -} - -void ll_emma2rh_irq_enable(int emma2rh_irq) -{ - u32 reg_value; - u32 reg_bitmask; - u32 reg_index; - - reg_index = EMMA2RH_BHIF_INT_EN_0 - + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) - * (emma2rh_irq / 32); - reg_value = emma2rh_in32(reg_index); - reg_bitmask = 0x1 << (emma2rh_irq % 32); - db_assert((reg_value & reg_bitmask) == 0); - emma2rh_out32(reg_index, reg_value | reg_bitmask); -} - -void ll_emma2rh_irq_disable(int emma2rh_irq) -{ - u32 reg_value; - u32 reg_bitmask; - u32 reg_index; - - reg_index = EMMA2RH_BHIF_INT_EN_0 - + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) - * (emma2rh_irq / 32); - reg_value = emma2rh_in32(reg_index); - reg_bitmask = 0x1 << (emma2rh_irq % 32); - db_assert((reg_value & reg_bitmask) != 0); - emma2rh_out32(reg_index, reg_value & ~reg_bitmask); -} diff --git a/arch/mips/emma/markeins/Makefile b/arch/mips/emma/markeins/Makefile index 3c8b864f7bc..16e0017ba91 100644 --- a/arch/mips/emma/markeins/Makefile +++ b/arch/mips/emma/markeins/Makefile @@ -10,4 +10,4 @@ # (at your option) any later version. # -obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o +obj-$(CONFIG_NEC_MARKEINS) += irq.o setup.o led.o platform.o diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 3577fd52030..ada33d8f6ed 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -38,6 +38,9 @@ #include +/* number of total irqs supported by EMMA2RH */ +#define NUM_EMMA2RH_IRQ 96 + /* * IRQ mapping * @@ -53,10 +56,180 @@ * */ -extern void emma2rh_sw_irq_init(void); -extern void emma2rh_gpio_irq_init(void); -extern void emma2rh_irq_init(void); -extern void emma2rh_irq_dispatch(void); +void ll_emma2rh_irq_enable(int emma2rh_irq) +{ + u32 reg_value; + u32 reg_bitmask; + u32 reg_index; + + reg_index = EMMA2RH_BHIF_INT_EN_0 + + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * + (emma2rh_irq / 32); + reg_value = emma2rh_in32(reg_index); + reg_bitmask = 0x1 << (emma2rh_irq % 32); + db_assert((reg_value & reg_bitmask) == 0); + emma2rh_out32(reg_index, reg_value | reg_bitmask); +} + +void ll_emma2rh_irq_disable(int emma2rh_irq) +{ + u32 reg_value; + u32 reg_bitmask; + u32 reg_index; + + reg_index = EMMA2RH_BHIF_INT_EN_0 + + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * + (emma2rh_irq / 32); + reg_value = emma2rh_in32(reg_index); + reg_bitmask = 0x1 << (emma2rh_irq % 32); + db_assert((reg_value & reg_bitmask) != 0); + emma2rh_out32(reg_index, reg_value & ~reg_bitmask); +} + +static void emma2rh_irq_enable(unsigned int irq) +{ + ll_emma2rh_irq_enable(irq - EMMA2RH_IRQ_BASE); +} + +static void emma2rh_irq_disable(unsigned int irq) +{ + ll_emma2rh_irq_disable(irq - EMMA2RH_IRQ_BASE); +} + +struct irq_chip emma2rh_irq_controller = { + .name = "emma2rh_irq", + .ack = emma2rh_irq_disable, + .mask = emma2rh_irq_disable, + .mask_ack = emma2rh_irq_disable, + .unmask = emma2rh_irq_enable, +}; + +void emma2rh_irq_init(void) +{ + u32 i; + + for (i = 0; i < NUM_EMMA2RH_IRQ; i++) + set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i, + &emma2rh_irq_controller, + handle_level_irq); +} + +void ll_emma2rh_sw_irq_enable(int irq) +{ + u32 reg; + + db_assert(irq >= 0); + db_assert(irq < NUM_EMMA2RH_IRQ_SW); + + reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + reg |= 1 << irq; + emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); +} + +void ll_emma2rh_sw_irq_disable(int irq) +{ + u32 reg; + + db_assert(irq >= 0); + db_assert(irq < 32); + + reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + reg &= ~(1 << irq); + emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); +} + +static void emma2rh_sw_irq_enable(unsigned int irq) +{ + ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE); +} + +static void emma2rh_sw_irq_disable(unsigned int irq) +{ + ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE); +} + +struct irq_chip emma2rh_sw_irq_controller = { + .name = "emma2rh_sw_irq", + .ack = emma2rh_sw_irq_disable, + .mask = emma2rh_sw_irq_disable, + .mask_ack = emma2rh_sw_irq_disable, + .unmask = emma2rh_sw_irq_enable, +}; + +void emma2rh_sw_irq_init(void) +{ + u32 i; + + for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++) + set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i, + &emma2rh_sw_irq_controller, + handle_level_irq); +} + +void ll_emma2rh_gpio_irq_enable(int irq) +{ + u32 reg; + + db_assert(irq >= 0); + db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg |= 1 << irq; + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); +} + +void ll_emma2rh_gpio_irq_disable(int irq) +{ + u32 reg; + + db_assert(irq >= 0); + db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg &= ~(1 << irq); + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); +} + +static void emma2rh_gpio_irq_enable(unsigned int irq) +{ + ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); +} + +static void emma2rh_gpio_irq_disable(unsigned int irq) +{ + ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE); +} + +static void emma2rh_gpio_irq_ack(unsigned int irq) +{ + irq -= EMMA2RH_GPIO_IRQ_BASE; + emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); + ll_emma2rh_gpio_irq_disable(irq); +} + +static void emma2rh_gpio_irq_end(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); +} + +struct irq_chip emma2rh_gpio_irq_controller = { + .name = "emma2rh_gpio_irq", + .ack = emma2rh_gpio_irq_ack, + .mask = emma2rh_gpio_irq_disable, + .mask_ack = emma2rh_gpio_irq_ack, + .unmask = emma2rh_gpio_irq_enable, + .end = emma2rh_gpio_irq_end, +}; + +void emma2rh_gpio_irq_init(void) +{ + u32 i; + + for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++) + set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i, + &emma2rh_gpio_irq_controller); +} static struct irqaction irq_cascade = { .handler = no_action, @@ -67,6 +240,76 @@ static struct irqaction irq_cascade = { .next = NULL, }; +/* + * the first level int-handler will jump here if it is a emma2rh irq + */ +void emma2rh_irq_dispatch(void) +{ + u32 intStatus; + u32 bitmask; + u32 i; + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) & + emma2rh_in32(EMMA2RH_BHIF_INT_EN_0); + +#ifdef EMMA2RH_SW_CASCADE + if (intStatus & + (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { + u32 swIntStatus; + swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT) + & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (swIntStatus & bitmask) { + do_IRQ(EMMA2RH_SW_IRQ_BASE + i); + return; + } + } + } +#endif + + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) & + emma2rh_in32(EMMA2RH_BHIF_INT_EN_1); + +#ifdef EMMA2RH_GPIO_CASCADE + if (intStatus & + (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { + u32 gpioIntStatus; + gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST) + & emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { + if (gpioIntStatus & bitmask) { + do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i); + return; + } + } + } +#endif + + for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } + + intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) & + emma2rh_in32(EMMA2RH_BHIF_INT_EN_2); + + for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { + if (intStatus & bitmask) { + do_IRQ(EMMA2RH_IRQ_BASE + i); + return; + } + } +} + void __init arch_init_irq(void) { u32 reg; diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c deleted file mode 100644 index ea27ec573d9..00000000000 --- a/arch/mips/emma/markeins/irq_markeins.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * arch/mips/emma2rh/markeins/irq_markeins.c - * This file defines the irq handler for Mark-eins. - * - * Copyright (C) NEC Electronics Corporation 2004-2006 - * - * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c - * - * Copyright 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include -#include - -#include -#include - -void ll_emma2rh_sw_irq_enable(int reg); -void ll_emma2rh_sw_irq_disable(int reg); -void ll_emma2rh_gpio_irq_enable(int reg); -void ll_emma2rh_gpio_irq_disable(int reg); - -static void emma2rh_sw_irq_enable(unsigned int irq) -{ - ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE); -} - -static void emma2rh_sw_irq_disable(unsigned int irq) -{ - ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE); -} - -struct irq_chip emma2rh_sw_irq_controller = { - .name = "emma2rh_sw_irq", - .ack = emma2rh_sw_irq_disable, - .mask = emma2rh_sw_irq_disable, - .mask_ack = emma2rh_sw_irq_disable, - .unmask = emma2rh_sw_irq_enable, -}; - -void emma2rh_sw_irq_init(void) -{ - u32 i; - - for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++) - set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i, - &emma2rh_sw_irq_controller, - handle_level_irq); -} - -void ll_emma2rh_sw_irq_enable(int irq) -{ - u32 reg; - - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_SW); - - reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); - reg |= 1 << irq; - emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); -} - -void ll_emma2rh_sw_irq_disable(int irq) -{ - u32 reg; - - db_assert(irq >= 0); - db_assert(irq < 32); - - reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); - reg &= ~(1 << irq); - emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); -} - -static void emma2rh_gpio_irq_enable(unsigned int irq) -{ - ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); -} - -static void emma2rh_gpio_irq_disable(unsigned int irq) -{ - ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE); -} - -static void emma2rh_gpio_irq_ack(unsigned int irq) -{ - irq -= EMMA2RH_GPIO_IRQ_BASE; - emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); - ll_emma2rh_gpio_irq_disable(irq); -} - -static void emma2rh_gpio_irq_end(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); -} - -struct irq_chip emma2rh_gpio_irq_controller = { - .name = "emma2rh_gpio_irq", - .ack = emma2rh_gpio_irq_ack, - .mask = emma2rh_gpio_irq_disable, - .mask_ack = emma2rh_gpio_irq_ack, - .unmask = emma2rh_gpio_irq_enable, - .end = emma2rh_gpio_irq_end, -}; - -void emma2rh_gpio_irq_init(void) -{ - u32 i; - - for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++) - set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i, - &emma2rh_gpio_irq_controller); -} - -void ll_emma2rh_gpio_irq_enable(int irq) -{ - u32 reg; - - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); - - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); - reg |= 1 << irq; - emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); -} - -void ll_emma2rh_gpio_irq_disable(int irq) -{ - u32 reg; - - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); - - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); - reg &= ~(1 << irq); - emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); -} -- cgit v1.2.3 From a9c2aa17a8b8b7a813d31e66da5d31cfdd006f4b Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:33:10 +0900 Subject: MIPS: Markeins: Remove runtime debug prints Remove runtime db_* macros as we don't need them any more. In general, such helpers are useful for initial porting, but once approved, they are not indispensable. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/markeins/irq.c | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index ada33d8f6ed..03a663a372f 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -32,7 +32,6 @@ #include #include #include -#include #include #include @@ -67,7 +66,6 @@ void ll_emma2rh_irq_enable(int emma2rh_irq) (emma2rh_irq / 32); reg_value = emma2rh_in32(reg_index); reg_bitmask = 0x1 << (emma2rh_irq % 32); - db_assert((reg_value & reg_bitmask) == 0); emma2rh_out32(reg_index, reg_value | reg_bitmask); } @@ -82,7 +80,6 @@ void ll_emma2rh_irq_disable(int emma2rh_irq) (emma2rh_irq / 32); reg_value = emma2rh_in32(reg_index); reg_bitmask = 0x1 << (emma2rh_irq % 32); - db_assert((reg_value & reg_bitmask) != 0); emma2rh_out32(reg_index, reg_value & ~reg_bitmask); } @@ -118,9 +115,6 @@ void ll_emma2rh_sw_irq_enable(int irq) { u32 reg; - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_SW); - reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); reg |= 1 << irq; emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); @@ -130,9 +124,6 @@ void ll_emma2rh_sw_irq_disable(int irq) { u32 reg; - db_assert(irq >= 0); - db_assert(irq < 32); - reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); reg &= ~(1 << irq); emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); @@ -170,9 +161,6 @@ void ll_emma2rh_gpio_irq_enable(int irq) { u32 reg; - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); reg |= 1 << irq; emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); @@ -182,9 +170,6 @@ void ll_emma2rh_gpio_irq_disable(int irq) { u32 reg; - db_assert(irq >= 0); - db_assert(irq < NUM_EMMA2RH_IRQ_GPIO); - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); reg &= ~(1 << irq); emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); @@ -314,8 +299,6 @@ void __init arch_init_irq(void) { u32 reg; - db_run(printk("markeins_irq_setup invoked.\n")); - /* by default, interrupts are disabled. */ emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0); emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0); -- cgit v1.2.3 From 49618d652b2fe9c63808c7a2cc7089aa594cf521 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:35:59 +0900 Subject: MIPS: Markeins: Extract ll_emma2rh_* functions These functions are completely ineffective. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/markeins/irq.c | 83 ++++++++++++++++++++----------------------- 1 file changed, 38 insertions(+), 45 deletions(-) (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 03a663a372f..9d6c8667ee4 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -55,44 +55,36 @@ * */ -void ll_emma2rh_irq_enable(int emma2rh_irq) +static void emma2rh_irq_enable(unsigned int irq) { u32 reg_value; u32 reg_bitmask; u32 reg_index; + irq -= EMMA2RH_IRQ_BASE; + reg_index = EMMA2RH_BHIF_INT_EN_0 + - (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * - (emma2rh_irq / 32); + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32); reg_value = emma2rh_in32(reg_index); - reg_bitmask = 0x1 << (emma2rh_irq % 32); + reg_bitmask = 0x1 << (irq % 32); emma2rh_out32(reg_index, reg_value | reg_bitmask); } -void ll_emma2rh_irq_disable(int emma2rh_irq) +static void emma2rh_irq_disable(unsigned int irq) { u32 reg_value; u32 reg_bitmask; u32 reg_index; + irq -= EMMA2RH_IRQ_BASE; + reg_index = EMMA2RH_BHIF_INT_EN_0 + - (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * - (emma2rh_irq / 32); + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32); reg_value = emma2rh_in32(reg_index); - reg_bitmask = 0x1 << (emma2rh_irq % 32); + reg_bitmask = 0x1 << (irq % 32); emma2rh_out32(reg_index, reg_value & ~reg_bitmask); } -static void emma2rh_irq_enable(unsigned int irq) -{ - ll_emma2rh_irq_enable(irq - EMMA2RH_IRQ_BASE); -} - -static void emma2rh_irq_disable(unsigned int irq) -{ - ll_emma2rh_irq_disable(irq - EMMA2RH_IRQ_BASE); -} - struct irq_chip emma2rh_irq_controller = { .name = "emma2rh_irq", .ack = emma2rh_irq_disable, @@ -111,34 +103,28 @@ void emma2rh_irq_init(void) handle_level_irq); } -void ll_emma2rh_sw_irq_enable(int irq) +static void emma2rh_sw_irq_enable(unsigned int irq) { u32 reg; + irq -= EMMA2RH_SW_IRQ_BASE; + reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); reg |= 1 << irq; emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); } -void ll_emma2rh_sw_irq_disable(int irq) +static void emma2rh_sw_irq_disable(unsigned int irq) { u32 reg; + irq -= EMMA2RH_SW_IRQ_BASE; + reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); reg &= ~(1 << irq); emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); } -static void emma2rh_sw_irq_enable(unsigned int irq) -{ - ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE); -} - -static void emma2rh_sw_irq_disable(unsigned int irq) -{ - ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE); -} - struct irq_chip emma2rh_sw_irq_controller = { .name = "emma2rh_sw_irq", .ack = emma2rh_sw_irq_disable, @@ -157,45 +143,52 @@ void emma2rh_sw_irq_init(void) handle_level_irq); } -void ll_emma2rh_gpio_irq_enable(int irq) +static void emma2rh_gpio_irq_enable(unsigned int irq) { u32 reg; + irq -= EMMA2RH_GPIO_IRQ_BASE; + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); reg |= 1 << irq; emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); } -void ll_emma2rh_gpio_irq_disable(int irq) +static void emma2rh_gpio_irq_disable(unsigned int irq) { u32 reg; + irq -= EMMA2RH_GPIO_IRQ_BASE; + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); reg &= ~(1 << irq); emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); } -static void emma2rh_gpio_irq_enable(unsigned int irq) -{ - ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); -} - -static void emma2rh_gpio_irq_disable(unsigned int irq) -{ - ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE); -} - static void emma2rh_gpio_irq_ack(unsigned int irq) { + u32 reg; + irq -= EMMA2RH_GPIO_IRQ_BASE; emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); - ll_emma2rh_gpio_irq_disable(irq); + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg &= ~(1 << irq); + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); } static void emma2rh_gpio_irq_end(unsigned int irq) { - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); + u32 reg; + + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { + + irq -= EMMA2RH_GPIO_IRQ_BASE; + + reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); + reg |= 1 << irq; + emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); + } } struct irq_chip emma2rh_gpio_irq_controller = { -- cgit v1.2.3 From d1a8e2a6da5bea09452495748891a4ea9e42035e Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Fri, 24 Oct 2008 01:36:33 +0900 Subject: MIPS: Markeins: Remove unnecessary define and cleanup comments, etc. Signed-off-by: Shinya Kuribayashi Signed-off-by: Ralf Baechle --- arch/mips/emma/markeins/irq.c | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'arch/mips/emma') diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 9d6c8667ee4..c2583ecc93c 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -37,24 +37,6 @@ #include -/* number of total irqs supported by EMMA2RH */ -#define NUM_EMMA2RH_IRQ 96 - -/* - * IRQ mapping - * - * 0-7: 8 CPU interrupts - * 0 - software interrupt 0 - * 1 - software interrupt 1 - * 2 - most Vrc5477 interrupts are routed to this pin - * 3 - (optional) some other interrupts routed to this pin for debugg - * 4 - not used - * 5 - not used - * 6 - not used - * 7 - cpu timer (used by default) - * - */ - static void emma2rh_irq_enable(unsigned int irq) { u32 reg_value; @@ -347,5 +329,3 @@ asmlinkage void plat_irq_dispatch(void) else spurious_interrupt(); } - - -- cgit v1.2.3