From e01402b115cccb6357f956649487aca2c6f7fbba Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 14 Jul 2005 15:57:16 +0000 Subject: More AP / SP bits for the 34K, the Malta bits and things. Still wants a little polishing. Signed-off-by: Ralf Baechle --- arch/mips/kernel/genex.S | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'arch/mips/kernel/genex.S') diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 349ec301168..fd904d1e419 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -147,6 +147,38 @@ NESTED(except_vec_ejtag_debug, 0, sp) __FINIT +/* + * Vectored interrupt handler. + * This prototype is copied to ebase + n*IntCtl.VS and patched + * to invoke the handler + */ +NESTED(except_vec_vi, 0, sp) + SAVE_SOME + SAVE_AT + .set push + .set noreorder +EXPORT(except_vec_vi_lui) + lui v0, 0 /* Patched */ + j except_vec_vi_handler +EXPORT(except_vec_vi_ori) + ori v0, 0 /* Patched */ + .set pop + END(except_vec_vi) +EXPORT(except_vec_vi_end) + +/* + * Common Vectored Interrupt code + * Complete the register saves and invoke the handler which is passed in $v0 + */ +NESTED(except_vec_vi_handler, 0, sp) + SAVE_TEMP + SAVE_STATIC + CLI + move a0, sp + jalr v0 + j ret_from_irq + END(except_vec_vi_handler) + /* * EJTAG debug exception handler. */ -- cgit v1.2.3