From 2882b0c63ac6085fd5c18959240b6f7d6ffb8d5b Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Sat, 22 Aug 2009 18:09:27 +0200 Subject: MIPS: Alchemy: get rid of allow_au1k_wait Eliminate the 'allow_au1k_wait' variable. MIPS kernel installs the Alchemy-specific wait code before timer initialization; if the C0 timer must be used for timekeeping the wait function is set to NULL which means no wait implementation is available. As a sideeffect, the 'wait instruction available' output in /proc/cpuinfo now correctly indicates whether 'wait' is usable. Run-tested on DB1200. Signed-off-by: Manuel Lauss Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 1abe9905c9c..6e4807a19c0 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -91,16 +91,13 @@ static void rm7k_wait_irqoff(void) local_irq_enable(); } -/* The Au1xxx wait is available only if using 32khz counter or - * external timer source, but specifically not CP0 Counter. */ -int allow_au1k_wait; - +/* + * The Au1xxx wait is available only if using 32khz counter or + * external timer source, but specifically not CP0 Counter. + * alchemy/common/time.c may override cpu_wait! + */ static void au1k_wait(void) { - if (!allow_au1k_wait) - return; - - /* using the wait instruction makes CP0 counter unusable */ __asm__(" .set mips3 \n" " cache 0x14, 0(%0) \n" " cache 0x14, 32(%0) \n" -- cgit v1.2.3