From a074f0e89faa8989bdbd6110785d2aafe7df5285 Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Fri, 10 Jul 2009 01:51:27 -0700 Subject: MIPS: SPRAM: Clean up support code a little Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 8 +------- arch/mips/kernel/spram.c | 4 +--- 2 files changed, 2 insertions(+), 10 deletions(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index f709657e4dc..7a51866068a 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -23,7 +23,7 @@ #include #include #include - +#include /* * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, * the implementation of the "wait" feature differs between CPU families. This @@ -711,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c) mips_probe_watch_registers(c); } -#ifdef CONFIG_CPU_MIPSR2 -extern void spram_config(void); -#else -static inline void spram_config(void) {} -#endif - static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) { decode_configs(c); diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c index 71b47376cf7..1821d12a641 100644 --- a/arch/mips/kernel/spram.c +++ b/arch/mips/kernel/spram.c @@ -13,7 +13,6 @@ #include #include -#include #include #include #include @@ -198,8 +197,7 @@ static __cpuinit void probe_spram(char *type, offset += 2 * SPRAM_TAG_STRIDE; } } - -__cpuinit void spram_config(void) +void __cpuinit spram_config(void) { struct cpuinfo_mips *c = ¤t_cpu_data; unsigned int config0; -- cgit v1.2.3