From 234fcd1484a66158b561b36b421547f0ab85fee9 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 8 Mar 2008 09:56:28 +0000 Subject: [MIPS] Fix loads of section missmatches Signed-off-by: Ralf Baechle --- arch/mips/mipssim/sim_time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/mipssim/sim_time.c') diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c index e39bbe989da..881ecbc1fa2 100644 --- a/arch/mips/mipssim/sim_time.c +++ b/arch/mips/mipssim/sim_time.c @@ -83,7 +83,7 @@ static void mips_timer_dispatch(void) } -unsigned __init get_c0_compare_int(void) +unsigned __cpuinit get_c0_compare_int(void) { #ifdef MSC01E_INT_BASE if (cpu_has_veic) { -- cgit v1.2.3