From a951f2829adba3f2945172b740528fce4366907d Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 12 Oct 2009 22:54:47 +0200 Subject: MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4 Based on original patch by Chris Dearman . Signed-off-by: Ralf Baechle --- arch/mips/mti-malta/malta-pci.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/mips/mti-malta/malta-pci.c') diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c index b9743190609..efdb4f66ffc 100644 --- a/arch/mips/mti-malta/malta-pci.c +++ b/arch/mips/mti-malta/malta-pci.c @@ -241,3 +241,16 @@ void __init mips_pcibios_init(void) register_pci_controller(controller); } + +/* Enable PCI 2.1 compatibility in PIIX4 */ +static void __init quirk_dlcsetup(struct pci_dev *dev) +{ + u8 odlc, ndlc; + (void) pci_read_config_byte(dev, 0x82, &odlc); + /* Enable passive releases and delayed transaction */ + ndlc = odlc | 7; + (void) pci_write_config_byte(dev, 0x82, ndlc); +} + +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, + quirk_dlcsetup); -- cgit v1.2.3 From 7098f748283b4c056cca9c284c476b03f004ca12 Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Fri, 10 Jul 2009 01:54:09 -0700 Subject: MIPS: GIC: Random fixes and enhancements. Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle --- arch/mips/mti-malta/malta-pci.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'arch/mips/mti-malta/malta-pci.c') diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c index efdb4f66ffc..2fbfa1a8c3a 100644 --- a/arch/mips/mti-malta/malta-pci.c +++ b/arch/mips/mti-malta/malta-pci.c @@ -27,7 +27,7 @@ #include #include - +#include #include #include #include @@ -201,7 +201,11 @@ void __init mips_pcibios_init(void) msc_mem_resource.start = start & mask; msc_mem_resource.end = (start & mask) | ~mask; msc_controller.mem_offset = (start & mask) - (map & mask); - +#ifdef CONFIG_MIPS_CMP + if (gcmp_niocu()) + gcmp_setregion(0, start, mask, + GCMP_GCB_GCMPB_CMDEFTGT_IOCU1); +#endif MSC_READ(MSC01_PCI_SC2PIOBASL, start); MSC_READ(MSC01_PCI_SC2PIOMSKL, mask); MSC_READ(MSC01_PCI_SC2PIOMAPL, map); @@ -209,7 +213,11 @@ void __init mips_pcibios_init(void) msc_io_resource.end = (map & mask) | ~mask; msc_controller.io_offset = 0; ioport_resource.end = ~mask; - +#ifdef CONFIG_MIPS_CMP + if (gcmp_niocu()) + gcmp_setregion(1, start, mask, + GCMP_GCB_GCMPB_CMDEFTGT_IOCU1); +#endif /* If ranges overlap I/O takes precedence. */ start = start & mask; end = start | ~mask; -- cgit v1.2.3