From 36a885306fdf7bb557c773309c993bfb2d0d693c Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 1 Mar 2007 11:56:43 +0000 Subject: [MIPS] Fix and cleanup the mess that a dozen prom_printf variants are. early_printk is a so much saner thing. Signed-off-by: Ralf Baechle --- arch/mips/sibyte/Kconfig | 2 ++ arch/mips/sibyte/bcm1480/irq.c | 2 +- arch/mips/sibyte/bcm1480/setup.c | 10 +++++----- arch/mips/sibyte/cfe/setup.c | 8 ++++---- arch/mips/sibyte/sb1250/setup.c | 24 ++++++++++++------------ 5 files changed, 24 insertions(+), 22 deletions(-) (limited to 'arch/mips/sibyte') diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig index ec7a2cffacf..67dac6204b6 100644 --- a/arch/mips/sibyte/Kconfig +++ b/arch/mips/sibyte/Kconfig @@ -116,6 +116,7 @@ config SB1_CERR_STALL config SIBYTE_CFE bool "Booting from CFE" depends on SIBYTE_SB1xxx_SOC + select SYS_HAS_EARLY_PRINTK help Make use of the CFE API for enumerating available memory, controlling secondary CPUs, and possibly console output. @@ -131,6 +132,7 @@ config SIBYTE_CFE_CONSOLE config SIBYTE_STANDALONE bool depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE + select SYS_HAS_EARLY_PRINTK default y config SIBYTE_STANDALONE_RAM_SIZE diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 1dc5d05d896..20af0f1bb7b 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -420,7 +420,7 @@ void __init arch_init_irq(void) #ifdef CONFIG_GDB_CONSOLE register_gdb_console(); #endif - prom_printf("Waiting for GDB on UART port %d\n", kgdb_port); + printk("Waiting for GDB on UART port %d\n", kgdb_port); set_debug_traps(); breakpoint(); } diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c index 8236d0c4854..bdaac34ae70 100644 --- a/arch/mips/sibyte/bcm1480/setup.c +++ b/arch/mips/sibyte/bcm1480/setup.c @@ -69,7 +69,7 @@ static inline int sys_rev_decode(void) break; default: - prom_printf("Unknown part type %x\n", part_type); + printk("Unknown part type %x\n", part_type); ret = 1; break; } @@ -102,7 +102,7 @@ static inline int setup_bcm1x80_bcm1x55(void) pass_str = "B0 (pass2)"; break; default: - prom_printf("Unknown %s rev %x\n", soc_str, soc_pass); + printk("Unknown %s rev %x\n", soc_str, soc_pass); periph_rev = 1; pass_str = "Unknown Revision"; break; @@ -122,14 +122,14 @@ void bcm1480_setup(void) soc_pass = G_SYS_REVISION(sys_rev); if (sys_rev_decode()) { - prom_printf("Restart after failure to identify SiByte chip\n"); + printk("Restart after failure to identify SiByte chip\n"); machine_restart(NULL); } plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25); - prom_printf("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n", + printk("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n", soc_str, pass_str, zbbus_mhz * 2, sb1_pass); - prom_printf("Board type: %s\n", get_system_type()); + printk("Board type: %s\n", get_system_type()); } diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c index 9e6099e6962..ae4a92c3e52 100644 --- a/arch/mips/sibyte/cfe/setup.c +++ b/arch/mips/sibyte/cfe/setup.c @@ -221,10 +221,10 @@ static int __init initrd_setup(char *str) goto fail; } initrd_end = initrd_start + initrd_size; - prom_printf("Found initrd of %lx@%lx\n", initrd_size, initrd_start); + printk("Found initrd of %lx@%lx\n", initrd_size, initrd_start); return 1; fail: - prom_printf("Bad initrd argument. Disabling initrd\n"); + printk("Bad initrd argument. Disabling initrd\n"); initrd_start = 0; initrd_end = 0; return 1; @@ -281,7 +281,7 @@ void __init prom_init(void) } if (cfe_eptseal != CFE_EPTSEAL) { /* too early for panic to do any good */ - prom_printf("CFE's entrypoint seal doesn't match. Spinning."); + printk("CFE's entrypoint seal doesn't match. Spinning."); while (1) ; } cfe_init(cfe_handle, cfe_ept); @@ -303,7 +303,7 @@ void __init prom_init(void) } else { /* The loader should have set the command line */ /* too early for panic to do any good */ - prom_printf("LINUX_CMDLINE not defined in cfe."); + printk("LINUX_CMDLINE not defined in cfe."); while (1) ; } } diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c index d0ee1d5b822..1cb042eab72 100644 --- a/arch/mips/sibyte/sb1250/setup.c +++ b/arch/mips/sibyte/sb1250/setup.c @@ -67,7 +67,7 @@ static int __init sys_rev_decode(void) ret = setup_bcm112x(); break; default: - prom_printf("Unknown SOC type %x\n", soc_type); + printk("Unknown SOC type %x\n", soc_type); ret = 1; break; } @@ -112,7 +112,7 @@ static int __init setup_bcm1250(void) pass_str = "A0-A6"; war_pass = K_SYS_REVISION_BCM1250_PASS2; } else { - prom_printf("Unknown BCM1250 rev %x\n", soc_pass); + printk("Unknown BCM1250 rev %x\n", soc_pass); ret = 1; } break; @@ -140,7 +140,7 @@ static int __init setup_bcm112x(void) pass_str = "A2"; break; default: - prom_printf("Unknown %s rev %x\n", soc_str, soc_pass); + printk("Unknown %s rev %x\n", soc_str, soc_pass); ret = 1; } return ret; @@ -158,21 +158,21 @@ void __init sb1250_setup(void) soc_pass = G_SYS_REVISION(sys_rev); if (sys_rev_decode()) { - prom_printf("Restart after failure to identify SiByte chip\n"); + printk("Restart after failure to identify SiByte chip\n"); machine_restart(NULL); } plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25); - prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n", + printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n", soc_str, pass_str, zbbus_mhz * 2, sb1_pass); - prom_printf("Board type: %s\n", get_system_type()); + printk("Board type: %s\n", get_system_type()); switch (war_pass) { case K_SYS_REVISION_BCM1250_PASS1: #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS - prom_printf("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " + printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " "and the kernel doesn't have the proper " "workarounds compiled in. @@@@\n"); bad_config = 1; @@ -182,27 +182,27 @@ void __init sb1250_setup(void) /* Pass 2 - easiest as default for now - so many numbers */ #if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \ !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) - prom_printf("@@@@ This is a BCM1250 A3-A10 board, and the " + printk("@@@@ This is a BCM1250 A3-A10 board, and the " "kernel doesn't have the proper workarounds " "compiled in. @@@@\n"); bad_config = 1; #endif #ifdef CONFIG_CPU_HAS_PREFETCH - prom_printf("@@@@ Prefetches may be enabled in this kernel, " + printk("@@@@ Prefetches may be enabled in this kernel, " "but are buggy on this board. @@@@\n"); bad_config = 1; #endif break; case K_SYS_REVISION_BCM1250_PASS2_2: #ifndef CONFIG_SB1_PASS_2_WORKAROUNDS - prom_printf("@@@@ This is a BCM1250 B1/B2. board, and the " + printk("@@@@ This is a BCM1250 B1/B2. board, and the " "kernel doesn't have the proper workarounds " "compiled in. @@@@\n"); bad_config = 1; #endif #if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \ !defined(CONFIG_CPU_HAS_PREFETCH) - prom_printf("@@@@ This is a BCM1250 B1/B2, but the kernel is " + printk("@@@@ This is a BCM1250 B1/B2, but the kernel is " "conservatively configured for an 'A' stepping. " "@@@@\n"); #endif @@ -211,7 +211,7 @@ void __init sb1250_setup(void) break; } if (bad_config) { - prom_printf("Invalid configuration for this chip.\n"); + printk("Invalid configuration for this chip.\n"); machine_restart(NULL); } } -- cgit v1.2.3