From d2e6675fffe435989e51c084600581ca58048c13 Mon Sep 17 00:00:00 2001 From: Harvey Harrison Date: Tue, 2 Dec 2008 03:28:17 +0000 Subject: parisc: use the new byteorder headers Signed-off-by: Harvey Harrison Cc: Matthew Wilcox Signed-off-by: Andrew Morton Signed-off-by: Kyle McMartin --- arch/parisc/include/asm/byteorder.h | 37 ++++++++++++------------------------- 1 file changed, 12 insertions(+), 25 deletions(-) (limited to 'arch/parisc/include/asm') diff --git a/arch/parisc/include/asm/byteorder.h b/arch/parisc/include/asm/byteorder.h index db148313de5..83095c5bb37 100644 --- a/arch/parisc/include/asm/byteorder.h +++ b/arch/parisc/include/asm/byteorder.h @@ -4,9 +4,10 @@ #include #include -#ifdef __GNUC__ +#define __BIG_ENDIAN +#define __SWAB_64_THRU_32__ -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) +static inline __attribute_const__ __u16 __arch_swab16(__u16 x) { __asm__("dep %0, 15, 8, %0\n\t" /* deposit 00ab -> 0bab */ "shd %%r0, %0, 8, %0" /* shift 000000ab -> 00ba */ @@ -14,8 +15,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) : "0" (x)); return x; } +#define __arch_swab16 __arch_swab16 -static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x) +static inline __attribute_const__ __u32 __arch_swab24(__u32 x) { __asm__("shd %0, %0, 8, %0\n\t" /* shift xabcxabc -> cxab */ "dep %0, 15, 8, %0\n\t" /* deposit cxab -> cbab */ @@ -25,7 +27,7 @@ static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x) return x; } -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) +static inline __attribute_const__ __u32 __arch_swab32(__u32 x) { unsigned int temp; __asm__("shd %0, %0, 16, %1\n\t" /* shift abcdabcd -> cdab */ @@ -35,7 +37,7 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) : "0" (x)); return x; } - +#define __arch_swab32 __arch_swab32 #if BITS_PER_LONG > 32 /* @@ -48,7 +50,8 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) ** HSHR 67452301 -> *6*4*2*0 into %0 ** OR %0 | %1 -> 76543210 into %0 (all done!) */ -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) { +static inline __attribute_const__ __u64 __arch_swab64(__u64 x) +{ __u64 temp; __asm__("permh,3210 %0, %0\n\t" "hshl %0, 8, %1\n\t" @@ -58,25 +61,9 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) { : "0" (x)); return x; } -#define __arch__swab64(x) ___arch__swab64(x) -#define __BYTEORDER_HAS_U64__ -#elif !defined(__STRICT_ANSI__) -static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) -{ - __u32 t1 = ___arch__swab32((__u32) x); - __u32 t2 = ___arch__swab32((__u32) (x >> 32)); - return (((__u64) t1 << 32) | t2); -} -#define __arch__swab64(x) ___arch__swab64(x) -#define __BYTEORDER_HAS_U64__ -#endif - -#define __arch__swab16(x) ___arch__swab16(x) -#define __arch__swab24(x) ___arch__swab24(x) -#define __arch__swab32(x) ___arch__swab32(x) - -#endif /* __GNUC__ */ +#define __arch_swab64 __arch_swab64 +#endif /* BITS_PER_LONG > 32 */ -#include +#include #endif /* _PARISC_BYTEORDER_H */ -- cgit v1.2.3 From 0063507787ee7b385a8cbe7521469acf33341eb6 Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Sun, 14 Dec 2008 11:44:37 +0900 Subject: parisc: remove dead BIO_VMERGE_BOUNDARY and BIO_VMERGE_MAX_SIZE definitions The block layer dropped the virtual merge feature (b8b3e16cfe6435d961f6aaebcfd52a1ff2a988c5). BIO_VMERGE_BOUNDARY and BIO_VMERGE_MAX_SIZE definitions are meaningless now. Signed-off-by: FUJITA Tomonori Acked-by: Grant Grundler Signed-off-by: Kyle McMartin --- arch/parisc/include/asm/io.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch/parisc/include/asm') diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h index 55ddb184210..b92efb307e2 100644 --- a/arch/parisc/include/asm/io.h +++ b/arch/parisc/include/asm/io.h @@ -4,12 +4,6 @@ #include #include -extern unsigned long parisc_vmerge_boundary; -extern unsigned long parisc_vmerge_max_size; - -#define BIO_VMERGE_BOUNDARY parisc_vmerge_boundary -#define BIO_VMERGE_MAX_SIZE parisc_vmerge_max_size - #define virt_to_phys(a) ((unsigned long)__pa(a)) #define phys_to_virt(a) __va(a) #define virt_to_bus virt_to_phys -- cgit v1.2.3 From 0ca5506da6795ebc700fd41cef2a7785613fbe28 Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Sun, 21 Dec 2008 00:39:04 +0000 Subject: parisc: use leX_to_cpu in place of __fswabX Signed-off-by: Kyle McMartin --- arch/parisc/include/asm/io.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/parisc/include/asm') diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h index b92efb307e2..d3031d1f9d0 100644 --- a/arch/parisc/include/asm/io.h +++ b/arch/parisc/include/asm/io.h @@ -176,9 +176,9 @@ static inline void __raw_writeq(unsigned long long b, volatile void __iomem *add /* readb can never be const, so use __fswab instead of le*_to_cpu */ #define readb(addr) __raw_readb(addr) -#define readw(addr) __fswab16(__raw_readw(addr)) -#define readl(addr) __fswab32(__raw_readl(addr)) -#define readq(addr) __fswab64(__raw_readq(addr)) +#define readw(addr) le16_to_cpu(__raw_readw(addr)) +#define readl(addr) le32_to_cpu(__raw_readl(addr)) +#define readq(addr) le64_to_cpu(__raw_readq(addr)) #define writeb(b, addr) __raw_writeb(b, addr) #define writew(b, addr) __raw_writew(cpu_to_le16(b), addr) #define writel(b, addr) __raw_writel(cpu_to_le32(b), addr) -- cgit v1.2.3 From a60715f58907d4e1db7be6c31fa050c993e119b5 Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Mon, 22 Dec 2008 12:29:02 -0500 Subject: parisc: factor out sid to protid conversion Create a new __space_to_prot inline to convert the space id (mmu context) to a protection id. Sadly it doesn't look like the #ifdef can be eliminated since relying on the compiler to not truncate a bit on return (ctx >> SPACEID_SHIFT) << 1; seems a little dodgy. Signed-off-by: Kyle McMartin --- arch/parisc/include/asm/mmu_context.h | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'arch/parisc/include/asm') diff --git a/arch/parisc/include/asm/mmu_context.h b/arch/parisc/include/asm/mmu_context.h index 85856c74ad1..93028975e2c 100644 --- a/arch/parisc/include/asm/mmu_context.h +++ b/arch/parisc/include/asm/mmu_context.h @@ -34,16 +34,21 @@ destroy_context(struct mm_struct *mm) mm->context = 0; } -static inline void load_context(mm_context_t context) +static inline unsigned long __space_to_prot(mm_context_t ctx) { - mtsp(context, 3); #if SPACEID_SHIFT == 0 - mtctl(context << 1,8); + return context << 1; #else - mtctl(context >> (SPACEID_SHIFT - 1),8); + return context >> (SPACEID_SHIFT - 1); #endif } +static inline void load_context(mm_context_t context) +{ + mtsp(context, 3); + mtctl(__space_to_prot(context), 8); +} + static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { -- cgit v1.2.3 From 70da2d96306bea9ab56a1c6907b19f889dcdda5c Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Mon, 22 Dec 2008 23:58:31 +0000 Subject: parisc: fix braino in commit adding __space_to_prot Shouldn't commit without building before morning coffee... Signed-off-by: Kyle McMartin --- arch/parisc/include/asm/mmu_context.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/parisc/include/asm') diff --git a/arch/parisc/include/asm/mmu_context.h b/arch/parisc/include/asm/mmu_context.h index 93028975e2c..354b2aca990 100644 --- a/arch/parisc/include/asm/mmu_context.h +++ b/arch/parisc/include/asm/mmu_context.h @@ -34,7 +34,7 @@ destroy_context(struct mm_struct *mm) mm->context = 0; } -static inline unsigned long __space_to_prot(mm_context_t ctx) +static inline unsigned long __space_to_prot(mm_context_t context) { #if SPACEID_SHIFT == 0 return context << 1; -- cgit v1.2.3 From ef017bebd01c1b4e075d649eee0c8c1c79f9ceb9 Mon Sep 17 00:00:00 2001 From: Helge Deller Date: Wed, 31 Dec 2008 03:12:10 +0000 Subject: parisc: Replace NR_CPUS in parisc code parisc: Replace most arrays sized by NR_CPUS with percpu variables. Signed-off-by: Helge Deller Signed-off-by: Kyle McMartin --- arch/parisc/include/asm/processor.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/parisc/include/asm') diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h index 3c9d34844c8..9d64df8754b 100644 --- a/arch/parisc/include/asm/processor.h +++ b/arch/parisc/include/asm/processor.h @@ -17,6 +17,7 @@ #include #include #include +#include #endif /* __ASSEMBLY__ */ #define KERNEL_STACK_SIZE (4*PAGE_SIZE) @@ -109,8 +110,7 @@ struct cpuinfo_parisc { }; extern struct system_cpuinfo_parisc boot_cpu_data; -extern struct cpuinfo_parisc cpu_data[NR_CPUS]; -#define current_cpu_data cpu_data[smp_processor_id()] +DECLARE_PER_CPU(struct cpuinfo_parisc, cpu_data); #define CPU_HVERSION ((boot_cpu_data.hversion >> 4) & 0x0FFF) -- cgit v1.2.3 From 5fbf6635a951a75870be9874580c55da538fb025 Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Mon, 8 Dec 2008 05:15:51 +0000 Subject: parisc: fix ipv6 checksum ipv6 recently started exhibiting the same symptoms as ipv4 was, add a memory clobber around inline checksum assembly that fribbles memory to ensure gcc doesn't erroneously cache across it. Signed-off-by: Kyle McMartin --- arch/parisc/include/asm/checksum.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/parisc/include/asm') diff --git a/arch/parisc/include/asm/checksum.h b/arch/parisc/include/asm/checksum.h index e9639ccc3fc..c84b2fcb18a 100644 --- a/arch/parisc/include/asm/checksum.h +++ b/arch/parisc/include/asm/checksum.h @@ -182,7 +182,7 @@ static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, #endif : "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len) : "0" (sum), "1" (saddr), "2" (daddr), "3" (len), "r" (proto) - : "r19", "r20", "r21", "r22"); + : "r19", "r20", "r21", "r22", "memory"); return csum_fold(sum); } -- cgit v1.2.3 From c61c25eb02757ecf697015ef4ae3675c5e114e2e Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Sat, 20 Dec 2008 02:29:06 +0000 Subject: parisc: fix kernel crash (protection id trap) when compiling ruby1.9 On Wed, Dec 17, 2008 at 11:46:05PM +0100, Helge Deller wrote: > Honestly, I can't decide whether to apply this. It really should never happen in the kernel, since the kernel can guarantee it won't get the access rights failure (highest privilege level, and can set %sr and %protid to whatever it wants.) It really genuinely is a bug that probably should panic the kernel. The only precedent I can easily see is x86 fixing up a bad iret with a general protection fault, which is more or less analogous to code 27 here. On the other hand, taking the exception on a userspace access really isn't all that critical, and there's fundamentally little reason for the kernel not to SIGSEGV the process, and continue... Argh. (btw, I've instrumented my do_sys_poll with a pile of assertions that %cr8 << 1 == %sr3 == current->mm.context... let's see if where we're getting corrupted is deterministic, though, I would guess that it won't be.) Signed-off-by: Kyle McMartin --- arch/parisc/include/asm/uaccess.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/parisc/include/asm') diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h index 4878b9501f2..1c6dbb6f6e5 100644 --- a/arch/parisc/include/asm/uaccess.h +++ b/arch/parisc/include/asm/uaccess.h @@ -241,4 +241,6 @@ unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned lo #define __copy_to_user_inatomic __copy_to_user #define __copy_from_user_inatomic __copy_from_user +int fixup_exception(struct pt_regs *regs); + #endif /* __PARISC_UACCESS_H */ -- cgit v1.2.3