From 64f495323c9a902b3e59fe0a588585102bb3b13e Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Sat, 22 Apr 2006 00:48:22 -0600 Subject: [PARISC] Ensure all ldcw uses are ldcw,co on pa2.0 ldcw,co should always be used on pa2.0, otherwise the strict cache width alignment requirement is not relaxed. Signed-off-by: Kyle McMartin --- arch/parisc/kernel/entry.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/parisc/kernel/entry.S') diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index d9e53cf0372..630730c32a5 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -1638,7 +1638,7 @@ dbit_trap_20w: load32 PA(pa_dbit_lock),t0 dbit_spin_20w: - ldcw 0(t0),t1 + LDCW 0(t0),t1 cmpib,= 0,t1,dbit_spin_20w nop @@ -1674,7 +1674,7 @@ dbit_trap_11: load32 PA(pa_dbit_lock),t0 dbit_spin_11: - ldcw 0(t0),t1 + LDCW 0(t0),t1 cmpib,= 0,t1,dbit_spin_11 nop @@ -1714,7 +1714,7 @@ dbit_trap_20: load32 PA(pa_dbit_lock),t0 dbit_spin_20: - ldcw 0(t0),t1 + LDCW 0(t0),t1 cmpib,= 0,t1,dbit_spin_20 nop -- cgit v1.2.3