From f0c8ac8083cbd9347b398bfddcca20f1e2786016 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 12 Sep 2007 11:52:31 -0500 Subject: [POWERPC] DTS cleanup Removed the following cruft from .dts files: * 32-bit in cpu node -- doesn't exist in any spec and not used by kernel * removed built-in (chrp legacy) * Removed #interrupt-cells in places they don't need to be set * Fixed ranges on lite5200* * Removed clock-frequency from i8259 pic node, not sure where this came from * Removed big-endian from i8259 pic nodes, this was just bogus Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8541cds.dts | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch/powerpc/boot/dts/mpc8541cds.dts') diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index fb0b647f8c2..98afd4df27b 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts @@ -30,7 +30,6 @@ timebase-frequency = <0>; // 33 MHz, from uboot bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot - 32-bit; }; }; @@ -42,7 +41,6 @@ soc8541@e0000000 { #address-cells = <1>; #size-cells = <1>; - #interrupt-cells = <2>; device_type = "soc"; ranges = <0 e0000000 00100000>; reg = ; // CCSRBAR 1M @@ -197,15 +195,12 @@ device_type = "pci"; i8259@19000 { - clock-frequency = <0>; interrupt-controller; device_type = "interrupt-controller"; reg = <19000 0 0 0 1>; #address-cells = <0>; #interrupt-cells = <2>; - built-in; compatible = "chrp,iic"; - big-endian; interrupts = <1>; interrupt-parent = <&pci1>; }; @@ -240,7 +235,6 @@ #address-cells = <0>; #interrupt-cells = <2>; reg = <40000 40000>; - built-in; compatible = "chrp,open-pic"; device_type = "open-pic"; big-endian; -- cgit v1.2.3