From c3071951d0acd33b5c3f820fb5eaa3a9c2a8f212 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 10 Feb 2009 22:26:06 -0600 Subject: powerpc/fsl-booke: Add support for tlbilx instructions The e500mc core supports the new tlbilx instructions that do core local invalidates and also provide us the ability to take down all TLB entries matching a given PID. Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/mmu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/include/asm/mmu.h') diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index 5c78079cfa3..dc82dcd06ae 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h @@ -36,9 +36,9 @@ */ #define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000) -/* Enable use of tlbilx invalidate-by-PID variant. +/* Enable use of tlbilx invalidate instructions. */ -#define MMU_FTR_USE_TLBILX_PID ASM_CONST(0x00080000) +#define MMU_FTR_USE_TLBILX ASM_CONST(0x00080000) /* This indicates that the processor cannot handle multiple outstanding * broadcast tlbivax or tlbsync. This makes the code use a spinlock -- cgit v1.2.3