From fca622c5b21a259950a2964ceca7b6c2a23c849f Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 30 Apr 2008 05:23:21 -0500 Subject: [POWERPC] 40x/Book-E: Save/restore volatile exception registers On machines with more than one exception level any system register that might be modified by the "normal" exception level needs to be saved and restored on taking a higher level exception. We already are saving and restoring ESR and DEAR. For critical level add SRR0/1. For debug level add CSRR0/1 and SRR0/1. For machine check level add DSRR0/1, CSRR0/1, and SRR0/1. On FSL Book-E parts we always save/restore the MAS registers for critical, debug, and machine check level exceptions. On 44x we always save/restore the MMUCR. Additionally, we save and restore the ksp_limit since we have to adjust it for each exception level. Signed-off-by: Kumar Gala Acked-by: Paul Mackerras --- arch/powerpc/kernel/head_40x.S | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/powerpc/kernel/head_40x.S') diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S index f2cf60d38f7..56d8e5d90c5 100644 --- a/arch/powerpc/kernel/head_40x.S +++ b/arch/powerpc/kernel/head_40x.S @@ -93,6 +93,12 @@ _ENTRY(crit_r10) .space 4 _ENTRY(crit_r11) .space 4 +_ENTRY(crit_srr0) + .space 4 +_ENTRY(crit_srr1) + .space 4 +_ENTRY(saved_ksp_limit) + .space 4 /* * Exception vector entry code. This code runs with address translation -- cgit v1.2.3