From 7659c038d3d0a635b5aeff04aed523d7b6c1dde8 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 25 Jul 2007 00:29:53 -0500 Subject: [POWERPC] Fix PCI indirect for big-endian cfg_addr We didn't actually propogate the flag we pass into setup_indirect_pci() to set indirect_type and thus were getting the wrong endianness if PPC_INDIRECT_TYPE_BIG_ENDIAN was set. Also, we need to or in additional flags rather than just doing a direct assignment. Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/fsl_pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc/sysdev/fsl_pci.c') diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 51c223385fe..87122275c9b 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -216,7 +216,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) /* check PCI express link status */ if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { - hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG | + hose->indirect_type |= PPC_INDIRECT_TYPE_EXT_REG | PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS; if (fsl_pcie_check_link(hose)) hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; -- cgit v1.2.3