From e44b8941908ec9ccf03b52713c9e7d3471bada8c Mon Sep 17 00:00:00 2001 From: Dale Farnsworth Date: Sat, 12 May 2007 10:55:24 +1000 Subject: [POWERPC] Add interrupt support for Marvell mv64x60 chips There are 3 interrupt groups each with its own status/mask registers. We use a separate struct irq_chip for each interrupt group and handle interrupts in two stages or levels: level 1 selects the appropriate struct irq_chip, and level 2 selects individual interrupts within that irq_chip. Signed-off-by: Dale Farnsworth Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/mv64x60.h | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 arch/powerpc/sysdev/mv64x60.h (limited to 'arch/powerpc/sysdev/mv64x60.h') diff --git a/arch/powerpc/sysdev/mv64x60.h b/arch/powerpc/sysdev/mv64x60.h new file mode 100644 index 00000000000..709003948ae --- /dev/null +++ b/arch/powerpc/sysdev/mv64x60.h @@ -0,0 +1,9 @@ +#ifndef __MV64X60_H__ +#define __MV64X60_H__ + +#include + +extern void __init mv64x60_init_irq(void); +extern unsigned int mv64x60_get_irq(void); + +#endif /* __MV64X60_H__ */ -- cgit v1.2.3