From 7f0a6fc81213b957714dfd2a49a28b110283ecc8 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Tue, 11 Mar 2008 20:24:24 +0300 Subject: [POWERPC] QE: export qe_get_brg_clk() qe_get_brg_clk() will be used by the fsl_gtm routines. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/qe_lib/qe.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/sysdev/qe_lib') diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index addabcd443a..cff550eec7e 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c @@ -156,7 +156,7 @@ EXPORT_SYMBOL(qe_issue_cmd); */ static unsigned int brg_clk = 0; -unsigned int get_brg_clk(void) +unsigned int qe_get_brg_clk(void) { struct device_node *qe; unsigned int size; @@ -180,6 +180,7 @@ unsigned int get_brg_clk(void) return brg_clk; } +EXPORT_SYMBOL(qe_get_brg_clk); /* Program the BRG to the given sampling rate and multiplier * @@ -197,7 +198,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier) if ((brg < QE_BRG1) || (brg > QE_BRG16)) return -EINVAL; - divisor = get_brg_clk() / (rate * multiplier); + divisor = qe_get_brg_clk() / (rate * multiplier); if (divisor > QE_BRGC_DIVISOR_MAX + 1) { div16 = QE_BRGC_DIV16; -- cgit v1.2.3