From 4c456a67f501b8b15542c7c21c28812bf88f484b Mon Sep 17 00:00:00 2001 From: Gerhard Pircher Date: Fri, 23 Jan 2009 06:51:28 +0000 Subject: powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code _PAGE_COHERENT is now always set in _PAGE_RAM resp. PAGE_KERNEL. Thus it has to be masked out, if the BAT mapping should be non cacheable or CPU_FTR_NEED_COHERENT is not set. This will work on normal SMP setups because we force-set CPU_FTR_NEED_COHERENT as part of CPU_FTR_COMMON on SMP. Signed-off-by: Gerhard Pircher Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/mm/ppc_mmu_32.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c index 45d925360b8..fe65c405412 100644 --- a/arch/powerpc/mm/ppc_mmu_32.c +++ b/arch/powerpc/mm/ppc_mmu_32.c @@ -123,9 +123,9 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys, int wimgxpp; struct ppc_bat *bat = BATS[index]; - if (((flags & _PAGE_NO_CACHE) == 0) && - cpu_has_feature(CPU_FTR_NEED_COHERENT)) - flags |= _PAGE_COHERENT; + if ((flags & _PAGE_NO_CACHE) || + (cpu_has_feature(CPU_FTR_NEED_COHERENT) == 0)) + flags &= ~_PAGE_COHERENT; bl = (size >> 17) - 1; if (PVR_VER(mfspr(SPRN_PVR)) != 1) { -- cgit v1.2.3