From bc59d2800d535ff36dc9e6c5328b4a075076bbaa Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sat, 1 Jul 2006 19:29:22 -0700 Subject: [PATCH] irq-flags: PPC: Use the new IRQF_ constants Use the new IRQF_ constants and remove the SA_INTERRUPT define Signed-off-by: Thomas Gleixner Cc: Ingo Molnar Cc: "David S. Miller" Cc: Benjamin Herrenschmidt Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/ppc/syslib/gt64260_pic.c | 6 +++--- arch/ppc/syslib/ibm440gx_common.c | 2 +- arch/ppc/syslib/m82xx_pci.c | 2 +- arch/ppc/syslib/mv64360_pic.c | 8 ++++---- arch/ppc/syslib/open_pic.c | 15 +++++++++------ 5 files changed, 18 insertions(+), 15 deletions(-) (limited to 'arch/ppc/syslib') diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c index 91096b38ae7..7fd550a7d58 100644 --- a/arch/ppc/syslib/gt64260_pic.c +++ b/arch/ppc/syslib/gt64260_pic.c @@ -297,7 +297,7 @@ gt64260_register_hdlrs(void) /* Register CPU interface error interrupt handler */ if ((rc = request_irq(MV64x60_IRQ_CPU_ERR, - gt64260_cpu_error_int_handler, SA_INTERRUPT, CPU_INTR_STR, 0))) + gt64260_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0))) printk(KERN_WARNING "Can't register cpu error handler: %d", rc); mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0); @@ -305,7 +305,7 @@ gt64260_register_hdlrs(void) /* Register PCI 0 error interrupt handler */ if ((rc = request_irq(MV64360_IRQ_PCI0, gt64260_pci_error_int_handler, - SA_INTERRUPT, PCI0_INTR_STR, (void *)0))) + IRQF_DISABLED, PCI0_INTR_STR, (void *)0))) printk(KERN_WARNING "Can't register pci 0 error handler: %d", rc); @@ -314,7 +314,7 @@ gt64260_register_hdlrs(void) /* Register PCI 1 error interrupt handler */ if ((rc = request_irq(MV64360_IRQ_PCI1, gt64260_pci_error_int_handler, - SA_INTERRUPT, PCI1_INTR_STR, (void *)1))) + IRQF_DISABLED, PCI1_INTR_STR, (void *)1))) printk(KERN_WARNING "Can't register pci 1 error handler: %d", rc); diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c index 0440d8f4ce1..4b77e6c8c87 100644 --- a/arch/ppc/syslib/ibm440gx_common.c +++ b/arch/ppc/syslib/ibm440gx_common.c @@ -149,7 +149,7 @@ void __init ibm440gx_l2c_enable(void){ unsigned long flags; /* Install error handler */ - if (request_irq(87, l2c_error_handler, SA_INTERRUPT, "L2C", 0) < 0){ + if (request_irq(87, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0){ printk(KERN_ERR "Cannot install L2C error handler, cache is not enabled\n"); return; } diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c index 63fa5b31339..d3fa264e179 100644 --- a/arch/ppc/syslib/m82xx_pci.c +++ b/arch/ppc/syslib/m82xx_pci.c @@ -139,7 +139,7 @@ pq2pci_irq_demux(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction pq2pci_irqaction = { .handler = pq2pci_irq_demux, - .flags = SA_INTERRUPT, + .flags = IRQF_DISABLED, .mask = CPU_MASK_NONE, .name = "PQ2 PCI cascade", }; diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c index a4244d46838..3f6d162f87c 100644 --- a/arch/ppc/syslib/mv64360_pic.c +++ b/arch/ppc/syslib/mv64360_pic.c @@ -380,7 +380,7 @@ mv64360_register_hdlrs(void) /* Clear old errors and register CPU interface error intr handler */ mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0); if ((rc = request_irq(MV64x60_IRQ_CPU_ERR + mv64360_irq_base, - mv64360_cpu_error_int_handler, SA_INTERRUPT, CPU_INTR_STR, 0))) + mv64360_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0))) printk(KERN_WARNING "Can't register cpu error handler: %d", rc); mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0); @@ -389,14 +389,14 @@ mv64360_register_hdlrs(void) /* Clear old errors and register internal SRAM error intr handler */ mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0); if ((rc = request_irq(MV64360_IRQ_SRAM_PAR_ERR + mv64360_irq_base, - mv64360_sram_error_int_handler,SA_INTERRUPT,SRAM_INTR_STR, 0))) + mv64360_sram_error_int_handler,IRQF_DISABLED,SRAM_INTR_STR, 0))) printk(KERN_WARNING "Can't register SRAM error handler: %d",rc); /* Clear old errors and register PCI 0 error intr handler */ mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0); if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base, mv64360_pci_error_int_handler, - SA_INTERRUPT, PCI0_INTR_STR, (void *)0))) + IRQF_DISABLED, PCI0_INTR_STR, (void *)0))) printk(KERN_WARNING "Can't register pci 0 error handler: %d", rc); @@ -411,7 +411,7 @@ mv64360_register_hdlrs(void) mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0); if ((rc = request_irq(MV64360_IRQ_PCI1 + mv64360_irq_base, mv64360_pci_error_int_handler, - SA_INTERRUPT, PCI1_INTR_STR, (void *)1))) + IRQF_DISABLED, PCI1_INTR_STR, (void *)1))) printk(KERN_WARNING "Can't register pci 1 error handler: %d", rc); diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c index 08973663fa2..aa0b9578870 100644 --- a/arch/ppc/syslib/open_pic.c +++ b/arch/ppc/syslib/open_pic.c @@ -575,18 +575,21 @@ void openpic_request_IPIs(void) if (OpenPIC == NULL) return; - /* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */ + /* + * IPIs are marked IRQF_DISABLED as they must run with irqs + * disabled + */ request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset, - openpic_ipi_action, SA_INTERRUPT, + openpic_ipi_action, IRQF_DISABLED, "IPI0 (call function)", NULL); request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+1, - openpic_ipi_action, SA_INTERRUPT, + openpic_ipi_action, IRQF_DISABLED, "IPI1 (reschedule)", NULL); request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+2, - openpic_ipi_action, SA_INTERRUPT, + openpic_ipi_action, IRQF_DISABLED, "IPI2 (invalidate tlb)", NULL); request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+3, - openpic_ipi_action, SA_INTERRUPT, + openpic_ipi_action, IRQF_DISABLED, "IPI3 (xmon break)", NULL); for ( i = 0; i < OPENPIC_NUM_IPI ; i++ ) @@ -691,7 +694,7 @@ openpic_init_nmi_irq(u_int irq) static struct irqaction openpic_cascade_irqaction = { .handler = no_action, - .flags = SA_INTERRUPT, + .flags = IRQF_DISABLED, .mask = CPU_MASK_NONE, }; -- cgit v1.2.3