From 4c8d3d997ef3c0594350fba716529905b314287e Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sun, 13 Nov 2005 16:06:30 -0800 Subject: [PATCH] Update email address for Kumar Changed jobs and the Freescale address is no longer valid. Signed-off-by: Kumar Gala Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/ppc/kernel/head_fsl_booke.S | 2 +- arch/ppc/mm/fsl_booke_mmu.c | 2 +- arch/ppc/platforms/83xx/mpc834x_sys.c | 2 +- arch/ppc/platforms/83xx/mpc834x_sys.h | 2 +- arch/ppc/platforms/85xx/mpc8540_ads.c | 2 +- arch/ppc/platforms/85xx/mpc8540_ads.h | 2 +- arch/ppc/platforms/85xx/mpc8555_cds.h | 2 +- arch/ppc/platforms/85xx/mpc8560_ads.c | 2 +- arch/ppc/platforms/85xx/mpc8560_ads.h | 2 +- arch/ppc/platforms/85xx/mpc85xx_ads_common.c | 2 +- arch/ppc/platforms/85xx/mpc85xx_ads_common.h | 2 +- arch/ppc/platforms/85xx/mpc85xx_cds_common.c | 2 +- arch/ppc/platforms/85xx/mpc85xx_cds_common.h | 2 +- arch/ppc/platforms/85xx/sbc8560.c | 2 +- arch/ppc/platforms/pq2ads.c | 2 +- arch/ppc/syslib/ipic.h | 2 +- arch/ppc/syslib/mpc83xx_devices.c | 2 +- arch/ppc/syslib/mpc83xx_sys.c | 2 +- arch/ppc/syslib/mpc85xx_devices.c | 2 +- arch/ppc/syslib/mpc85xx_sys.c | 2 +- arch/ppc/syslib/mpc8xx_devices.c | 2 +- arch/ppc/syslib/mpc8xx_sys.c | 2 +- arch/ppc/syslib/ppc83xx_setup.c | 2 +- arch/ppc/syslib/ppc83xx_setup.h | 2 +- arch/ppc/syslib/ppc85xx_common.c | 2 +- arch/ppc/syslib/ppc85xx_common.h | 2 +- arch/ppc/syslib/ppc85xx_setup.c | 2 +- arch/ppc/syslib/ppc85xx_setup.h | 2 +- arch/ppc/syslib/ppc_sys.c | 2 +- arch/ppc/syslib/pq2_devices.c | 2 +- arch/ppc/syslib/pq2_sys.c | 2 +- 31 files changed, 31 insertions(+), 31 deletions(-) (limited to 'arch/ppc') diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S index 5063c603fad..8d60fa99fc4 100644 --- a/arch/ppc/kernel/head_fsl_booke.S +++ b/arch/ppc/kernel/head_fsl_booke.S @@ -24,7 +24,7 @@ * Copyright 2002-2004 MontaVista Software, Inc. * PowerPC 44x support, Matt Porter * Copyright 2004 Freescale Semiconductor, Inc - * PowerPC e500 modifications, Kumar Gala + * PowerPC e500 modifications, Kumar Gala * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/arch/ppc/mm/fsl_booke_mmu.c b/arch/ppc/mm/fsl_booke_mmu.c index af9ca0eb6d5..5d581bb3aa1 100644 --- a/arch/ppc/mm/fsl_booke_mmu.c +++ b/arch/ppc/mm/fsl_booke_mmu.c @@ -1,5 +1,5 @@ /* - * Modifications by Kumar Gala (kumar.gala@freescale.com) to support + * Modifications by Kumar Gala (galak@kernel.crashing.org) to support * E500 Book E processors. * * Copyright 2004 Freescale Semiconductor, Inc diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c index 98edc75f410..84efc0ced88 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.c +++ b/arch/ppc/platforms/83xx/mpc834x_sys.c @@ -3,7 +3,7 @@ * * MPC834x SYS board specific routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h index 58e44c04253..2e514d316fb 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.h +++ b/arch/ppc/platforms/83xx/mpc834x_sys.h @@ -3,7 +3,7 @@ * * MPC834X SYS common board definitions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor, Inc. * diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c index 7e952c1228c..c5cde97c6ef 100644 --- a/arch/ppc/platforms/85xx/mpc8540_ads.c +++ b/arch/ppc/platforms/85xx/mpc8540_ads.c @@ -3,7 +3,7 @@ * * MPC8540ADS board specific routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.h b/arch/ppc/platforms/85xx/mpc8540_ads.h index 3d05d7c4a93..e48ca3a9739 100644 --- a/arch/ppc/platforms/85xx/mpc8540_ads.h +++ b/arch/ppc/platforms/85xx/mpc8540_ads.h @@ -3,7 +3,7 @@ * * MPC8540ADS board definitions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc8555_cds.h b/arch/ppc/platforms/85xx/mpc8555_cds.h index e0e75568bc5..1a8e6c67355 100644 --- a/arch/ppc/platforms/85xx/mpc8555_cds.h +++ b/arch/ppc/platforms/85xx/mpc8555_cds.h @@ -3,7 +3,7 @@ * * MPC8555CDS board definitions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c index 208433f1e93..8e39a551709 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.c +++ b/arch/ppc/platforms/85xx/mpc8560_ads.c @@ -3,7 +3,7 @@ * * MPC8560ADS board specific routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.h b/arch/ppc/platforms/85xx/mpc8560_ads.h index 7df885d73e9..143ae7eefa7 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.h +++ b/arch/ppc/platforms/85xx/mpc8560_ads.h @@ -3,7 +3,7 @@ * * MPC8540ADS board definitions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c index 16ad092d8a0..17ce48fe350 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c +++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c @@ -3,7 +3,7 @@ * * MPC85xx ADS board common routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h index 84acf6e8d45..7b26bcc5d10 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h +++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h @@ -3,7 +3,7 @@ * * MPC85XX ADS common board definitions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c index a21156967a5..d8991b88dc9 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c +++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c @@ -3,7 +3,7 @@ * * MPC85xx CDS board specific routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor, Inc * diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h index 12b292c6ae3..5b588cfd0e4 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h +++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h @@ -3,7 +3,7 @@ * * MPC85xx CDS board definitions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor, Inc * diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c index b4ee1707a83..45a5b81b4ed 100644 --- a/arch/ppc/platforms/85xx/sbc8560.c +++ b/arch/ppc/platforms/85xx/sbc8560.c @@ -3,7 +3,7 @@ * * Wind River SBC8560 board specific routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/pq2ads.c b/arch/ppc/platforms/pq2ads.c index 6a1475c1e12..71c9fca1fe9 100644 --- a/arch/ppc/platforms/pq2ads.c +++ b/arch/ppc/platforms/pq2ads.c @@ -3,7 +3,7 @@ * * PQ2ADS platform support * - * Author: Kumar Gala + * Author: Kumar Gala * Derived from: est8260_setup.c by Allen Curtis * * Copyright 2004 Freescale Semiconductor, Inc. diff --git a/arch/ppc/syslib/ipic.h b/arch/ppc/syslib/ipic.h index 2b56a4fcf37..a7ce7da8785 100644 --- a/arch/ppc/syslib/ipic.h +++ b/arch/ppc/syslib/ipic.h @@ -3,7 +3,7 @@ * * IPIC private definitions and structure. * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor, Inc * diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c index f43fbf9a938..847df440998 100644 --- a/arch/ppc/syslib/mpc83xx_devices.c +++ b/arch/ppc/syslib/mpc83xx_devices.c @@ -3,7 +3,7 @@ * * MPC83xx Device descriptions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/mpc83xx_sys.c b/arch/ppc/syslib/mpc83xx_sys.c index da743446789..a1523989aff 100644 --- a/arch/ppc/syslib/mpc83xx_sys.c +++ b/arch/ppc/syslib/mpc83xx_sys.c @@ -3,7 +3,7 @@ * * MPC83xx System descriptions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c index 2ede677a0a5..69949d25565 100644 --- a/arch/ppc/syslib/mpc85xx_devices.c +++ b/arch/ppc/syslib/mpc85xx_devices.c @@ -3,7 +3,7 @@ * * MPC85xx Device descriptions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/mpc85xx_sys.c b/arch/ppc/syslib/mpc85xx_sys.c index cb68d8c5834..397cfbcce5e 100644 --- a/arch/ppc/syslib/mpc85xx_sys.c +++ b/arch/ppc/syslib/mpc85xx_sys.c @@ -3,7 +3,7 @@ * * MPC85xx System descriptions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c index 2b5f0e70168..92dc98b36bd 100644 --- a/arch/ppc/syslib/mpc8xx_devices.c +++ b/arch/ppc/syslib/mpc8xx_devices.c @@ -3,7 +3,7 @@ * * MPC8xx Device descriptions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug * diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c index 3cc27d29e3a..d3c61752160 100644 --- a/arch/ppc/syslib/mpc8xx_sys.c +++ b/arch/ppc/syslib/mpc8xx_sys.c @@ -3,7 +3,7 @@ * * MPC8xx System descriptions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug * diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c index 4da168a6ad0..1b5fe9e398d 100644 --- a/arch/ppc/syslib/ppc83xx_setup.c +++ b/arch/ppc/syslib/ppc83xx_setup.c @@ -3,7 +3,7 @@ * * MPC83XX common board code * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc83xx_setup.h b/arch/ppc/syslib/ppc83xx_setup.h index c766c1a5f78..a122a7322e5 100644 --- a/arch/ppc/syslib/ppc83xx_setup.h +++ b/arch/ppc/syslib/ppc83xx_setup.h @@ -3,7 +3,7 @@ * * MPC83XX common board definitions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc85xx_common.c b/arch/ppc/syslib/ppc85xx_common.c index da841dacdc1..19ad537225e 100644 --- a/arch/ppc/syslib/ppc85xx_common.c +++ b/arch/ppc/syslib/ppc85xx_common.c @@ -3,7 +3,7 @@ * * MPC85xx support routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc85xx_common.h b/arch/ppc/syslib/ppc85xx_common.h index 2c8f304441b..94edf32151d 100644 --- a/arch/ppc/syslib/ppc85xx_common.h +++ b/arch/ppc/syslib/ppc85xx_common.h @@ -3,7 +3,7 @@ * * MPC85xx support routines * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c index de2f9057657..1a47ff4b831 100644 --- a/arch/ppc/syslib/ppc85xx_setup.c +++ b/arch/ppc/syslib/ppc85xx_setup.c @@ -3,7 +3,7 @@ * * MPC85XX common board code * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc85xx_setup.h b/arch/ppc/syslib/ppc85xx_setup.h index 6e6cfe162fa..e340b0545fb 100644 --- a/arch/ppc/syslib/ppc85xx_setup.h +++ b/arch/ppc/syslib/ppc85xx_setup.h @@ -3,7 +3,7 @@ * * MPC85XX common board definitions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c index 603f0119081..c0b93c4191e 100644 --- a/arch/ppc/syslib/ppc_sys.c +++ b/arch/ppc/syslib/ppc_sys.c @@ -3,7 +3,7 @@ * * PPC System library functions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * Copyright 2005 Freescale Semiconductor Inc. * Copyright 2005 MontaVista, Inc. by Vitaly Bordug diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c index e960fe93532..6ff3aab82fc 100644 --- a/arch/ppc/syslib/pq2_devices.c +++ b/arch/ppc/syslib/pq2_devices.c @@ -3,7 +3,7 @@ * * PQ2 Device descriptions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c index 7b6c9ebdb9e..36d6e217994 100644 --- a/arch/ppc/syslib/pq2_sys.c +++ b/arch/ppc/syslib/pq2_sys.c @@ -3,7 +3,7 @@ * * PQ2 System descriptions * - * Maintainer: Kumar Gala + * Maintainer: Kumar Gala * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any -- cgit v1.2.3 From 7fce260a6bf75080ef61408504add5618f90e41b Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Sun, 13 Nov 2005 16:06:48 -0800 Subject: [PATCH] ppc: add support for new powerbooks Enablement patch for the new PowerBooks (late 2005 edition). This enables the ATA controller, Gigabit ethernet and basic AGP setup. Bluetooth works out-of-the box after running hid2hci. Still remaining is to get the touchpad to work, the simple change of just adding the new USB ids isn't enough. Signed-off-by: Olof Johansson Acked-by: Benjamin Herrenschmidt Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/ppc/platforms/pmac_feature.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/ppc') diff --git a/arch/ppc/platforms/pmac_feature.c b/arch/ppc/platforms/pmac_feature.c index 58884a63ebd..1e69b059316 100644 --- a/arch/ppc/platforms/pmac_feature.c +++ b/arch/ppc/platforms/pmac_feature.c @@ -2317,6 +2317,14 @@ static struct pmac_mb_def pmac_mb_defs[] = { PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, }, + { "PowerBook5,8", "PowerBook G4 15\"", + PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, + PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, + }, + { "PowerBook5,9", "PowerBook G4 17\"", + PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, + PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, + }, { "PowerBook6,1", "PowerBook G4 12\"", PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, -- cgit v1.2.3 From 647422868e48c9abd8ab85ad2a7de9161170ec89 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sun, 13 Nov 2005 16:06:49 -0800 Subject: [PATCH] ppc32: Add support for handling PCI interrupts on MPC834x PCI expansion card The MPC8349 PIBs system has a expansion board with 6 PCI slots. We needed to update the IDSEL interrupt mapping for it to work properly. However, only PCI1 is supported as the first revision of this expansion board doesn't function properly for PCI2. For the time being we have zero'd out the entries for the IDSELs related to PCI2. When a functioning expansion board exists we can fix the table. Signed-off-by: Kumar Gala Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/ppc/platforms/83xx/mpc834x_sys.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'arch/ppc') diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c index 84efc0ced88..04bdc39bf47 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.c +++ b/arch/ppc/platforms/83xx/mpc834x_sys.c @@ -73,12 +73,19 @@ mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) * A B C D */ { - {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */ - {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */ - {PIRQD, PIRQA, PIRQB, PIRQC} /* idsel 0x13 */ + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */ + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */ + {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */ + {0, 0, 0, 0}, + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */ + {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */ + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */ + {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */ + {0, 0, 0, 0}, /* idsel 0x19 */ + {0, 0, 0, 0}, /* idsel 0x20 */ }; - const long min_idsel = 0x11, max_idsel = 0x13, irqs_per_slot = 4; + const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4; return PCI_IRQ_TABLE_LOOKUP; } -- cgit v1.2.3 From eb07d964b4491d1bb5864cd3d7e7633ccdda9a53 Mon Sep 17 00:00:00 2001 From: Marcelo Tosatti Date: Mon, 14 Nov 2005 05:38:31 -0200 Subject: [PATCH] ppc32 8xx: update_mmu_cache() needs unconditional tlbie Currently 8xx fails to boot due to endless pagefaults. Seems the bug is exposed by the change which avoids flushing the TLB when not necessary (in case the pte has not changed), introduced recently: __handle_mm_fault(): entry = pte_mkyoung(entry); if (!pte_same(old_entry, entry)) { ptep_set_access_flags(vma, address, pte, entry, write_access); update_mmu_cache(vma, address, entry); lazy_mmu_prot_update(entry); } else { /* * This is needed only for protection faults but the arch code * is not yet telling us if this is a protection fault or not. * This still avoids useless tlb flushes for .text page faults * with threads. */ if (write_access) flush_tlb_page(vma, address); } The "update_mmu_cache()" call was unconditional before, which caused the TLB to be flushed by: if (pfn_valid(pfn)) { struct page *page = pfn_to_page(pfn); if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { if (vma->vm_mm == current->active_mm) { #ifdef CONFIG_8xx /* On 8xx, cache control instructions (particularly * "dcbst" from flush_dcache_icache) fault as write * operation if there is an unpopulated TLB entry * for the address in question. To workaround that, * we invalidate the TLB here, thus avoiding dcbst * misbehaviour. */ _tlbie(address); #endif __flush_dcache_icache((void *) address); } else flush_dcache_icache_page(page); set_bit(PG_arch_1, &page->flags); } Which worked to due to pure luck: PG_arch_1 was always unset before, but now it isnt. The root of the problem are the changes against the 8xx TLB handlers introduced during v2.6. What happens is the TLBMiss handlers load the zeroed pte into the TLB, causing the TLBError handler to be invoked (thats two TLB faults per pagefault), which then jumps to the generic MM code to setup the pte. The bug is that the zeroed TLB is not invalidated (the same reason for the "dcbst" misbehaviour), resulting in infinite TLBError faults. The "two exception" approach requires a TLB flush (to nuke the zeroed TLB) at each PTE update for correct behaviour: Signed-off-by: Marcelo Tosatti Signed-off-by: Paul Mackerras --- arch/ppc/mm/init.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) (limited to 'arch/ppc') diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c index 99b48abd329..45f0782059f 100644 --- a/arch/ppc/mm/init.c +++ b/arch/ppc/mm/init.c @@ -597,21 +597,20 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, if (pfn_valid(pfn)) { struct page *page = pfn_to_page(pfn); - if (!PageReserved(page) - && !test_bit(PG_arch_1, &page->flags)) { - if (vma->vm_mm == current->active_mm) { #ifdef CONFIG_8xx - /* On 8xx, cache control instructions (particularly - * "dcbst" from flush_dcache_icache) fault as write - * operation if there is an unpopulated TLB entry - * for the address in question. To workaround that, - * we invalidate the TLB here, thus avoiding dcbst - * misbehaviour. - */ - _tlbie(address); + /* On 8xx, the TLB handlers work in 2 stages: + * First, a zeroed entry is loaded by TLBMiss handler, + * which causes the TLBError handler to be triggered. + * That means the zeroed TLB has to be invalidated + * whenever a page miss occurs. + */ + _tlbie(address); #endif + if (!PageReserved(page) + && !test_bit(PG_arch_1, &page->flags)) { + if (vma->vm_mm == current->active_mm) __flush_dcache_icache((void *) address); - } else + else flush_dcache_icache_page(page); set_bit(PG_arch_1, &page->flags); } -- cgit v1.2.3 From de93f0d62ccaa730fd46de14d46c0317bd82596a Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Tue, 15 Nov 2005 18:21:45 +1100 Subject: [PATCH] ppc: Fix boot with yaboot with ARCH=ppc The merge of machine types broke boot with yaboot & ARCH=ppc due to the old code still retreiving the old-syle machine type passed in by yaboot. This patch fixes it by translating those old numbers. Since that whole mecanism is deprecated, this is a temporary fix until ARCH=ppc uses the new prom_init that the merged architecture now uses for both ppc32 and ppc64 (after 2.6.15) Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- arch/ppc/kernel/setup.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'arch/ppc') diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c index dc55e1abc45..0eb0b7085e6 100644 --- a/arch/ppc/kernel/setup.c +++ b/arch/ppc/kernel/setup.c @@ -602,7 +602,19 @@ void parse_bootinfo(struct bi_record *rec) #endif /* CONFIG_BLK_DEV_INITRD */ #ifdef CONFIG_PPC_MULTIPLATFORM case BI_MACHTYPE: - _machine = data[0]; + /* Machine types changed with the merge. Since the + * bootinfo are now deprecated, we can just hard code + * the appropriate conversion here for when we are + * called with yaboot which passes us a machine type + * this way. + */ + switch(data[0]) { + case 1: _machine = _MACH_prep; break; + case 2: _machine = _MACH_Pmac; break; + case 4: _machine = _MACH_chrp; break; + default: + _machine = data[0]; + } break; #endif case BI_MEMSIZE: -- cgit v1.2.3 From d3ed65832029dcaf5fe086670a2f2c25600b51e9 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Wed, 16 Nov 2005 13:40:43 +1100 Subject: [PATCH] ppc: Fix build with CONFIG_CHRP not set Building ARCH=ppc for multiplatforms with CONFIG_CHRP not set fails due to some unshielded code in xmon Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- arch/ppc/xmon/start.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/ppc') diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c index 98612d42034..c80177f8ec0 100644 --- a/arch/ppc/xmon/start.c +++ b/arch/ppc/xmon/start.c @@ -184,7 +184,9 @@ xmon_map_scc(void) sccc = base + (addr & ~PAGE_MASK); sccd = sccc + 0x10; - } else { + } +#ifdef CONFIG_PPC_CHRP + else { base = (volatile unsigned char *) isa_io_base; if (_machine == _MACH_chrp) base = (volatile unsigned char *) @@ -200,6 +202,7 @@ xmon_map_scc(void) RXRDY = 1; DLAB = 0x80; } +#endif /* CONFIG_PPC_CHRP */ #elif defined(CONFIG_GEMINI) /* should already be mapped by the kernel boot */ sccc = (volatile unsigned char *) 0xffeffb0d; -- cgit v1.2.3 From 6760a1bdf56de6e1a30399d9069b94bfea59c13d Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 17 Nov 2005 17:05:02 -0600 Subject: [PATCH] ppc: Fix MPC83xx device table The SVRs for MPC8343/E were incorrect and really the SVRs for MPC8347/E. Signed-off-by: David Updegraff Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- arch/ppc/syslib/mpc83xx_sys.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) (limited to 'arch/ppc') diff --git a/arch/ppc/syslib/mpc83xx_sys.c b/arch/ppc/syslib/mpc83xx_sys.c index a1523989aff..82cf3ab77f4 100644 --- a/arch/ppc/syslib/mpc83xx_sys.c +++ b/arch/ppc/syslib/mpc83xx_sys.c @@ -69,9 +69,33 @@ struct ppc_sys_spec ppc_sys_specs[] = { }, }, { - .ppc_sys_name = "8343E", + .ppc_sys_name = "8347E", .mask = 0xFFFF0000, .value = 0x80540000, + .num_devices = 9, + .device_list = (enum ppc_sys_devices[]) + { + MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, + MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2, + MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO + }, + }, + { + .ppc_sys_name = "8347", + .mask = 0xFFFF0000, + .value = 0x80550000, + .num_devices = 8, + .device_list = (enum ppc_sys_devices[]) + { + MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, + MPC83xx_IIC2, MPC83xx_DUART, + MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO + }, + }, + { + .ppc_sys_name = "8343E", + .mask = 0xFFFF0000, + .value = 0x80560000, .num_devices = 8, .device_list = (enum ppc_sys_devices[]) { @@ -83,7 +107,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { { .ppc_sys_name = "8343", .mask = 0xFFFF0000, - .value = 0x80550000, + .value = 0x80570000, .num_devices = 7, .device_list = (enum ppc_sys_devices[]) { -- cgit v1.2.3 From fe7bce5ef70105a6546dc9b5c354219b9f6ea991 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 17 Nov 2005 17:45:40 -0600 Subject: [PATCH] ppc: Fix warnings related to seq_file When we moved things around in irq.h seq_file became an issue. Fix warnings related to its usage. Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- arch/ppc/platforms/85xx/mpc85xx_ads_common.h | 2 ++ arch/ppc/platforms/85xx/stx_gp3.h | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/ppc') diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h index 7b26bcc5d10..198a6a02cde 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h +++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h @@ -25,6 +25,8 @@ #define BCSR_ADDR ((uint)0xf8000000) #define BCSR_SIZE ((uint)(32 * 1024)) +struct seq_file; + extern int mpc85xx_ads_show_cpuinfo(struct seq_file *m); extern void mpc85xx_ads_init_IRQ(void) __init; extern void mpc85xx_ads_map_io(void) __init; diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h index 7bcc6c35a41..2f25b519515 100644 --- a/arch/ppc/platforms/85xx/stx_gp3.h +++ b/arch/ppc/platforms/85xx/stx_gp3.h @@ -21,7 +21,6 @@ #include #include -#include #include #define BOARD_CCSRBAR ((uint)0xe0000000) @@ -43,7 +42,6 @@ extern void mpc85xx_setup_hose(void) __init; extern void mpc85xx_restart(char *cmd); extern void mpc85xx_power_off(void); extern void mpc85xx_halt(void); -extern int mpc85xx_show_cpuinfo(struct seq_file *m); extern void mpc85xx_init_IRQ(void) __init; extern unsigned long mpc85xx_find_end_of_memory(void) __init; extern void mpc85xx_calibrate_decr(void) __init; -- cgit v1.2.3 From 5daf9071b527089b1bd5d9cb3a5354b83121550e Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 18 Nov 2005 14:09:41 +1100 Subject: [PATCH] powerpc: merge align.c This patch merges align.c, the result isn't quite what was in ppc64 nor what was in ppc32 :) It should implement all the functionalities of both though. Kumar, since you played with that in the past, I suppose you have some test cases for verifying that it works properly before I dig out the 601 machine ? :) Since it's likely that I won't be able to test all scenario, code inspection is much welcome. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- arch/ppc/kernel/Makefile | 4 +- arch/ppc/kernel/align.c | 410 ----------------------------------------------- 2 files changed, 2 insertions(+), 412 deletions(-) delete mode 100644 arch/ppc/kernel/align.c (limited to 'arch/ppc') diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile index 17a4da65e27..0bb23fce429 100644 --- a/arch/ppc/kernel/Makefile +++ b/arch/ppc/kernel/Makefile @@ -13,7 +13,7 @@ extra-$(CONFIG_POWER4) += idle_power4.o extra-y += vmlinux.lds obj-y := entry.o traps.o idle.o time.o misc.o \ - process.o align.o \ + process.o \ setup.o \ ppc_htab.o obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o @@ -38,7 +38,7 @@ endif # These are here while we do the architecture merge else -obj-y := idle.o align.o +obj-y := idle.o obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o obj-$(CONFIG_MODULES) += module.o diff --git a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c deleted file mode 100644 index ab398c4b70b..00000000000 --- a/arch/ppc/kernel/align.c +++ /dev/null @@ -1,410 +0,0 @@ -/* - * align.c - handle alignment exceptions for the Power PC. - * - * Copyright (c) 1996 Paul Mackerras - * Copyright (c) 1998-1999 TiVo, Inc. - * PowerPC 403GCX modifications. - * Copyright (c) 1999 Grant Erickson - * PowerPC 403GCX/405GP modifications. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -struct aligninfo { - unsigned char len; - unsigned char flags; -}; - -#if defined(CONFIG_4xx) || defined(CONFIG_POWER4) || defined(CONFIG_BOOKE) -#define OPCD(inst) (((inst) & 0xFC000000) >> 26) -#define RS(inst) (((inst) & 0x03E00000) >> 21) -#define RA(inst) (((inst) & 0x001F0000) >> 16) -#define IS_XFORM(code) ((code) == 31) -#endif - -#define INVALID { 0, 0 } - -#define LD 1 /* load */ -#define ST 2 /* store */ -#define SE 4 /* sign-extend value */ -#define F 8 /* to/from fp regs */ -#define U 0x10 /* update index register */ -#define M 0x20 /* multiple load/store */ -#define S 0x40 /* single-precision fp, or byte-swap value */ -#define SX 0x40 /* byte count in XER */ -#define HARD 0x80 /* string, stwcx. */ - -#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */ - -/* - * The PowerPC stores certain bits of the instruction that caused the - * alignment exception in the DSISR register. This array maps those - * bits to information about the operand length and what the - * instruction would do. - */ -static struct aligninfo aligninfo[128] = { - { 4, LD }, /* 00 0 0000: lwz / lwarx */ - INVALID, /* 00 0 0001 */ - { 4, ST }, /* 00 0 0010: stw */ - INVALID, /* 00 0 0011 */ - { 2, LD }, /* 00 0 0100: lhz */ - { 2, LD+SE }, /* 00 0 0101: lha */ - { 2, ST }, /* 00 0 0110: sth */ - { 4, LD+M }, /* 00 0 0111: lmw */ - { 4, LD+F+S }, /* 00 0 1000: lfs */ - { 8, LD+F }, /* 00 0 1001: lfd */ - { 4, ST+F+S }, /* 00 0 1010: stfs */ - { 8, ST+F }, /* 00 0 1011: stfd */ - INVALID, /* 00 0 1100 */ - INVALID, /* 00 0 1101: ld/ldu/lwa */ - INVALID, /* 00 0 1110 */ - INVALID, /* 00 0 1111: std/stdu */ - { 4, LD+U }, /* 00 1 0000: lwzu */ - INVALID, /* 00 1 0001 */ - { 4, ST+U }, /* 00 1 0010: stwu */ - INVALID, /* 00 1 0011 */ - { 2, LD+U }, /* 00 1 0100: lhzu */ - { 2, LD+SE+U }, /* 00 1 0101: lhau */ - { 2, ST+U }, /* 00 1 0110: sthu */ - { 4, ST+M }, /* 00 1 0111: stmw */ - { 4, LD+F+S+U }, /* 00 1 1000: lfsu */ - { 8, LD+F+U }, /* 00 1 1001: lfdu */ - { 4, ST+F+S+U }, /* 00 1 1010: stfsu */ - { 8, ST+F+U }, /* 00 1 1011: stfdu */ - INVALID, /* 00 1 1100 */ - INVALID, /* 00 1 1101 */ - INVALID, /* 00 1 1110 */ - INVALID, /* 00 1 1111 */ - INVALID, /* 01 0 0000: ldx */ - INVALID, /* 01 0 0001 */ - INVALID, /* 01 0 0010: stdx */ - INVALID, /* 01 0 0011 */ - INVALID, /* 01 0 0100 */ - INVALID, /* 01 0 0101: lwax */ - INVALID, /* 01 0 0110 */ - INVALID, /* 01 0 0111 */ - { 4, LD+M+HARD+SX }, /* 01 0 1000: lswx */ - { 4, LD+M+HARD }, /* 01 0 1001: lswi */ - { 4, ST+M+HARD+SX }, /* 01 0 1010: stswx */ - { 4, ST+M+HARD }, /* 01 0 1011: stswi */ - INVALID, /* 01 0 1100 */ - INVALID, /* 01 0 1101 */ - INVALID, /* 01 0 1110 */ - INVALID, /* 01 0 1111 */ - INVALID, /* 01 1 0000: ldux */ - INVALID, /* 01 1 0001 */ - INVALID, /* 01 1 0010: stdux */ - INVALID, /* 01 1 0011 */ - INVALID, /* 01 1 0100 */ - INVALID, /* 01 1 0101: lwaux */ - INVALID, /* 01 1 0110 */ - INVALID, /* 01 1 0111 */ - INVALID, /* 01 1 1000 */ - INVALID, /* 01 1 1001 */ - INVALID, /* 01 1 1010 */ - INVALID, /* 01 1 1011 */ - INVALID, /* 01 1 1100 */ - INVALID, /* 01 1 1101 */ - INVALID, /* 01 1 1110 */ - INVALID, /* 01 1 1111 */ - INVALID, /* 10 0 0000 */ - INVALID, /* 10 0 0001 */ - { 0, ST+HARD }, /* 10 0 0010: stwcx. */ - INVALID, /* 10 0 0011 */ - INVALID, /* 10 0 0100 */ - INVALID, /* 10 0 0101 */ - INVALID, /* 10 0 0110 */ - INVALID, /* 10 0 0111 */ - { 4, LD+S }, /* 10 0 1000: lwbrx */ - INVALID, /* 10 0 1001 */ - { 4, ST+S }, /* 10 0 1010: stwbrx */ - INVALID, /* 10 0 1011 */ - { 2, LD+S }, /* 10 0 1100: lhbrx */ - INVALID, /* 10 0 1101 */ - { 2, ST+S }, /* 10 0 1110: sthbrx */ - INVALID, /* 10 0 1111 */ - INVALID, /* 10 1 0000 */ - INVALID, /* 10 1 0001 */ - INVALID, /* 10 1 0010 */ - INVALID, /* 10 1 0011 */ - INVALID, /* 10 1 0100 */ - INVALID, /* 10 1 0101 */ - INVALID, /* 10 1 0110 */ - INVALID, /* 10 1 0111 */ - INVALID, /* 10 1 1000 */ - INVALID, /* 10 1 1001 */ - INVALID, /* 10 1 1010 */ - INVALID, /* 10 1 1011 */ - INVALID, /* 10 1 1100 */ - INVALID, /* 10 1 1101 */ - INVALID, /* 10 1 1110 */ - { 0, ST+HARD }, /* 10 1 1111: dcbz */ - { 4, LD }, /* 11 0 0000: lwzx */ - INVALID, /* 11 0 0001 */ - { 4, ST }, /* 11 0 0010: stwx */ - INVALID, /* 11 0 0011 */ - { 2, LD }, /* 11 0 0100: lhzx */ - { 2, LD+SE }, /* 11 0 0101: lhax */ - { 2, ST }, /* 11 0 0110: sthx */ - INVALID, /* 11 0 0111 */ - { 4, LD+F+S }, /* 11 0 1000: lfsx */ - { 8, LD+F }, /* 11 0 1001: lfdx */ - { 4, ST+F+S }, /* 11 0 1010: stfsx */ - { 8, ST+F }, /* 11 0 1011: stfdx */ - INVALID, /* 11 0 1100 */ - INVALID, /* 11 0 1101: lmd */ - INVALID, /* 11 0 1110 */ - INVALID, /* 11 0 1111: stmd */ - { 4, LD+U }, /* 11 1 0000: lwzux */ - INVALID, /* 11 1 0001 */ - { 4, ST+U }, /* 11 1 0010: stwux */ - INVALID, /* 11 1 0011 */ - { 2, LD+U }, /* 11 1 0100: lhzux */ - { 2, LD+SE+U }, /* 11 1 0101: lhaux */ - { 2, ST+U }, /* 11 1 0110: sthux */ - INVALID, /* 11 1 0111 */ - { 4, LD+F+S+U }, /* 11 1 1000: lfsux */ - { 8, LD+F+U }, /* 11 1 1001: lfdux */ - { 4, ST+F+S+U }, /* 11 1 1010: stfsux */ - { 8, ST+F+U }, /* 11 1 1011: stfdux */ - INVALID, /* 11 1 1100 */ - INVALID, /* 11 1 1101 */ - INVALID, /* 11 1 1110 */ - INVALID, /* 11 1 1111 */ -}; - -#define SWAP(a, b) (t = (a), (a) = (b), (b) = t) - -int -fix_alignment(struct pt_regs *regs) -{ - int instr, nb, flags; -#if defined(CONFIG_4xx) || defined(CONFIG_POWER4) || defined(CONFIG_BOOKE) - int opcode, f1, f2, f3; -#endif - int i, t; - int reg, areg; - int offset, nb0; - unsigned char __user *addr; - unsigned char *rptr; - union { - long l; - float f; - double d; - unsigned char v[8]; - } data; - - CHECK_FULL_REGS(regs); - -#if defined(CONFIG_4xx) || defined(CONFIG_POWER4) || defined(CONFIG_BOOKE) - /* The 4xx-family & Book-E processors have no DSISR register, - * so we emulate it. - * The POWER4 has a DSISR register but doesn't set it on - * an alignment fault. -- paulus - */ - - if (__get_user(instr, (unsigned int __user *) regs->nip)) - return 0; - opcode = OPCD(instr); - reg = RS(instr); - areg = RA(instr); - - if (!IS_XFORM(opcode)) { - f1 = 0; - f2 = (instr & 0x04000000) >> 26; - f3 = (instr & 0x78000000) >> 27; - } else { - f1 = (instr & 0x00000006) >> 1; - f2 = (instr & 0x00000040) >> 6; - f3 = (instr & 0x00000780) >> 7; - } - - instr = ((f1 << 5) | (f2 << 4) | f3); -#else - reg = (regs->dsisr >> 5) & 0x1f; /* source/dest register */ - areg = regs->dsisr & 0x1f; /* register to update */ - instr = (regs->dsisr >> 10) & 0x7f; -#endif - - nb = aligninfo[instr].len; - if (nb == 0) { - long __user *p; - int i; - - if (instr != DCBZ) - return 0; /* too hard or invalid instruction */ - /* - * The dcbz (data cache block zero) instruction - * gives an alignment fault if used on non-cacheable - * memory. We handle the fault mainly for the - * case when we are running with the cache disabled - * for debugging. - */ - p = (long __user *) (regs->dar & -L1_CACHE_BYTES); - if (user_mode(regs) - && !access_ok(VERIFY_WRITE, p, L1_CACHE_BYTES)) - return -EFAULT; - for (i = 0; i < L1_CACHE_BYTES / sizeof(long); ++i) - if (__put_user(0, p+i)) - return -EFAULT; - return 1; - } - - flags = aligninfo[instr].flags; - if ((flags & (LD|ST)) == 0) - return 0; - - /* For the 4xx-family & Book-E processors, the 'dar' field of the - * pt_regs structure is overloaded and is really from the DEAR. - */ - - addr = (unsigned char __user *)regs->dar; - - if (flags & M) { - /* lmw, stmw, lswi/x, stswi/x */ - nb0 = 0; - if (flags & HARD) { - if (flags & SX) { - nb = regs->xer & 127; - if (nb == 0) - return 1; - } else { - if (__get_user(instr, - (unsigned int __user *)regs->nip)) - return 0; - nb = (instr >> 11) & 0x1f; - if (nb == 0) - nb = 32; - } - if (nb + reg * 4 > 128) { - nb0 = nb + reg * 4 - 128; - nb = 128 - reg * 4; - } - } else { - /* lwm, stmw */ - nb = (32 - reg) * 4; - } - - if (!access_ok((flags & ST? VERIFY_WRITE: VERIFY_READ), addr, nb+nb0)) - return -EFAULT; /* bad address */ - - rptr = (unsigned char *) ®s->gpr[reg]; - if (flags & LD) { - for (i = 0; i < nb; ++i) - if (__get_user(rptr[i], addr+i)) - return -EFAULT; - if (nb0 > 0) { - rptr = (unsigned char *) ®s->gpr[0]; - addr += nb; - for (i = 0; i < nb0; ++i) - if (__get_user(rptr[i], addr+i)) - return -EFAULT; - } - for (; (i & 3) != 0; ++i) - rptr[i] = 0; - } else { - for (i = 0; i < nb; ++i) - if (__put_user(rptr[i], addr+i)) - return -EFAULT; - if (nb0 > 0) { - rptr = (unsigned char *) ®s->gpr[0]; - addr += nb; - for (i = 0; i < nb0; ++i) - if (__put_user(rptr[i], addr+i)) - return -EFAULT; - } - } - return 1; - } - - offset = 0; - if (nb < 4) { - /* read/write the least significant bits */ - data.l = 0; - offset = 4 - nb; - } - - /* Verify the address of the operand */ - if (user_mode(regs)) { - if (!access_ok((flags & ST? VERIFY_WRITE: VERIFY_READ), addr, nb)) - return -EFAULT; /* bad address */ - } - - if (flags & F) { - preempt_disable(); - if (regs->msr & MSR_FP) - giveup_fpu(current); - preempt_enable(); - } - - /* If we read the operand, copy it in, else get register values */ - if (flags & LD) { - for (i = 0; i < nb; ++i) - if (__get_user(data.v[offset+i], addr+i)) - return -EFAULT; - } else if (flags & F) { - data.d = current->thread.fpr[reg]; - } else { - data.l = regs->gpr[reg]; - } - - switch (flags & ~U) { - case LD+SE: /* sign extend */ - if (data.v[2] >= 0x80) - data.v[0] = data.v[1] = -1; - break; - - case LD+S: /* byte-swap */ - case ST+S: - if (nb == 2) { - SWAP(data.v[2], data.v[3]); - } else { - SWAP(data.v[0], data.v[3]); - SWAP(data.v[1], data.v[2]); - } - break; - - /* Single-precision FP load and store require conversions... */ - case LD+F+S: -#ifdef CONFIG_PPC_FPU - preempt_disable(); - enable_kernel_fp(); - cvt_fd(&data.f, &data.d, ¤t->thread); - preempt_enable(); -#else - return 0; -#endif - break; - case ST+F+S: -#ifdef CONFIG_PPC_FPU - preempt_disable(); - enable_kernel_fp(); - cvt_df(&data.d, &data.f, ¤t->thread); - preempt_enable(); -#else - return 0; -#endif - break; - } - - if (flags & ST) { - for (i = 0; i < nb; ++i) - if (__put_user(data.v[offset+i], addr+i)) - return -EFAULT; - } else if (flags & F) { - current->thread.fpr[reg] = data.d; - } else { - regs->gpr[reg] = data.l; - } - - if (flags & U) - regs->gpr[areg] = regs->dar; - - return 1; -} -- cgit v1.2.3 From 44aedfe7dedb1ba9f4f9d17f55dec5727f5ff82f Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Fri, 18 Nov 2005 15:54:12 +1100 Subject: powerpc: Fix a couple of compile warnings for 32-bit compiles Signed-off-by: Paul Mackerras --- arch/ppc/kernel/pci.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/ppc') diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c index 48ed58f995c..f7fae5f153b 100644 --- a/arch/ppc/kernel/pci.c +++ b/arch/ppc/kernel/pci.c @@ -45,7 +45,6 @@ static void update_bridge_base(struct pci_bus *bus, int i); static void pcibios_fixup_resources(struct pci_dev* dev); static void fixup_broken_pcnet32(struct pci_dev* dev); static int reparent_resources(struct resource *parent, struct resource *res); -static void fixup_rev1_53c810(struct pci_dev* dev); static void fixup_cpc710_pci64(struct pci_dev* dev); #ifdef CONFIG_PPC_OF static u8* pci_to_OF_bus_map; -- cgit v1.2.3