From 01ab10393c510342ec4ce85df11ccfa3df06bbb2 Mon Sep 17 00:00:00 2001 From: Michael Trimarchi Date: Fri, 3 Apr 2009 17:32:33 +0000 Subject: sh: Fix up DSP context save/restore. There were a number of issues with the DSP context save/restore code, mostly left-over relics from when it was introduced on SH3-DSP with little follow-up testing, resulting in things like task_pt_dspregs() referencing incorrect state on the stack. This follows the MIPS convention of tracking the DSP state in the thread_struct and handling the state save/restore in switch_to() and finish_arch_switch() respectively. The regset interface is also updated, which allows us to finally be rid of task_pt_dspregs() and the special cased task_pt_regs(). Signed-off-by: Michael Trimarchi Signed-off-by: Paul Mundt --- arch/sh/include/asm/processor_32.h | 13 +++ arch/sh/include/asm/ptrace.h | 8 -- arch/sh/include/asm/system_32.h | 170 +++++++++++++++++++++++++++---------- 3 files changed, 136 insertions(+), 55 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index efdd78a53b1..9a8714945dc 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h @@ -57,6 +57,14 @@ asmlinkage void __init sh_cpu_init(void); #define SR_IMASK 0x000000f0 #define SR_FD 0x00008000 +/* + * DSP structure and data + */ +struct sh_dsp_struct { + unsigned long dsp_regs[14]; + long status; +}; + /* * FPU structure and data */ @@ -96,6 +104,11 @@ struct thread_struct { /* floating point info */ union sh_fpu_union fpu; + +#ifdef CONFIG_SH_DSP + /* Dsp status information */ + struct sh_dsp_struct dsp_status; +#endif }; /* Count of active tasks with UBC settings */ diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index 81c6568fdb3..d3f6caa936b 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h @@ -119,16 +119,8 @@ struct task_struct; extern void user_enable_single_step(struct task_struct *); extern void user_disable_single_step(struct task_struct *); -#ifdef CONFIG_SH_DSP -#define task_pt_regs(task) \ - ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ - - sizeof(struct pt_dspregs)) - 1) -#define task_pt_dspregs(task) \ - ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE) - 1) -#else #define task_pt_regs(task) \ ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) -#endif static inline unsigned long profile_pc(struct pt_regs *regs) { diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h index a726d5d0727..240b31e1142 100644 --- a/arch/sh/include/asm/system_32.h +++ b/arch/sh/include/asm/system_32.h @@ -3,59 +3,135 @@ #include +#ifdef CONFIG_SH_DSP + +#define is_dsp_enabled(tsk) \ + (!!(tsk->thread.dsp_status.status & SR_DSP)) + +#define __restore_dsp(tsk) \ +do { \ + register u32 *__ts2 __asm__ ("r2") = \ + (u32 *)&tsk->thread.dsp_status; \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "movs.l @r2+, a1\n\t" \ + "movs.l @r2+, a0g\n\t" \ + "movs.l @r2+, a1g\n\t" \ + "movs.l @r2+, m0\n\t" \ + "movs.l @r2+, m1\n\t" \ + "movs.l @r2+, a0\n\t" \ + "movs.l @r2+, x0\n\t" \ + "movs.l @r2+, x1\n\t" \ + "movs.l @r2+, y0\n\t" \ + "movs.l @r2+, y1\n\t" \ + "lds.l @r2+, dsr\n\t" \ + "ldc.l @r2+, rs\n\t" \ + "ldc.l @r2+, re\n\t" \ + "ldc.l @r2+, mod\n\t" \ + : : "r" (__ts2)); \ +} while (0) + + +#define __save_dsp(tsk) \ +do { \ + register u32 *__ts2 __asm__ ("r2") = \ + (u32 *)&tsk->thread.dsp_status + 14; \ + \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "stc.l mod, @-r2\n\t" \ + "stc.l re, @-r2\n\t" \ + "stc.l rs, @-r2\n\t" \ + "sts.l dsr, @-r2\n\t" \ + "sts.l y1, @-r2\n\t" \ + "sts.l y0, @-r2\n\t" \ + "sts.l x1, @-r2\n\t" \ + "sts.l x0, @-r2\n\t" \ + "sts.l a0, @-r2\n\t" \ + ".word 0xf653 ! movs.l a1, @-r2\n\t" \ + ".word 0xf6f3 ! movs.l a0g, @-r2\n\t" \ + ".word 0xf6d3 ! movs.l a1g, @-r2\n\t" \ + ".word 0xf6c3 ! movs.l m0, @-r2\n\t" \ + ".word 0xf6e3 ! movs.l m1, @-r2\n\t" \ + : : "r" (__ts2)); \ +} while (0) + +#else + +#define is_dsp_enabled(tsk) (0) +#define __save_dsp(tsk) do { } while (0) +#define __restore_dsp(tsk) do { } while (0) +#endif + struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *next); /* * switch_to() should switch tasks to task nr n, first */ -#define switch_to(prev, next, last) \ -do { \ - register u32 *__ts1 __asm__ ("r1") = (u32 *)&prev->thread.sp; \ - register u32 *__ts2 __asm__ ("r2") = (u32 *)&prev->thread.pc; \ - register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; \ - register u32 *__ts5 __asm__ ("r5") = (u32 *)next; \ - register u32 *__ts6 __asm__ ("r6") = (u32 *)&next->thread.sp; \ - register u32 __ts7 __asm__ ("r7") = next->thread.pc; \ - struct task_struct *__last; \ - \ - __asm__ __volatile__ ( \ - ".balign 4\n\t" \ - "stc.l gbr, @-r15\n\t" \ - "sts.l pr, @-r15\n\t" \ - "mov.l r8, @-r15\n\t" \ - "mov.l r9, @-r15\n\t" \ - "mov.l r10, @-r15\n\t" \ - "mov.l r11, @-r15\n\t" \ - "mov.l r12, @-r15\n\t" \ - "mov.l r13, @-r15\n\t" \ - "mov.l r14, @-r15\n\t" \ - "mov.l r15, @r1\t! save SP\n\t" \ - "mov.l @r6, r15\t! change to new stack\n\t" \ - "mova 1f, %0\n\t" \ - "mov.l %0, @r2\t! save PC\n\t" \ - "mov.l 2f, %0\n\t" \ - "jmp @%0\t! call __switch_to\n\t" \ - " lds r7, pr\t! with return to new PC\n\t" \ - ".balign 4\n" \ - "2:\n\t" \ - ".long __switch_to\n" \ - "1:\n\t" \ - "mov.l @r15+, r14\n\t" \ - "mov.l @r15+, r13\n\t" \ - "mov.l @r15+, r12\n\t" \ - "mov.l @r15+, r11\n\t" \ - "mov.l @r15+, r10\n\t" \ - "mov.l @r15+, r9\n\t" \ - "mov.l @r15+, r8\n\t" \ - "lds.l @r15+, pr\n\t" \ - "ldc.l @r15+, gbr\n\t" \ - : "=z" (__last) \ - : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ - "r" (__ts5), "r" (__ts6), "r" (__ts7) \ - : "r3", "t"); \ - \ - last = __last; \ +#define switch_to(prev, next, last) \ +do { \ + register u32 *__ts1 __asm__ ("r1"); \ + register u32 *__ts2 __asm__ ("r2"); \ + register u32 *__ts4 __asm__ ("r4"); \ + register u32 *__ts5 __asm__ ("r5"); \ + register u32 *__ts6 __asm__ ("r6"); \ + register u32 __ts7 __asm__ ("r7"); \ + struct task_struct *__last; \ + \ + if (is_dsp_enabled(prev)) \ + __save_dsp(prev); \ + \ + __ts1 = (u32 *)&prev->thread.sp; \ + __ts2 = (u32 *)&prev->thread.pc; \ + __ts4 = (u32 *)prev; \ + __ts5 = (u32 *)next; \ + __ts6 = (u32 *)&next->thread.sp; \ + __ts7 = next->thread.pc; \ + \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "stc.l gbr, @-r15\n\t" \ + "sts.l pr, @-r15\n\t" \ + "mov.l r8, @-r15\n\t" \ + "mov.l r9, @-r15\n\t" \ + "mov.l r10, @-r15\n\t" \ + "mov.l r11, @-r15\n\t" \ + "mov.l r12, @-r15\n\t" \ + "mov.l r13, @-r15\n\t" \ + "mov.l r14, @-r15\n\t" \ + "mov.l r15, @r1\t! save SP\n\t" \ + "mov.l @r6, r15\t! change to new stack\n\t" \ + "mova 1f, %0\n\t" \ + "mov.l %0, @r2\t! save PC\n\t" \ + "mov.l 2f, %0\n\t" \ + "jmp @%0\t! call __switch_to\n\t" \ + " lds r7, pr\t! with return to new PC\n\t" \ + ".balign 4\n" \ + "2:\n\t" \ + ".long __switch_to\n" \ + "1:\n\t" \ + "mov.l @r15+, r14\n\t" \ + "mov.l @r15+, r13\n\t" \ + "mov.l @r15+, r12\n\t" \ + "mov.l @r15+, r11\n\t" \ + "mov.l @r15+, r10\n\t" \ + "mov.l @r15+, r9\n\t" \ + "mov.l @r15+, r8\n\t" \ + "lds.l @r15+, pr\n\t" \ + "ldc.l @r15+, gbr\n\t" \ + : "=z" (__last) \ + : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ + "r" (__ts5), "r" (__ts6), "r" (__ts7) \ + : "r3", "t"); \ + \ + last = __last; \ +} while (0) + +#define finish_arch_switch(prev) \ +do { \ + if (is_dsp_enabled(prev)) \ + __restore_dsp(prev); \ } while (0) #define __uses_jump_to_uncached \ -- cgit v1.2.3