From 1c58b0b1a1412ceb6b25dad81bc537bf0fe6ad46 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 26 Mar 2009 00:39:49 +0000 Subject: sh: Tidy up sh7786 pinmux table. Formatting and typo fix. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- arch/sh/include/cpu-sh4/cpu/sh7786.h | 214 +++++++++++++---------------------- 1 file changed, 79 insertions(+), 135 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/cpu-sh4/cpu/sh7786.h b/arch/sh/include/cpu-sh4/cpu/sh7786.h index 48688adc0c8..977862f9072 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7786.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7786.h @@ -51,142 +51,86 @@ enum { GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4, GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0, - GPIO_FN_CDE, - GPIO_FN_ETH_MAGIC, - GPIO_FN_DISP, - GPIO_FN_ETH_LINK, - GPIO_FN_DR5, - GPIO_FN_ETH_TX_ER, - GPIO_FN_DR4, - GPIO_FN_ETH_TX_EN, - GPIO_FN_DR3, - GPIO_FN_ETH_TXD3, - GPIO_FN_DR2, - GPIO_FN_ETH_TXD2, - GPIO_FN_DR1, - GPIO_FN_ETH_TXD1, - GPIO_FN_DR0, - GPIO_FN_ETH_TXD0, - GPIO_FN_VSYNC, - GPIO_FN_HSPI_CLK, - GPIO_FN_ODDF, - GPIO_FN_HSPI_CS, - GPIO_FN_DG5, - GPIO_FN_ETH_MDIO, - GPIO_FN_DG4, - GPIO_FN_ETH_RX_CLK, - GPIO_FN_DG3, - GPIO_FN_ETH_MDC, - GPIO_FN_DG2, - GPIO_FN_ETH_COL, - GPIO_FN_DG1, - GPIO_FN_ETH_TX_CLK, - GPIO_FN_DG0, - GPIO_FN_ETH_CRS, - GPIO_FN_DCLKIN, - GPIO_FN_HSPI_RX, - GPIO_FN_HSYNC, - GPIO_FN_HSPI_TX, - GPIO_FN_DB5, - GPIO_FN_ETH_RXD3, - GPIO_FN_DB4, - GPIO_FN_ETH_RXD2, - GPIO_FN_DB3, - GPIO_FN_ETH_RXD1, - GPIO_FN_DB2, - GPIO_FN_ETH_RXD0, - GPIO_FN_DB1, - GPIO_FN_ETH_RX_DV, - GPIO_FN_DB0, - GPIO_FN_ETH_RX_ER, - GPIO_FN_DCLKOUT, - GPIO_FN_SCIF1_SLK, - GPIO_FN_SCIF1_RXD, - GPIO_FN_SCIF1_TXD, - GPIO_FN_DACK1, - GPIO_FN_BACK, - GPIO_FN_FALE, - GPIO_FN_DACK0, - GPIO_FN_FCLE, - GPIO_FN_DREQ1, - GPIO_FN_BREQ, - GPIO_FN_USB_OVC1, - GPIO_FN_DREQ0, - GPIO_FN_USB_OVC0, - GPIO_FN_USB_PENC1, - GPIO_FN_USB_PENC0, - GPIO_FN_HAC1_SDOUT, - GPIO_FN_SSI1_SDATA, - GPIO_FN_SDIF1CMD, - GPIO_FN_HAC1_SDIN, - GPIO_FN_SSI1_SCK, - GPIO_FN_SDIF1CD, - GPIO_FN_HAC1_SYNC, - GPIO_FN_SSI1_WS, - GPIO_FN_SDIF1WP, - GPIO_FN_HAC1_BITCLK, - GPIO_FN_SSI1_CLK, - GPIO_FN_SDIF1CLK, - GPIO_FN_HAC0_SDOUT, - GPIO_FN_SSI0_SDATA, - GPIO_FN_SDIF1D3, - GPIO_FN_HAC0_SDIN, - GPIO_FN_SSI0_SCK, - GPIO_FN_SDIF1D2, - GPIO_FN_HAC0_SYNC, - GPIO_FN_SSI0_WS, - GPIO_FN_SDIF1D1, - GPIO_FN_HAC0_BITCLK, - GPIO_FN_SSI0_CLK, - GPIO_FN_SDIF1D0, - GPIO_FN_SCIF3_SCK, - GPIO_FN_SSI2_SDATA, - GPIO_FN_SCIF3_RXD, - GPIO_FN_TCLK, - GPIO_FN_SSI2_SCK, - GPIO_FN_SCIF3_TXD, + /* DU */ + GPIO_FN_DCLKIN, GPIO_FN_DCLKOUT, GPIO_FN_ODDF, + GPIO_FN_VSYNC, GPIO_FN_HSYNC, GPIO_FN_CDE, GPIO_FN_DISP, + GPIO_FN_DR0, GPIO_FN_DG0, GPIO_FN_DB0, + GPIO_FN_DR1, GPIO_FN_DG1, GPIO_FN_DB1, + GPIO_FN_DR2, GPIO_FN_DG2, GPIO_FN_DB2, + GPIO_FN_DR3, GPIO_FN_DG3, GPIO_FN_DB3, + GPIO_FN_DR4, GPIO_FN_DG4, GPIO_FN_DB4, + GPIO_FN_DR5, GPIO_FN_DG5, GPIO_FN_DB5, + + /* Eth */ + GPIO_FN_ETH_MAGIC, GPIO_FN_ETH_LINK, GPIO_FN_ETH_TX_ER, + GPIO_FN_ETH_TX_EN, GPIO_FN_ETH_MDIO, GPIO_FN_ETH_RX_CLK, + GPIO_FN_ETH_MDC, GPIO_FN_ETH_COL, GPIO_FN_ETH_TX_CLK, + GPIO_FN_ETH_CRS, GPIO_FN_ETH_RX_DV, GPIO_FN_ETH_RX_ER, + GPIO_FN_ETH_TXD3, GPIO_FN_ETH_TXD2, GPIO_FN_ETH_TXD1, GPIO_FN_ETH_TXD0, + GPIO_FN_ETH_RXD3, GPIO_FN_ETH_RXD2, GPIO_FN_ETH_RXD1, GPIO_FN_ETH_RXD0, + + /* HSPI */ + GPIO_FN_HSPI_CLK, GPIO_FN_HSPI_CS, GPIO_FN_HSPI_RX, GPIO_FN_HSPI_TX, + + /* SCIF0 */ + GPIO_FN_SCIF0_CTS, GPIO_FN_SCIF0_RTS, GPIO_FN_SCIF0_SCK, + GPIO_FN_SCIF0_RXD, GPIO_FN_SCIF0_TXD, + + /* SCIF1 */ + GPIO_FN_SCIF1_SCK, GPIO_FN_SCIF1_RXD, GPIO_FN_SCIF1_TXD, + + /* SCIF3 */ + GPIO_FN_SCIF3_SCK, GPIO_FN_SCIF3_RXD, GPIO_FN_SCIF3_TXD, + + /* SCIF4 */ + GPIO_FN_SCIF4_SCK, GPIO_FN_SCIF4_RXD, GPIO_FN_SCIF4_TXD, + + /* SCIF5 */ + GPIO_FN_SCIF5_SCK, GPIO_FN_SCIF5_RXD, GPIO_FN_SCIF5_TXD, + + /* LBSC */ + GPIO_FN_BREQ, GPIO_FN_IOIS16, GPIO_FN_CE2B, GPIO_FN_CE2A, GPIO_FN_BACK, + + /* FLCTL */ + GPIO_FN_FALE, GPIO_FN_FRB, GPIO_FN_FSTATUS, + GPIO_FN_FSE, GPIO_FN_FCLE, + + /* DMAC */ + GPIO_FN_DACK0, GPIO_FN_DREQ0, GPIO_FN_DRAK0, + GPIO_FN_DACK1, GPIO_FN_DREQ1, GPIO_FN_DRAK1, + GPIO_FN_DACK2, GPIO_FN_DREQ2, GPIO_FN_DRAK2, + GPIO_FN_DACK3, GPIO_FN_DREQ3, GPIO_FN_DRAK3, + + /* USB */ + GPIO_FN_USB_OVC0, GPIO_FN_USB_PENC0, + GPIO_FN_USB_OVC1, GPIO_FN_USB_PENC1, + + /* HAC */ GPIO_FN_HAC_RES, - GPIO_FN_SSI2_WS, - GPIO_FN_DACK3, - GPIO_FN_SDIF0CMD, - GPIO_FN_DACK2, - GPIO_FN_SDIF0CD, - GPIO_FN_DREQ3, - GPIO_FN_SDIF0WP, - GPIO_FN_SCIF0_CTS, - GPIO_FN_DREQ2, - GPIO_FN_SDIF0CLK, - GPIO_FN_SCIF0_RTS, - GPIO_FN_IRL7, - GPIO_FN_SDIF0D3, - GPIO_FN_SCIF0_SCK, - GPIO_FN_IRL6, - GPIO_FN_SDIF0D2, - GPIO_FN_SCIF0_RXD, - GPIO_FN_IRL5, - GPIO_FN_SDIF0D1, - GPIO_FN_SCIF0_TXD, - GPIO_FN_IRL4, - GPIO_FN_SDIF0D0, - GPIO_FN_SCIF5_SCK, - GPIO_FN_FRB, - GPIO_FN_SCIF5_RXD, - GPIO_FN_IOIS16, - GPIO_FN_SCIF5_TXD, - GPIO_FN_CE2B, - GPIO_FN_DRAK3, - GPIO_FN_CE2A, - GPIO_FN_SCIF4_SCK, - GPIO_FN_DRAK2, - GPIO_FN_SSI3_WS, - GPIO_FN_SCIF4_RXD, - GPIO_FN_DRAK1, - GPIO_FN_SSI3_SDATA, - GPIO_FN_FSTATUS, - GPIO_FN_SCIF4_TXD, - GPIO_FN_DRAK0, - GPIO_FN_SSI3_SCK, - GPIO_FN_FSE, + GPIO_FN_HAC0_SDOUT, GPIO_FN_HAC0_SDIN, + GPIO_FN_HAC0_SYNC, GPIO_FN_HAC0_BITCLK, + GPIO_FN_HAC1_SDOUT, GPIO_FN_HAC1_SDIN, + GPIO_FN_HAC1_SYNC, GPIO_FN_HAC1_BITCLK, + + /* SSI */ + GPIO_FN_SSI0_SDATA, GPIO_FN_SSI0_SCK, GPIO_FN_SSI0_WS, GPIO_FN_SSI0_CLK, + GPIO_FN_SSI1_SDATA, GPIO_FN_SSI1_SCK, GPIO_FN_SSI1_WS, GPIO_FN_SSI1_CLK, + GPIO_FN_SSI2_SDATA, GPIO_FN_SSI2_SCK, GPIO_FN_SSI2_WS, + GPIO_FN_SSI3_SDATA, GPIO_FN_SSI3_SCK, GPIO_FN_SSI3_WS, + + /* SDIF1 */ + GPIO_FN_SDIF1CMD, GPIO_FN_SDIF1CD, GPIO_FN_SDIF1WP, GPIO_FN_SDIF1CLK, + GPIO_FN_SDIF1D3, GPIO_FN_SDIF1D2, GPIO_FN_SDIF1D1, GPIO_FN_SDIF1D0, + + /* SDIF0 */ + GPIO_FN_SDIF0CMD, GPIO_FN_SDIF0CD, GPIO_FN_SDIF0WP, GPIO_FN_SDIF0CLK, + GPIO_FN_SDIF0D3, GPIO_FN_SDIF0D2, GPIO_FN_SDIF0D1, GPIO_FN_SDIF0D0, + + /* TMU */ + GPIO_FN_TCLK, + + /* INTC */ + GPIO_FN_IRL7, GPIO_FN_IRL6, GPIO_FN_IRL5, GPIO_FN_IRL4, }; #endif /* __CPU_SH7786_H__ */ -- cgit v1.2.3 From 3b4df71b364e230fb7b02356d1f8fce64838ddc7 Mon Sep 17 00:00:00 2001 From: Francesco VIRLINZI Date: Tue, 24 Mar 2009 13:30:01 +0000 Subject: sh: Sanitize asm/mmu.h for assembly use. This patch adds the ifndef __ASSEMBLY__ preprocessor to allow the defines in the file to be used also in assembly code. Signed-off-by: Francesco Virlinzi Signed-off-by: Paul Mundt --- arch/sh/include/asm/mmu.h | 35 +++++++++++++++++++---------------- 1 file changed, 19 insertions(+), 16 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h index 6c43625bb1a..f5963037c9d 100644 --- a/arch/sh/include/asm/mmu.h +++ b/arch/sh/include/asm/mmu.h @@ -1,22 +1,6 @@ #ifndef __MMU_H #define __MMU_H -/* Default "unsigned long" context */ -typedef unsigned long mm_context_id_t[NR_CPUS]; - -typedef struct { -#ifdef CONFIG_MMU - mm_context_id_t id; - void *vdso; -#else - unsigned long end_brk; -#endif -#ifdef CONFIG_BINFMT_ELF_FDPIC - unsigned long exec_fdpic_loadmap; - unsigned long interp_fdpic_loadmap; -#endif -} mm_context_t; - /* * Privileged Space Mapping Buffer (PMB) definitions */ @@ -41,6 +25,24 @@ typedef struct { #define PMB_NO_ENTRY (-1) +#ifndef __ASSEMBLY__ + +/* Default "unsigned long" context */ +typedef unsigned long mm_context_id_t[NR_CPUS]; + +typedef struct { +#ifdef CONFIG_MMU + mm_context_id_t id; + void *vdso; +#else + unsigned long end_brk; +#endif +#ifdef CONFIG_BINFMT_ELF_FDPIC + unsigned long exec_fdpic_loadmap; + unsigned long interp_fdpic_loadmap; +#endif +} mm_context_t; + struct pmb_entry; struct pmb_entry { @@ -70,6 +72,7 @@ void pmb_free(struct pmb_entry *pmbe); long pmb_remap(unsigned long virt, unsigned long phys, unsigned long size, unsigned long flags); void pmb_unmap(unsigned long addr); +#endif /* __ASSEMBLY__ */ #endif /* __MMU_H */ -- cgit v1.2.3 From e869a90ee1235a4f89ecb956e7b7d724d65217c8 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 2 Apr 2009 13:08:31 +0900 Subject: sh: Wire up ARCH_HAS_DEFAULT_IDLE for cpuidle. cpuidle wants ARCH_HAS_DEFAULT_IDLE defined in order to use the default idle loop. So, make it accessible and enable it for all sh machines. Signed-off-by: Paul Mundt --- arch/sh/include/asm/system.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index c9ec6af8e74..a88895e6dcb 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h @@ -153,6 +153,7 @@ extern unsigned long cached_to_uncached; extern struct dentry *sh_debugfs_root; void per_cpu_trap_init(void); +void default_idle(void); asmlinkage void break_point_trap(void); -- cgit v1.2.3 From 01ab10393c510342ec4ce85df11ccfa3df06bbb2 Mon Sep 17 00:00:00 2001 From: Michael Trimarchi Date: Fri, 3 Apr 2009 17:32:33 +0000 Subject: sh: Fix up DSP context save/restore. There were a number of issues with the DSP context save/restore code, mostly left-over relics from when it was introduced on SH3-DSP with little follow-up testing, resulting in things like task_pt_dspregs() referencing incorrect state on the stack. This follows the MIPS convention of tracking the DSP state in the thread_struct and handling the state save/restore in switch_to() and finish_arch_switch() respectively. The regset interface is also updated, which allows us to finally be rid of task_pt_dspregs() and the special cased task_pt_regs(). Signed-off-by: Michael Trimarchi Signed-off-by: Paul Mundt --- arch/sh/include/asm/processor_32.h | 13 +++ arch/sh/include/asm/ptrace.h | 8 -- arch/sh/include/asm/system_32.h | 170 +++++++++++++++++++++++++++---------- 3 files changed, 136 insertions(+), 55 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index efdd78a53b1..9a8714945dc 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h @@ -57,6 +57,14 @@ asmlinkage void __init sh_cpu_init(void); #define SR_IMASK 0x000000f0 #define SR_FD 0x00008000 +/* + * DSP structure and data + */ +struct sh_dsp_struct { + unsigned long dsp_regs[14]; + long status; +}; + /* * FPU structure and data */ @@ -96,6 +104,11 @@ struct thread_struct { /* floating point info */ union sh_fpu_union fpu; + +#ifdef CONFIG_SH_DSP + /* Dsp status information */ + struct sh_dsp_struct dsp_status; +#endif }; /* Count of active tasks with UBC settings */ diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index 81c6568fdb3..d3f6caa936b 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h @@ -119,16 +119,8 @@ struct task_struct; extern void user_enable_single_step(struct task_struct *); extern void user_disable_single_step(struct task_struct *); -#ifdef CONFIG_SH_DSP -#define task_pt_regs(task) \ - ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ - - sizeof(struct pt_dspregs)) - 1) -#define task_pt_dspregs(task) \ - ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE) - 1) -#else #define task_pt_regs(task) \ ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) -#endif static inline unsigned long profile_pc(struct pt_regs *regs) { diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h index a726d5d0727..240b31e1142 100644 --- a/arch/sh/include/asm/system_32.h +++ b/arch/sh/include/asm/system_32.h @@ -3,59 +3,135 @@ #include +#ifdef CONFIG_SH_DSP + +#define is_dsp_enabled(tsk) \ + (!!(tsk->thread.dsp_status.status & SR_DSP)) + +#define __restore_dsp(tsk) \ +do { \ + register u32 *__ts2 __asm__ ("r2") = \ + (u32 *)&tsk->thread.dsp_status; \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "movs.l @r2+, a1\n\t" \ + "movs.l @r2+, a0g\n\t" \ + "movs.l @r2+, a1g\n\t" \ + "movs.l @r2+, m0\n\t" \ + "movs.l @r2+, m1\n\t" \ + "movs.l @r2+, a0\n\t" \ + "movs.l @r2+, x0\n\t" \ + "movs.l @r2+, x1\n\t" \ + "movs.l @r2+, y0\n\t" \ + "movs.l @r2+, y1\n\t" \ + "lds.l @r2+, dsr\n\t" \ + "ldc.l @r2+, rs\n\t" \ + "ldc.l @r2+, re\n\t" \ + "ldc.l @r2+, mod\n\t" \ + : : "r" (__ts2)); \ +} while (0) + + +#define __save_dsp(tsk) \ +do { \ + register u32 *__ts2 __asm__ ("r2") = \ + (u32 *)&tsk->thread.dsp_status + 14; \ + \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "stc.l mod, @-r2\n\t" \ + "stc.l re, @-r2\n\t" \ + "stc.l rs, @-r2\n\t" \ + "sts.l dsr, @-r2\n\t" \ + "sts.l y1, @-r2\n\t" \ + "sts.l y0, @-r2\n\t" \ + "sts.l x1, @-r2\n\t" \ + "sts.l x0, @-r2\n\t" \ + "sts.l a0, @-r2\n\t" \ + ".word 0xf653 ! movs.l a1, @-r2\n\t" \ + ".word 0xf6f3 ! movs.l a0g, @-r2\n\t" \ + ".word 0xf6d3 ! movs.l a1g, @-r2\n\t" \ + ".word 0xf6c3 ! movs.l m0, @-r2\n\t" \ + ".word 0xf6e3 ! movs.l m1, @-r2\n\t" \ + : : "r" (__ts2)); \ +} while (0) + +#else + +#define is_dsp_enabled(tsk) (0) +#define __save_dsp(tsk) do { } while (0) +#define __restore_dsp(tsk) do { } while (0) +#endif + struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *next); /* * switch_to() should switch tasks to task nr n, first */ -#define switch_to(prev, next, last) \ -do { \ - register u32 *__ts1 __asm__ ("r1") = (u32 *)&prev->thread.sp; \ - register u32 *__ts2 __asm__ ("r2") = (u32 *)&prev->thread.pc; \ - register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; \ - register u32 *__ts5 __asm__ ("r5") = (u32 *)next; \ - register u32 *__ts6 __asm__ ("r6") = (u32 *)&next->thread.sp; \ - register u32 __ts7 __asm__ ("r7") = next->thread.pc; \ - struct task_struct *__last; \ - \ - __asm__ __volatile__ ( \ - ".balign 4\n\t" \ - "stc.l gbr, @-r15\n\t" \ - "sts.l pr, @-r15\n\t" \ - "mov.l r8, @-r15\n\t" \ - "mov.l r9, @-r15\n\t" \ - "mov.l r10, @-r15\n\t" \ - "mov.l r11, @-r15\n\t" \ - "mov.l r12, @-r15\n\t" \ - "mov.l r13, @-r15\n\t" \ - "mov.l r14, @-r15\n\t" \ - "mov.l r15, @r1\t! save SP\n\t" \ - "mov.l @r6, r15\t! change to new stack\n\t" \ - "mova 1f, %0\n\t" \ - "mov.l %0, @r2\t! save PC\n\t" \ - "mov.l 2f, %0\n\t" \ - "jmp @%0\t! call __switch_to\n\t" \ - " lds r7, pr\t! with return to new PC\n\t" \ - ".balign 4\n" \ - "2:\n\t" \ - ".long __switch_to\n" \ - "1:\n\t" \ - "mov.l @r15+, r14\n\t" \ - "mov.l @r15+, r13\n\t" \ - "mov.l @r15+, r12\n\t" \ - "mov.l @r15+, r11\n\t" \ - "mov.l @r15+, r10\n\t" \ - "mov.l @r15+, r9\n\t" \ - "mov.l @r15+, r8\n\t" \ - "lds.l @r15+, pr\n\t" \ - "ldc.l @r15+, gbr\n\t" \ - : "=z" (__last) \ - : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ - "r" (__ts5), "r" (__ts6), "r" (__ts7) \ - : "r3", "t"); \ - \ - last = __last; \ +#define switch_to(prev, next, last) \ +do { \ + register u32 *__ts1 __asm__ ("r1"); \ + register u32 *__ts2 __asm__ ("r2"); \ + register u32 *__ts4 __asm__ ("r4"); \ + register u32 *__ts5 __asm__ ("r5"); \ + register u32 *__ts6 __asm__ ("r6"); \ + register u32 __ts7 __asm__ ("r7"); \ + struct task_struct *__last; \ + \ + if (is_dsp_enabled(prev)) \ + __save_dsp(prev); \ + \ + __ts1 = (u32 *)&prev->thread.sp; \ + __ts2 = (u32 *)&prev->thread.pc; \ + __ts4 = (u32 *)prev; \ + __ts5 = (u32 *)next; \ + __ts6 = (u32 *)&next->thread.sp; \ + __ts7 = next->thread.pc; \ + \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "stc.l gbr, @-r15\n\t" \ + "sts.l pr, @-r15\n\t" \ + "mov.l r8, @-r15\n\t" \ + "mov.l r9, @-r15\n\t" \ + "mov.l r10, @-r15\n\t" \ + "mov.l r11, @-r15\n\t" \ + "mov.l r12, @-r15\n\t" \ + "mov.l r13, @-r15\n\t" \ + "mov.l r14, @-r15\n\t" \ + "mov.l r15, @r1\t! save SP\n\t" \ + "mov.l @r6, r15\t! change to new stack\n\t" \ + "mova 1f, %0\n\t" \ + "mov.l %0, @r2\t! save PC\n\t" \ + "mov.l 2f, %0\n\t" \ + "jmp @%0\t! call __switch_to\n\t" \ + " lds r7, pr\t! with return to new PC\n\t" \ + ".balign 4\n" \ + "2:\n\t" \ + ".long __switch_to\n" \ + "1:\n\t" \ + "mov.l @r15+, r14\n\t" \ + "mov.l @r15+, r13\n\t" \ + "mov.l @r15+, r12\n\t" \ + "mov.l @r15+, r11\n\t" \ + "mov.l @r15+, r10\n\t" \ + "mov.l @r15+, r9\n\t" \ + "mov.l @r15+, r8\n\t" \ + "lds.l @r15+, pr\n\t" \ + "ldc.l @r15+, gbr\n\t" \ + : "=z" (__last) \ + : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ + "r" (__ts5), "r" (__ts6), "r" (__ts7) \ + : "r3", "t"); \ + \ + last = __last; \ +} while (0) + +#define finish_arch_switch(prev) \ +do { \ + if (is_dsp_enabled(prev)) \ + __restore_dsp(prev); \ } while (0) #define __uses_jump_to_uncached \ -- cgit v1.2.3