From 28347bce8a837258e737873a55d31f2f424a6ea6 Mon Sep 17 00:00:00 2001 From: HyeonSeung Jang Date: Wed, 4 Oct 2006 17:26:13 +0200 Subject: [POWERPC] spufs: fix context switch during page fault For better explanation, I break down the page fault handling into steps: 1) There is a page fault caused by DMA operation initiated by SPU and DMA is suspended. 2) The interrupt handler 'spu_irq_class_1()/__spu_trap_data_map()' is called and it just wakes up the sleeping spe-manager thread. 3) by PPE scheduler, the corresponding bottom half, spu_irq_class_1_bottom() is called in process context and DMA is restarted. There can be a quite large time gap between 2) and 3) and I found the following problem: Between 2) and 3) If the context becomes unbound, 3) is not executed because when the spe-manager thread is awaken, the context is already saved. (This situation can happen, for example, when a high priority spe thread newly started in that time gap) But the actual problem is that the corresponding SPU context does not work even if it is bound again to a SPU. Besides I can see the following warning in mambo simulator when the context becomes unbound(in save_mfc_cmd()), i.e. when unbind() is called for the context after step 2) before 3) : 'WARNING: 61392752237: SPE2: MFC_CMD_QUEUE channel count of 15 is inconsistent with number of available DMA queue entries of 16' After I go through available documents, I found that the problem is because the suspended DMA is not restarted when it is bound again. Signed-off-by: Arnd Bergmann Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/cell/spufs/switch.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c index 9d9d82dd32b..0f782ca662b 100644 --- a/arch/powerpc/platforms/cell/spufs/switch.c +++ b/arch/powerpc/platforms/cell/spufs/switch.c @@ -1779,6 +1779,15 @@ static inline void restore_mfc_cntl(struct spu_state *csa, struct spu *spu) */ out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW); eieio(); + /* + * FIXME: this is to restart a DMA that we were processing + * before the save. better remember the fault information + * in the csa instead. + */ + if ((csa->priv2.mfc_control_RW & MFC_CNTL_SUSPEND_DMA_QUEUE_MASK)) { + out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); + eieio(); + } } static inline void enable_user_access(struct spu_state *csa, struct spu *spu) -- cgit v1.2.3