From cfb0810eab39d1162f45b73fc96f45ab1cbcbe8b Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 30 Jun 2005 11:06:49 +0100 Subject: [PATCH] ARM: Don't try to send a signal to pid0 If we receive an unrecognised abort during boot, don't try to send a signal to pid0, but instead report the current state. This leads to less confusing debug reports. Signed-off-by: Russell King --- arch/arm/kernel/traps.c | 12 ++------ arch/arm/mm/fault.c | 75 ++++++++++++++++++++++++++----------------------- 2 files changed, 42 insertions(+), 45 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 2fb0a4cfb37..df2cb06ce42 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -230,16 +230,8 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) do_exit(SIGSEGV); } -void die_if_kernel(const char *str, struct pt_regs *regs, int err) -{ - if (user_mode(regs)) - return; - - die(str, regs, err); -} - -static void notify_die(const char *str, struct pt_regs *regs, siginfo_t *info, - unsigned long err, unsigned long trap) +void notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, + unsigned long err, unsigned long trap) { if (user_mode(regs)) { current->thread.error_code = err; diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index e25b4fd8412..65bfe84b6d6 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -372,49 +372,50 @@ do_bad(unsigned long addr, unsigned int fsr, struct pt_regs *regs) static struct fsr_info { int (*fn)(unsigned long addr, unsigned int fsr, struct pt_regs *regs); int sig; + int code; const char *name; } fsr_info[] = { /* * The following are the standard ARMv3 and ARMv4 aborts. ARMv5 * defines these to be "precise" aborts. */ - { do_bad, SIGSEGV, "vector exception" }, - { do_bad, SIGILL, "alignment exception" }, - { do_bad, SIGKILL, "terminal exception" }, - { do_bad, SIGILL, "alignment exception" }, - { do_bad, SIGBUS, "external abort on linefetch" }, - { do_translation_fault, SIGSEGV, "section translation fault" }, - { do_bad, SIGBUS, "external abort on linefetch" }, - { do_page_fault, SIGSEGV, "page translation fault" }, - { do_bad, SIGBUS, "external abort on non-linefetch" }, - { do_bad, SIGSEGV, "section domain fault" }, - { do_bad, SIGBUS, "external abort on non-linefetch" }, - { do_bad, SIGSEGV, "page domain fault" }, - { do_bad, SIGBUS, "external abort on translation" }, - { do_sect_fault, SIGSEGV, "section permission fault" }, - { do_bad, SIGBUS, "external abort on translation" }, - { do_page_fault, SIGSEGV, "page permission fault" }, + { do_bad, SIGSEGV, 0, "vector exception" }, + { do_bad, SIGILL, BUS_ADRALN, "alignment exception" }, + { do_bad, SIGKILL, 0, "terminal exception" }, + { do_bad, SIGILL, BUS_ADRALN, "alignment exception" }, + { do_bad, SIGBUS, 0, "external abort on linefetch" }, + { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" }, + { do_bad, SIGBUS, 0, "external abort on linefetch" }, + { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" }, + { do_bad, SIGBUS, 0, "external abort on non-linefetch" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" }, + { do_bad, SIGBUS, 0, "external abort on non-linefetch" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" }, + { do_bad, SIGBUS, 0, "external abort on translation" }, + { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" }, + { do_bad, SIGBUS, 0, "external abort on translation" }, + { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" }, /* * The following are "imprecise" aborts, which are signalled by bit * 10 of the FSR, and may not be recoverable. These are only * supported if the CPU abort handler supports bit 10. */ - { do_bad, SIGBUS, "unknown 16" }, - { do_bad, SIGBUS, "unknown 17" }, - { do_bad, SIGBUS, "unknown 18" }, - { do_bad, SIGBUS, "unknown 19" }, - { do_bad, SIGBUS, "lock abort" }, /* xscale */ - { do_bad, SIGBUS, "unknown 21" }, - { do_bad, SIGBUS, "imprecise external abort" }, /* xscale */ - { do_bad, SIGBUS, "unknown 23" }, - { do_bad, SIGBUS, "dcache parity error" }, /* xscale */ - { do_bad, SIGBUS, "unknown 25" }, - { do_bad, SIGBUS, "unknown 26" }, - { do_bad, SIGBUS, "unknown 27" }, - { do_bad, SIGBUS, "unknown 28" }, - { do_bad, SIGBUS, "unknown 29" }, - { do_bad, SIGBUS, "unknown 30" }, - { do_bad, SIGBUS, "unknown 31" } + { do_bad, SIGBUS, 0, "unknown 16" }, + { do_bad, SIGBUS, 0, "unknown 17" }, + { do_bad, SIGBUS, 0, "unknown 18" }, + { do_bad, SIGBUS, 0, "unknown 19" }, + { do_bad, SIGBUS, 0, "lock abort" }, /* xscale */ + { do_bad, SIGBUS, 0, "unknown 21" }, + { do_bad, SIGBUS, BUS_OBJERR, "imprecise external abort" }, /* xscale */ + { do_bad, SIGBUS, 0, "unknown 23" }, + { do_bad, SIGBUS, 0, "dcache parity error" }, /* xscale */ + { do_bad, SIGBUS, 0, "unknown 25" }, + { do_bad, SIGBUS, 0, "unknown 26" }, + { do_bad, SIGBUS, 0, "unknown 27" }, + { do_bad, SIGBUS, 0, "unknown 28" }, + { do_bad, SIGBUS, 0, "unknown 29" }, + { do_bad, SIGBUS, 0, "unknown 30" }, + { do_bad, SIGBUS, 0, "unknown 31" } }; void __init @@ -435,15 +436,19 @@ asmlinkage void do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) { const struct fsr_info *inf = fsr_info + (fsr & 15) + ((fsr & (1 << 10)) >> 6); + struct siginfo info; if (!inf->fn(addr, fsr, regs)) return; printk(KERN_ALERT "Unhandled fault: %s (0x%03x) at 0x%08lx\n", inf->name, fsr, addr); - force_sig(inf->sig, current); - show_pte(current->mm, addr); - die_if_kernel("Oops", regs, 0); + + info.si_signo = inf->sig; + info.si_errno = 0; + info.si_code = inf->code; + info.si_addr = (void __user *)addr; + notify_die("", regs, &info, fsr, 0); } asmlinkage void -- cgit v1.2.3 From c19cb1df809dcf343dd1eb6fe60d53639dafcb8c Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Thu, 30 Jun 2005 17:04:13 +0100 Subject: [PATCH] ARM: 2777/1: Fix broken comment arch/arm/mm/proc-arm1020.S Patch from Catalin Marinas This patch fixes a broken comment in the proc-arm1020.S file which prevents the file compilation Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/mm/proc-arm1020.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 1f325231b9e..e69f1940ab3 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -445,7 +445,7 @@ __arm1020_setup: /* * R * .RVI ZFRS BLDP WCAM - * .0.1 1001 ..11 0101 /* FIXME: why no V bit? */ + * .0.1 1001 ..11 0101 FIXME: why no V bit? */ .type arm1020_cr1_clear, #object .type arm1020_cr1_set, #object -- cgit v1.2.3 From c28a814f25d48f193565003223df0ae617796892 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Thu, 30 Jun 2005 17:04:14 +0100 Subject: [PATCH] ARM: 2778/1: Add -mno-thumb-interwork to CFLAGS_ABI Patch from Catalin Marinas The new EABI gcc adds -mthumb-interwork by default, even if -mabi=apcs-gnu is passed. This causes a warning for every compiled C file when -march=armv4 is used. The patch adds -mno-thumb-interwork if the option is supported. This is also useful since we don't need any ARM/Thumb interworking in the kernel Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 8330495e244..eb933dcafba 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -56,7 +56,7 @@ tune-$(CONFIG_CPU_XSCALE) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) tune-$(CONFIG_CPU_V6) :=-mtune=strongarm # Need -Uarm for gcc < 3.x -CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,) CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float -- cgit v1.2.3 From abaf48a05a8f097654e746af2a5afb2ab95861a1 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Thu, 30 Jun 2005 17:04:14 +0100 Subject: [PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs Patch from Catalin Marinas This patch fixes the V bit setting for the ARM1020x processors. At reset, this bit is automatically set to the value of the HIVECSINIT input signal which just happened to be 1 but it is not mandatory. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/mm/proc-arm1020.S | 4 ++-- arch/arm/mm/proc-arm1020e.S | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index e69f1940ab3..5c0ae5260d1 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -445,14 +445,14 @@ __arm1020_setup: /* * R * .RVI ZFRS BLDP WCAM - * .0.1 1001 ..11 0101 FIXME: why no V bit? + * .011 1001 ..11 0101 */ .type arm1020_cr1_clear, #object .type arm1020_cr1_set, #object arm1020_cr1_clear: .word 0x593f arm1020_cr1_set: - .word 0x1935 + .word 0x3935 __INITDATA diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 142a2c2d6f0..d69389c4d4b 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S @@ -427,14 +427,14 @@ __arm1020e_setup: /* * R * .RVI ZFRS BLDP WCAM - * .0.1 1001 ..11 0101 /* FIXME: why no V bit? */ + * .011 1001 ..11 0101 */ .type arm1020e_cr1_clear, #object .type arm1020e_cr1_set, #object arm1020e_cr1_clear: .word 0x5f3f arm1020e_cr1_set: - .word 0x1935 + .word 0x3935 __INITDATA -- cgit v1.2.3