From 69b0f5da26b44d352ff11d3e832f3ee277bb3343 Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Mon, 9 Mar 2009 21:02:33 +0000 Subject: Fix clock shift in s3c64xx_setrate_clksrc s3c64xx_setrate_clksrc used the clock selection shift sclk->shift instead of the divider shift sclk->divider_shift, causing clocks to be clobbered. Signed-off-by: Werner Almesberger --- arch/arm/plat-s3c64xx/s3c6400-clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c index 031c704f217..b6b9de5d708 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c @@ -318,8 +318,8 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate) return -EINVAL; val = __raw_readl(reg); - val &= ~(0xf << sclk->shift); - val |= (div - 1) << sclk->shift; + val &= ~(0xf << sclk->divider_shift); + val |= (div - 1) << sclk->divider_shift; __raw_writel(val, reg); return 0; -- cgit v1.2.3