From f6718653361e8f8a6aac9946822aa2090edf4f37 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 8 Dec 2008 19:25:28 +0000 Subject: [ARM] dma: pata_icside's contiguous sg array is now redundant Now that the IOMD DMA code walks the scatterlist using sg_next, converting the sg list into a contiguous list is no longer required. Signed-off-by: Russell King --- drivers/ata/pata_icside.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c index cf9e9848f8b..63121f45ba2 100644 --- a/drivers/ata/pata_icside.c +++ b/drivers/ata/pata_icside.c @@ -57,7 +57,6 @@ struct pata_icside_state { u8 disabled; unsigned int speed[ATA_MAX_DEVICES]; } port[2]; - struct scatterlist sg[PATA_ICSIDE_MAX_SG]; }; struct pata_icside_info { @@ -222,9 +221,7 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct pata_icside_state *state = ap->host->private_data; - struct scatterlist *sg, *rsg = state->sg; unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE; - unsigned int si; /* * We are simplex; BUG if we try to fiddle with DMA @@ -232,21 +229,13 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc) */ BUG_ON(dma_channel_active(state->dma)); - /* - * Copy ATAs scattered sg list into a contiguous array of sg - */ - for_each_sg(qc->sg, sg, qc->n_elem, si) { - memcpy(rsg, sg, sizeof(*sg)); - rsg++; - } - /* * Route the DMA signals to the correct interface */ writeb(state->port[ap->port_no].port_sel, state->ioc_base); set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]); - set_dma_sg(state->dma, state->sg, rsg - state->sg); + set_dma_sg(state->dma, qc->sg, qc->n_elem); set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ); /* issue r/w command */ -- cgit v1.2.3 From 5369bea7d7db1d95f63907f3470e23d32930be98 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 11 Dec 2008 16:37:06 +0000 Subject: [ARM] dma: Use sensible DMA parameters for Acorn drivers The hardware supports transfers up to a page boundary per buffer. Currently, we work around that in the DMA code by splitting each buffer up as we run through the scatterlist. Avoid this by telling the block layers about the hardware restriction. Eventually, this will allow us to phase out the splitting code, but not until the old IDE layer allows us to control the value it gives to blk_queue_segment_boundary(). Signed-off-by: Russell King --- drivers/ata/pata_icside.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c index 63121f45ba2..d7bc925c524 100644 --- a/drivers/ata/pata_icside.c +++ b/drivers/ata/pata_icside.c @@ -45,8 +45,6 @@ static const struct portinfo pata_icside_portinfo_v6_2 = { .stepping = 6, }; -#define PATA_ICSIDE_MAX_SG 128 - struct pata_icside_state { void __iomem *irq_port; void __iomem *ioc_base; @@ -295,8 +293,8 @@ static int icside_dma_init(struct pata_icside_info *info) static struct scsi_host_template pata_icside_sht = { ATA_BASE_SHT(DRV_NAME), - .sg_tablesize = PATA_ICSIDE_MAX_SG, - .dma_boundary = ~0, /* no dma boundaries */ + .sg_tablesize = SCSI_MAX_SG_CHAIN_SEGMENTS, + .dma_boundary = IOMD_DMA_BOUNDARY, }; static void pata_icside_postreset(struct ata_link *link, unsigned int *classes) -- cgit v1.2.3