From 80ee6f54f51ffc623843dd8955248d4fab064b99 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Fri, 23 Jan 2009 14:12:59 +0900 Subject: libata-sff: fix incorrect EH message The EH message for NODEV_HINT path was describing the opposite condition. Fix it. Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik --- drivers/ata/libata-sff.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/ata') diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c index 5a4aad123c4..0a8567c48d9 100644 --- a/drivers/ata/libata-sff.c +++ b/drivers/ata/libata-sff.c @@ -1322,7 +1322,7 @@ fsm_start: * condition. Mark hint. */ ata_ehi_push_desc(ehi, "ST-ATA: " - "DRQ=1 with device error, " + "DRQ=0 without device error, " "dev_stat 0x%X", status); qc->err_mask |= AC_ERR_HSM | AC_ERR_NODEV_HINT; -- cgit v1.2.3 From b919930c34e99a48d6b13a5ec9db8c059ec44d72 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Sun, 25 Jan 2009 10:26:00 +0900 Subject: libata: set NODEV_HINT for 0x7f status Asus Pundit-R with atiixp controller has the second port missing and, very unusually, its status is stuck at 0x7f and all others at 0. This meanst that it fails TF access test but gets detected as a disk due to classification code check and then evades polling IDENTIFY presence detection thanks to the missing BSY in the status value causing excessive delays during boot. This patch makes libata-sff HSM set NODEV_HINT if the status is 0x7f to make polling IDENTIFY presence detection work for these machines. Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik --- drivers/ata/libata-sff.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers/ata') diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c index 0a8567c48d9..0b299b0f817 100644 --- a/drivers/ata/libata-sff.c +++ b/drivers/ata/libata-sff.c @@ -1358,6 +1358,16 @@ fsm_start: qc->err_mask |= AC_ERR_HSM; } + /* There are oddball controllers with + * status register stuck at 0x7f and + * lbal/m/h at zero which makes it + * pass all other presence detection + * mechanisms we have. Set NODEV_HINT + * for it. Kernel bz#7241. + */ + if (status == 0x7f) + qc->err_mask |= AC_ERR_NODEV_HINT; + /* ata_pio_sectors() might change the * state to HSM_ST_LAST. so, the state * is changed after ata_pio_sectors(). -- cgit v1.2.3 From e8caa3c70e94d867ca2efe9e53fd388b52d6d0c8 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Sun, 25 Jan 2009 11:25:22 +0900 Subject: sata_nv: rename nv_nf2_hardreset() nv_nf2_hardreset() will be used by other flavors too. Rename it to nv_noclassify_hardreset(). Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik --- drivers/ata/sata_nv.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index 6f146061432..93bf5855a9b 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c @@ -305,10 +305,10 @@ static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance); static int nv_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); +static int nv_noclassify_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); static void nv_nf2_freeze(struct ata_port *ap); static void nv_nf2_thaw(struct ata_port *ap); -static int nv_nf2_hardreset(struct ata_link *link, unsigned int *class, - unsigned long deadline); static void nv_ck804_freeze(struct ata_port *ap); static void nv_ck804_thaw(struct ata_port *ap); static int nv_adma_slave_config(struct scsi_device *sdev); @@ -432,7 +432,7 @@ static struct ata_port_operations nv_nf2_ops = { .inherits = &nv_common_ops, .freeze = nv_nf2_freeze, .thaw = nv_nf2_thaw, - .hardreset = nv_nf2_hardreset, + .hardreset = nv_noclassify_hardreset, }; /* CK804 finally gets hardreset right */ @@ -1530,6 +1530,17 @@ static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) return 0; } +static int nv_noclassify_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline) +{ + bool online; + int rc; + + rc = sata_link_hardreset(link, sata_deb_timing_hotplug, deadline, + &online, NULL); + return online ? -EAGAIN : rc; +} + static void nv_nf2_freeze(struct ata_port *ap) { void __iomem *scr_addr = ap->host->ports[0]->ioaddr.scr_addr; @@ -1554,17 +1565,6 @@ static void nv_nf2_thaw(struct ata_port *ap) iowrite8(mask, scr_addr + NV_INT_ENABLE); } -static int nv_nf2_hardreset(struct ata_link *link, unsigned int *class, - unsigned long deadline) -{ - bool online; - int rc; - - rc = sata_link_hardreset(link, sata_deb_timing_hotplug, deadline, - &online, NULL); - return online ? -EAGAIN : rc; -} - static void nv_ck804_freeze(struct ata_port *ap) { void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; -- cgit v1.2.3 From 2d775708bc6613f1be47f1e720781343341ecc94 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Sun, 25 Jan 2009 11:29:38 +0900 Subject: sata_nv: fix MCP5x reset MCP5x family of controllers seem to share much more with nf2's as far as reset protocol is concerned. It requires heardreset to get the PHY going and classfication code report after hardreset is unreliable. Create a new board type MCP5x and use noclassify hardreset. SWNCQ is modified to inherit from this new type. This fixes hotplug regression reported in kernel bz#12351. Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik --- drivers/ata/sata_nv.c | 42 +++++++++++++++++++++++++++++------------- 1 file changed, 29 insertions(+), 13 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index 93bf5855a9b..c49ad0e61b6 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c @@ -352,6 +352,7 @@ enum nv_host_type NFORCE3 = NFORCE2, /* NF2 == NF3 as far as sata_nv is concerned */ CK804, ADMA, + MCP5x, SWNCQ, }; @@ -363,10 +364,10 @@ static const struct pci_device_id nv_pci_tbl[] = { { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2), CK804 }, { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA), CK804 }, { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2), CK804 }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA), SWNCQ }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2), SWNCQ }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA), SWNCQ }, - { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2), SWNCQ }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA), MCP5x }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2), MCP5x }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA), MCP5x }, + { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2), MCP5x }, { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA), GENERIC }, { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2), GENERIC }, { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3), GENERIC }, @@ -467,8 +468,19 @@ static struct ata_port_operations nv_adma_ops = { .host_stop = nv_adma_host_stop, }; +/* Kernel bz#12351 reports that when SWNCQ is enabled, for hotplug to + * work, hardreset should be used and hardreset can't report proper + * signature, which suggests that mcp5x is closer to nf2 as long as + * reset quirkiness is concerned. Define separate ops for mcp5x with + * nv_noclassify_hardreset(). + */ +static struct ata_port_operations nv_mcp5x_ops = { + .inherits = &nv_common_ops, + .hardreset = nv_noclassify_hardreset, +}; + static struct ata_port_operations nv_swncq_ops = { - .inherits = &nv_generic_ops, + .inherits = &nv_mcp5x_ops, .qc_defer = ata_std_qc_defer, .qc_prep = nv_swncq_qc_prep, @@ -531,6 +543,15 @@ static const struct ata_port_info nv_port_info[] = { .port_ops = &nv_adma_ops, .private_data = NV_PI_PRIV(nv_adma_interrupt, &nv_adma_sht), }, + /* MCP5x */ + { + .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, + .pio_mask = NV_PIO_MASK, + .mwdma_mask = NV_MWDMA_MASK, + .udma_mask = NV_UDMA_MASK, + .port_ops = &nv_mcp5x_ops, + .private_data = NV_PI_PRIV(nv_generic_interrupt, &nv_sht), + }, /* SWNCQ */ { .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | @@ -2355,14 +2376,9 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (type == CK804 && adma_enabled) { dev_printk(KERN_NOTICE, &pdev->dev, "Using ADMA mode\n"); type = ADMA; - } - - if (type == SWNCQ) { - if (swncq_enabled) - dev_printk(KERN_NOTICE, &pdev->dev, - "Using SWNCQ mode\n"); - else - type = GENERIC; + } else if (type == MCP5x && swncq_enabled) { + dev_printk(KERN_NOTICE, &pdev->dev, "Using SWNCQ mode\n"); + type = SWNCQ; } ppi[0] = &nv_port_info[type]; -- cgit v1.2.3 From b0bccb18bc523d1d5060d25958f12438062829a9 Mon Sep 17 00:00:00 2001 From: Mark Lord Date: Mon, 19 Jan 2009 18:04:37 -0500 Subject: sata_mv: fix 8-port timeouts on 508x/6081 chips Fix a longstanding bug for the 8-port Marvell Sata controllers (508x/6081), where accesses to the upper 4 ports would cause lost-interrupts / timeouts for the lower 4-ports. With this patch, the 6081 boards should finally be reliable enough for mainstream use with Linux. Signed-off-by: Mark Lord Signed-off-by: Jeff Garzik --- drivers/ata/sata_mv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/ata') diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 86918634a4c..ce9d6ad5a64 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -883,7 +883,7 @@ static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio, struct mv_host_priv *hpriv = ap->host->private_data; int hardport = mv_hardport_from_port(ap->port_no); void __iomem *hc_mmio = mv_hc_base_from_port( - mv_host_base(ap->host), hardport); + mv_host_base(ap->host), ap->port_no); u32 hc_irq_cause, ipending; /* clear EDMA event indicators, if any */ -- cgit v1.2.3 From cae6edc3b5a536119374a5439d9b253cb26f05e1 Mon Sep 17 00:00:00 2001 From: Mark Lord Date: Mon, 19 Jan 2009 18:05:42 -0500 Subject: sata_mv: don't read hc_irq_cause Remove silly read-modify-write sequences when clearing interrupts in hc_irq_cause. This gets rid of unneeded MMIO reads, resulting in a slight performance boost when switching between EDMA and non-EDMA modes (eg. for cache flushes). Signed-off-by: Mark Lord Signed-off-by: Jeff Garzik --- drivers/ata/sata_mv.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index ce9d6ad5a64..68096289074 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -35,8 +35,6 @@ * * --> Investigate problems with PCI Message Signalled Interrupts (MSI). * - * --> Cache frequently-accessed registers in mv_port_priv to reduce overhead. - * * --> Develop a low-power-consumption strategy, and implement it. * * --> [Experiment, low priority] Investigate interrupt coalescing. @@ -884,18 +882,14 @@ static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio, int hardport = mv_hardport_from_port(ap->port_no); void __iomem *hc_mmio = mv_hc_base_from_port( mv_host_base(ap->host), ap->port_no); - u32 hc_irq_cause, ipending; + u32 hc_irq_cause; /* clear EDMA event indicators, if any */ writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); - /* clear EDMA interrupt indicator, if any */ - hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS); - ipending = (DEV_IRQ | DMA_IRQ) << hardport; - if (hc_irq_cause & ipending) { - writelfl(hc_irq_cause & ~ipending, - hc_mmio + HC_IRQ_CAUSE_OFS); - } + /* clear pending irq events */ + hc_irq_cause = ~((DEV_IRQ | DMA_IRQ) << hardport); + writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS); mv_edma_cfg(ap, want_ncq); @@ -2821,8 +2815,7 @@ static void mv_eh_thaw(struct ata_port *ap) writel(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); /* clear pending irq events */ - hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS); - hc_irq_cause &= ~((DEV_IRQ | DMA_IRQ) << hardport); + hc_irq_cause = ~((DEV_IRQ | DMA_IRQ) << hardport); writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS); mv_enable_port_irqs(ap, ERR_IRQ); -- cgit v1.2.3 From cd12e1f7a2c28917c89d65c0d4a52d3919b4c125 Mon Sep 17 00:00:00 2001 From: Mark Lord Date: Mon, 19 Jan 2009 18:06:28 -0500 Subject: sata_mv: remove bogus nsect restriction Remove unneeded nsect restriction from GenII NCQ path, and improve comments to explain why this is not a problem. Signed-off-by: Mark Lord Signed-off-by: Jeff Garzik --- drivers/ata/sata_mv.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 68096289074..874b60b2e20 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -349,8 +349,6 @@ enum { EDMA_HALTCOND_OFS = 0x60, /* GenIIe halt conditions */ - GEN_II_NCQ_MAX_SECTORS = 256, /* max sects/io on Gen2 w/NCQ */ - /* Host private flags (hp_flags) */ MV_HP_FLAG_MSI = (1 << 0), MV_HP_ERRATA_50XXB0 = (1 << 1), @@ -1093,20 +1091,12 @@ static void mv6_dev_config(struct ata_device *adev) * * Gen-II does not support NCQ over a port multiplier * (no FIS-based switching). - * - * We don't have hob_nsect when doing NCQ commands on Gen-II. - * See mv_qc_prep() for more info. */ if (adev->flags & ATA_DFLAG_NCQ) { if (sata_pmp_attached(adev->link->ap)) { adev->flags &= ~ATA_DFLAG_NCQ; ata_dev_printk(adev, KERN_INFO, "NCQ disabled for command-based switching\n"); - } else if (adev->max_sectors > GEN_II_NCQ_MAX_SECTORS) { - adev->max_sectors = GEN_II_NCQ_MAX_SECTORS; - ata_dev_printk(adev, KERN_INFO, - "max_sectors limited to %u for NCQ\n", - adev->max_sectors); } } } @@ -1444,7 +1434,8 @@ static void mv_qc_prep(struct ata_queued_cmd *qc) * only 11 bytes...so we must pick and choose required * registers based on the command. So, we drop feature and * hob_feature for [RW] DMA commands, but they are needed for - * NCQ. NCQ will drop hob_nsect. + * NCQ. NCQ will drop hob_nsect, which is not needed there + * (nsect is used only for the tag; feat/hob_feat hold true nsect). */ switch (tf->command) { case ATA_CMD_READ: -- cgit v1.2.3 From 5d0fb2e730e2085021cf5c8b6d14983e92aea75b Mon Sep 17 00:00:00 2001 From: Thomas Reitmayr Date: Sat, 24 Jan 2009 20:24:58 +0100 Subject: sata_mv: Properly initialize main irq mask I noticed that during initialization sata_mv.c assumes that the main interrupt mask has its default value of 0. The function mv_platform_probe(..) initializes a shadow irq mask with 0 assuming that's the value of the controller's register. Now mv_set_main_irq_mask(..) only writes the controller's register if the new value differs from the "shadowed" value. This is fatal when trying to disable all interrupts in mv_init_host(..), i.e. the following function call does not write anything to the main irq mask register: mv_set_main_irq_mask(host, ~0, 0); The effect I see on my machine (QNAP TS-109 II) with booting via kexec (with Linux as a 2nd-stage boot loader) is that if the sata_mv module was still loaded when performing kexec, then the new kernel's sata_mv module starts up with interrupts enabled. This results in an unhandled IRQ and breaks the boot process. The unhandled interrupt itself might also be fixed by Lennert's patch proposed at http://markmail.org/message/kwvzxstnlsa3s26w which I did not try yet. However I still propose to additionally initialize the shadow variable with the current contents of the main irq mask register to get both in sync and allow proper disabling the main irq mask. This fixes the unhandled irq on my machine. Signed-off-by: Thomas Reitmayr Signed-off-by: Mark Lord Signed-off-by: Jeff Garzik --- drivers/ata/sata_mv.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/ata') diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 874b60b2e20..9e9fb959478 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -3059,6 +3059,9 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx) hpriv->main_irq_mask_addr = mmio + PCI_HC_MAIN_IRQ_MASK_OFS; } + /* initialize shadow irq mask with register's value */ + hpriv->main_irq_mask = readl(hpriv->main_irq_mask_addr); + /* global interrupt mask: 0 == mask everything */ mv_set_main_irq_mask(host, ~0, 0); -- cgit v1.2.3 From 6d3c30efc964fadf2e6270e6fceaeca3ce50027a Mon Sep 17 00:00:00 2001 From: Mark Lord Date: Wed, 21 Jan 2009 10:31:29 -0500 Subject: sata_mv: msi masking fix (v2) Enable reliable use of Message-Signaled Interrupts (MSI) in sata_mv by masking further chip interrupts within the main interrupt handler. Based upon a suggestion by Grant Grundler. MSI is working reliably in all of my test systems here now. Signed-off-by: Mark Lord Reviewed-by: Grant Grundler Signed-off-by: Jeff Garzik --- drivers/ata/sata_mv.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 9e9fb959478..f2d8a020ea5 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -33,8 +33,6 @@ * * --> ATAPI support (Marvell claims the 60xx/70xx chips can do it). * - * --> Investigate problems with PCI Message Signalled Interrupts (MSI). - * * --> Develop a low-power-consumption strategy, and implement it. * * --> [Experiment, low priority] Investigate interrupt coalescing. @@ -70,7 +68,7 @@ #include #define DRV_NAME "sata_mv" -#define DRV_VERSION "1.24" +#define DRV_VERSION "1.25" enum { /* BAR's are enumerated in terms of pci_resource_start() terms */ @@ -2199,9 +2197,15 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance) struct ata_host *host = dev_instance; struct mv_host_priv *hpriv = host->private_data; unsigned int handled = 0; + int using_msi = hpriv->hp_flags & MV_HP_FLAG_MSI; u32 main_irq_cause, pending_irqs; spin_lock(&host->lock); + + /* for MSI: block new interrupts while in here */ + if (using_msi) + writel(0, hpriv->main_irq_mask_addr); + main_irq_cause = readl(hpriv->main_irq_cause_addr); pending_irqs = main_irq_cause & hpriv->main_irq_mask; /* @@ -2215,6 +2219,11 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance) handled = mv_host_intr(host, pending_irqs); } spin_unlock(&host->lock); + + /* for MSI: unmask; interrupt cause bits will retrigger now */ + if (using_msi) + writel(hpriv->main_irq_mask, hpriv->main_irq_mask_addr); + return IRQ_RETVAL(handled); } @@ -3417,9 +3426,9 @@ static int mv_pci_init_one(struct pci_dev *pdev, if (rc) return rc; - /* Enable interrupts */ - if (msi && pci_enable_msi(pdev)) - pci_intx(pdev, 1); + /* Enable message-switched interrupts, if requested */ + if (msi && pci_enable_msi(pdev) == 0) + hpriv->hp_flags |= MV_HP_FLAG_MSI; mv_dump_pci_cfg(pdev, 0x68); mv_print_info(host); -- cgit v1.2.3 From f9228c7ffaaa37521c46239ccea623f10fa44a27 Mon Sep 17 00:00:00 2001 From: Mark Lord Date: Wed, 21 Jan 2009 10:34:17 -0500 Subject: sata_mv: no longer experimental (v2) Update Kconfig for sata_mv with full list of chips supported, and (finally!) remove the "EXPERIMENTAL" designations. Signed-off-by: Mark Lord Signed-off-by: Jeff Garzik --- drivers/ata/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 503a908afc8..0bcf2646467 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -112,11 +112,11 @@ config ATA_PIIX If unsure, say N. config SATA_MV - tristate "Marvell SATA support (HIGHLY EXPERIMENTAL)" - depends on EXPERIMENTAL + tristate "Marvell SATA support" help This option enables support for the Marvell Serial ATA family. - Currently supports 88SX[56]0[48][01] chips. + Currently supports 88SX[56]0[48][01] PCI(-X) chips, + as well as the newer [67]042 PCI-X/PCIe and SOC devices. If unsure, say N. -- cgit v1.2.3 From e4d866cdea24543ee16ce6d07d80c513e86ba983 Mon Sep 17 00:00:00 2001 From: "JosephChan@via.com.tw" Date: Fri, 23 Jan 2009 15:37:39 +0800 Subject: [libata] pata_via: support VX855, future chips whose IDE controller use 0x0571 It supports VX855 and future chips whose IDE controller uses PCI ID 0x0571. Signed-off-by: Joseph Chan Acked-by: Tejun Heo Signed-off-by: Jeff Garzik --- drivers/ata/pata_via.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c index 681169c9c64..79a6c9a0b72 100644 --- a/drivers/ata/pata_via.c +++ b/drivers/ata/pata_via.c @@ -86,6 +86,10 @@ enum { VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */ }; +enum { + VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller) */ +}; + /* * VIA SouthBridge chips. */ @@ -97,8 +101,12 @@ static const struct via_isa_bridge { u8 rev_max; u16 flags; } via_isa_bridges[] = { + { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, + VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, + { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, + VIA_UDMA_133 | VIA_BAD_AST }, { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, @@ -122,6 +130,8 @@ static const struct via_isa_bridge { { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK }, { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, + { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, + VIA_UDMA_133 | VIA_BAD_AST }, { NULL } }; @@ -460,6 +470,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) static int printed_version; u8 enable; u32 timing; + unsigned long flags = id->driver_data; int rc; if (!printed_version++) @@ -469,9 +480,13 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) if (rc) return rc; + if (flags & VIA_IDFLAG_SINGLE) + ppi[1] = &ata_dummy_port_info; + /* To find out how the IDE will behave and what features we actually have to look at the bridge not the IDE controller */ - for (config = via_isa_bridges; config->id; config++) + for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON; + config++) if ((isa = pci_get_device(PCI_VENDOR_ID_VIA + !!(config->flags & VIA_BAD_ID), config->id, NULL))) { @@ -482,10 +497,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) pci_dev_put(isa); } - if (!config->id) { - printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n"); - return -ENODEV; - } pci_dev_put(isa); if (!(config->flags & VIA_NO_ENABLES)) { @@ -587,6 +598,7 @@ static const struct pci_device_id via[] = { { PCI_VDEVICE(VIA, 0x1571), }, { PCI_VDEVICE(VIA, 0x3164), }, { PCI_VDEVICE(VIA, 0x5324), }, + { PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE }, { }, }; -- cgit v1.2.3 From b98f5046397b9f4c5060e5b73e483bfd9e453dd6 Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Tue, 20 Jan 2009 17:40:56 +0100 Subject: pata-rb532-cf: remove set_irq_type from finish_io The driver has been tested without the call to set_irq_type at this point and occurs to work fine, so it should be safe to remove it. Signed-off-by: Phil Sutter Signed-off-by: Jeff Garzik --- drivers/ata/pata_rb532_cf.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/ata') diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c index c2e6fb9f2ef..ebfcda26d63 100644 --- a/drivers/ata/pata_rb532_cf.c +++ b/drivers/ata/pata_rb532_cf.c @@ -63,8 +63,6 @@ static inline void rb532_pata_finish_io(struct ata_port *ap) ata_sff_sync might be sufficient. */ ata_sff_dma_pause(ap); ndelay(RB500_CF_IO_DELAY); - - set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH); } static void rb532_pata_exec_command(struct ata_port *ap, -- cgit v1.2.3