From 4e953a216265f8646360fa909bdc87ea4bf446b3 Mon Sep 17 00:00:00 2001 From: Jeff Garzik Date: Thu, 27 Sep 2007 07:41:50 -0400 Subject: drivers/block/umem: trim trailing whitespace Signed-off-by: Jeff Garzik --- drivers/block/umem.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'drivers/block/umem.h') diff --git a/drivers/block/umem.h b/drivers/block/umem.h index 3a3819afed9..375c68974c9 100644 --- a/drivers/block/umem.h +++ b/drivers/block/umem.h @@ -87,13 +87,13 @@ #define DMASCR_DMA_COMPLETE 0x40000 #define DMASCR_CHAIN_COMPLETE 0x80000 -/* -3.SOME PCs HAVE HOST BRIDGES WHICH APPARENTLY DO NOT CORRECTLY HANDLE -READ-LINE (0xE) OR READ-MULTIPLE (0xC) PCI COMMAND CODES DURING DMA -TRANSFERS. IN OTHER SYSTEMS THESE COMMAND CODES WILL CAUSE THE HOST BRIDGE -TO ALLOW LONGER BURSTS DURING DMA READ OPERATIONS. THE UPPER FOUR BITS -(31..28) OF THE DMA CSR HAVE BEEN MADE PROGRAMMABLE, SO THAT EITHER A 0x6, -AN 0xE OR A 0xC CAN BE WRITTEN TO THEM TO SET THE COMMAND CODE USED DURING +/* +3.SOME PCs HAVE HOST BRIDGES WHICH APPARENTLY DO NOT CORRECTLY HANDLE +READ-LINE (0xE) OR READ-MULTIPLE (0xC) PCI COMMAND CODES DURING DMA +TRANSFERS. IN OTHER SYSTEMS THESE COMMAND CODES WILL CAUSE THE HOST BRIDGE +TO ALLOW LONGER BURSTS DURING DMA READ OPERATIONS. THE UPPER FOUR BITS +(31..28) OF THE DMA CSR HAVE BEEN MADE PROGRAMMABLE, SO THAT EITHER A 0x6, +AN 0xE OR A 0xC CAN BE WRITTEN TO THEM TO SET THE COMMAND CODE USED DURING DMA READ OPERATIONS. */ #define DMASCR_READ 0x60000000 -- cgit v1.2.3