From a345c7856e52bf8b21a5ae6a24fb824bfedefbe9 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Mon, 18 Jan 2010 07:21:19 +0000 Subject: alim15x3: fix handling of DMA timings Stop depending on the BIOS setup. Based on libata pata_ali host driver. Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: David S. Miller --- drivers/ide/alim15x3.c | 55 +++++++++++++++++++++++++++++++++++--------------- 1 file changed, 39 insertions(+), 16 deletions(-) (limited to 'drivers/ide') diff --git a/drivers/ide/alim15x3.c b/drivers/ide/alim15x3.c index 529f8e2218a..3ba7d0bdd25 100644 --- a/drivers/ide/alim15x3.c +++ b/drivers/ide/alim15x3.c @@ -61,6 +61,25 @@ static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on) pci_write_config_byte(pdev, pio_fifo, fifo); } +static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive, + struct ide_timing *t) +{ + struct pci_dev *dev = to_pci_dev(hwif->dev); + int port = hwif->channel ? 0x5c : 0x58; + u8 unit = drive->dn & 1; + + t->setup = clamp_val(t->setup, 1, 8) & 7; + t->act8b = clamp_val(t->act8b, 1, 8) & 7; + t->rec8b = clamp_val(t->rec8b, 1, 16) & 15; + t->active = clamp_val(t->active, 1, 8) & 7; + t->recover = clamp_val(t->recover, 1, 16) & 15; + + pci_write_config_byte(dev, port, t->setup); + pci_write_config_byte(dev, port + 1, (t->act8b << 4) | t->rec8b); + pci_write_config_byte(dev, port + unit + 2, + (t->active << 4) | t->recover); +} + /** * ali_set_pio_mode - set host controller for PIO mode * @hwif: port @@ -71,12 +90,9 @@ static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on) static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) { - struct pci_dev *dev = to_pci_dev(hwif->dev); ide_drive_t *pair = ide_get_pair_dev(drive); int bus_speed = ide_pci_clk ? ide_pci_clk : 33; unsigned long T = 1000000 / bus_speed; /* PCI clock based */ - int port = hwif->channel ? 0x5c : 0x58; - u8 unit = drive->dn & 1; struct ide_timing t; ide_timing_compute(drive, drive->pio_mode, &t, T, 1); @@ -93,21 +109,12 @@ static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) } } - t.setup = clamp_val(t.setup, 1, 8) & 7; - t.act8b = clamp_val(t.act8b, 1, 8) & 7; - t.rec8b = clamp_val(t.rec8b, 1, 16) & 15; - t.active = clamp_val(t.active, 1, 8) & 7; - t.recover = clamp_val(t.recover, 1, 16) & 15; - /* * PIO mode => ATA FIFO on, ATAPI FIFO off */ ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00); - pci_write_config_byte(dev, port, t.setup); - pci_write_config_byte(dev, port + 1, (t.act8b << 4) | t.rec8b); - pci_write_config_byte(dev, port + unit + 2, - (t.active << 4) | t.recover); + ali_program_timings(hwif, drive, &t); } /** @@ -146,11 +153,15 @@ static u8 ali_udma_filter(ide_drive_t *drive) static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) { struct pci_dev *dev = to_pci_dev(hwif->dev); + ide_drive_t *pair = ide_get_pair_dev(drive); + int bus_speed = ide_pci_clk ? ide_pci_clk : 33; + unsigned long T = 1000000 / bus_speed; /* PCI clock based */ const u8 speed = drive->dma_mode; u8 speed1 = speed; u8 unit = drive->dn & 1; u8 tmpbyte = 0x00; int m5229_udma = (hwif->channel) ? 0x57 : 0x56; + struct ide_timing t; if (speed == XFER_UDMA_6) speed1 = 0x47; @@ -164,9 +175,21 @@ static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) tmpbyte &= ultra_enable; pci_write_config_byte(dev, m5229_udma, tmpbyte); - /* - * FIXME: Oh, my... DMA timings are never set. - */ + ide_timing_compute(drive, drive->dma_mode, &t, T, 1); + if (pair) { + struct ide_timing p; + + ide_timing_compute(pair, pair->pio_mode, &p, T, 1); + ide_timing_merge(&p, &t, &t, + IDE_TIMING_SETUP | IDE_TIMING_8BIT); + if (pair->dma_mode) { + ide_timing_compute(pair, pair->dma_mode, + &p, T, 1); + ide_timing_merge(&p, &t, &t, + IDE_TIMING_SETUP | IDE_TIMING_8BIT); + } + } + ali_program_timings(hwif, drive, &t); } else { pci_read_config_byte(dev, m5229_udma, &tmpbyte); tmpbyte &= (0x0f << ((1-unit) << 2)); -- cgit v1.2.3