From 2726d6e126c0c16efeba30356d4ae105f1854d1e Mon Sep 17 00:00:00 2001 From: Michael Chan Date: Tue, 29 Jan 2008 21:35:05 -0800 Subject: [BNX2]: Remove REG_WR_IND/REG_RD_IND macros. The REG_WR_IND/REG_RD_IND macros are unnecessary and obfuscate the code. Many callers to these macros read and write shared memory from the bp->shmem_base, so we add 2 similar functions that automatically add the shared memory base. Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- drivers/net/bnx2.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'drivers/net/bnx2.h') diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 7a1eff44505..fb3c019c3a4 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h @@ -6805,9 +6805,6 @@ struct bnx2 { int irq_nvecs; }; -static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset); -static void bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val); - #define REG_RD(bp, offset) \ readl(bp->regview + offset) @@ -6817,12 +6814,6 @@ static void bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val); #define REG_WR16(bp, offset, val) \ writew(val, bp->regview + offset) -#define REG_RD_IND(bp, offset) \ - bnx2_reg_rd_ind(bp, offset) - -#define REG_WR_IND(bp, offset, val) \ - bnx2_reg_wr_ind(bp, offset, val) - /* Indirect context access. Unlike the MBQ_WR, these macros will not * trigger a chip event. */ static void bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val); -- cgit v1.2.3