From 45bada65c2a0bcc00729646071e66042ced64998 Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Mon, 27 Jun 2005 11:33:12 -0700 Subject: [PATCH] skge: make Genesis/Broadcom code work Rewrite the code for handling the Broadcom PHY to something that works. Remove link polling because Broadcom and Yukon don't need it. When I wrote initial code, didn't have a genesis chipset based board to test, so it was a non-working guess. Signed-off-by: Stephen Hemminger --- drivers/net/skge.h | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) (limited to 'drivers/net/skge.h') diff --git a/drivers/net/skge.h b/drivers/net/skge.h index 6f3a4b56a67..6b9a2ebbab2 100644 --- a/drivers/net/skge.h +++ b/drivers/net/skge.h @@ -1225,6 +1225,16 @@ enum { PHY_B_PES_MLT3_ER = 1<<0, /* Bit 0: MLT3 code Error */ }; +/* PHY_BCOM_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/ +/* PHY_BCOM_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/ +enum { + PHY_B_AN_RF = 1<<13, /* Bit 13: Remote Fault */ + + PHY_B_AN_ASP = 1<<11, /* Bit 11: Asymmetric Pause */ + PHY_B_AN_PC = 1<<10, /* Bit 10: Pause Capable */ +}; + + /***** PHY_BCOM_FC_CTR 16 bit r/w False Carrier Counter *****/ enum { PHY_B_FC_CTR = 0xff, /* Bit 7..0: False Carrier Counter */ @@ -1285,7 +1295,9 @@ enum { PHY_B_IS_LST_CHANGE = 1<<1, /* Bit 1: Link Status Changed */ PHY_B_IS_CRC_ER = 1<<0, /* Bit 0: CRC Error */ }; -#define PHY_B_DEF_MSK (~(PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE)) +#define PHY_B_DEF_MSK \ + (~(PHY_B_IS_PSE | PHY_B_IS_AN_PR | PHY_B_IS_DUP_CHANGE | \ + PHY_B_IS_LSP_CHANGE | PHY_B_IS_LST_CHANGE)) /* Pause Bits (PHY_B_AN_ASP and PHY_B_AN_PC) encoding */ enum { @@ -2489,7 +2501,6 @@ struct skge_port { dma_addr_t dma; unsigned long mem_size; - struct timer_list link_check; struct timer_list led_blink; }; -- cgit v1.2.3