From acd70c2bfddb52aee27a4864c160bea7f0d117e1 Mon Sep 17 00:00:00 2001 From: Jesse Huang Date: Fri, 20 Oct 2006 14:42:13 -0700 Subject: [PATCH] sundance: correct initial and close hardware step. Correct initial and close hardware step. In some embedded system down and up IP100A will cause DMA crash. We add some for safe down and up IP100A. Signed-off-by: Jesse Huang Signed-off-by: Andrew Morton Signed-off-by: Jeff Garzik --- drivers/net/sundance.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/net/sundance.c') diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c index 91cd2f52e62..fba64d39ba1 100644 --- a/drivers/net/sundance.c +++ b/drivers/net/sundance.c @@ -788,6 +788,7 @@ static int netdev_open(struct net_device *dev) { struct netdev_private *np = netdev_priv(dev); void __iomem *ioaddr = np->base; + unsigned long flags; int i; /* Do we need to reset the chip??? */ @@ -832,6 +833,10 @@ static int netdev_open(struct net_device *dev) iowrite8(0x01, ioaddr + DebugCtrl1); netif_start_queue(dev); + spin_lock_irqsave(&np->lock, flags); + reset_tx(dev); + spin_unlock_irqrestore(&np->lock, flags); + iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1); if (netif_msg_ifup(np)) @@ -1651,6 +1656,9 @@ static int netdev_close(struct net_device *dev) /* Disable interrupts by clearing the interrupt mask. */ iowrite16(0x0000, ioaddr + IntrEnable); + /* Disable Rx and Tx DMA for safely release resource */ + iowrite32(0x500, ioaddr + DMACtrl); + /* Stop the chip's Tx and Rx processes. */ iowrite16(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1); -- cgit v1.2.3