From 51d9861e9e09c5c0066e5e5d9bb0009be1957899 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 15 Oct 2008 11:10:00 -0600 Subject: powerpc/mpc5200: Refactor FEC mdio read/write routines Read & write functions now call a generic transfer function, so identical code in both routines could be eliminated. The result is easier to maintain and smaller in source and binary code. Also, fix some checkpatch warnings. Signed-off-by: Wolfram Sang Signed-off-by: Grant Likely --- drivers/net/fec_mpc52xx_phy.c | 55 +++++++++++++++++-------------------------- 1 file changed, 22 insertions(+), 33 deletions(-) (limited to 'drivers/net') diff --git a/drivers/net/fec_mpc52xx_phy.c b/drivers/net/fec_mpc52xx_phy.c index 08e18bcb970..45dd9bdc5d6 100644 --- a/drivers/net/fec_mpc52xx_phy.c +++ b/drivers/net/fec_mpc52xx_phy.c @@ -2,6 +2,7 @@ * Driver for the MPC5200 Fast Ethernet Controller - MDIO bus driver * * Copyright (C) 2007 Domen Puncer, Telargo, Inc. + * Copyright (C) 2008 Wolfram Sang, Pengutronix * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any @@ -21,58 +22,45 @@ struct mpc52xx_fec_mdio_priv { struct mpc52xx_fec __iomem *regs; }; -static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg) +static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id, + int reg, u32 value) { struct mpc52xx_fec_mdio_priv *priv = bus->priv; struct mpc52xx_fec __iomem *fec; int tries = 100; - u32 request = FEC_MII_READ_FRAME; + + value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; + value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; fec = priv->regs; out_be32(&fec->ievent, FEC_IEVENT_MII); - - request |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; - request |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; - - out_be32(&priv->regs->mii_data, request); + out_be32(&priv->regs->mii_data, value); /* wait for it to finish, this takes about 23 us on lite5200b */ while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) udelay(5); - if (tries == 0) + if (!tries) return -ETIMEDOUT; - return in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK; + return value & FEC_MII_DATA_OP_RD ? + in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK : 0; } -static int mpc52xx_fec_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 data) +static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg) { - struct mpc52xx_fec_mdio_priv *priv = bus->priv; - struct mpc52xx_fec __iomem *fec; - u32 value = data; - int tries = 100; - - fec = priv->regs; - out_be32(&fec->ievent, FEC_IEVENT_MII); - - value |= FEC_MII_WRITE_FRAME; - value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; - value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; - - out_be32(&priv->regs->mii_data, value); - - /* wait for request to finish */ - while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) - udelay(5); - - if (tries == 0) - return -ETIMEDOUT; + return mpc52xx_fec_mdio_transfer(bus, phy_id, reg, FEC_MII_READ_FRAME); +} - return 0; +static int mpc52xx_fec_mdio_write(struct mii_bus *bus, int phy_id, int reg, + u16 data) +{ + return mpc52xx_fec_mdio_transfer(bus, phy_id, reg, + data | FEC_MII_WRITE_FRAME); } -static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_id *match) +static int mpc52xx_fec_mdio_probe(struct of_device *of, + const struct of_device_id *match) { struct device *dev = &of->dev; struct device_node *np = of->node; @@ -131,7 +119,8 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_i dev_set_drvdata(dev, bus); /* set MII speed */ - out_be32(&priv->regs->mii_speed, ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1); + out_be32(&priv->regs->mii_speed, + ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1); /* enable MII interrupt */ out_be32(&priv->regs->imask, in_be32(&priv->regs->imask) | FEC_IMASK_MII); -- cgit v1.2.3 From 1ff0fcfcb1a6d0a4c4d065ed230be7beae087b83 Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Thu, 16 Oct 2008 04:38:40 +0000 Subject: ibm_newemac: Fix new MAL feature handling Support for new features needed by the PPC 405EZ boards introduced some errors in the MAL and EMAC feature handling. This broke 'allmodconfig' builds as CONFIG_PPC_DCR_NATIVE is not set for those. This patch fixes these errors by wrapping the code in the appropriate #ifdefs. Acked-by: Benjamin Herrenschmidt Signed-off-by: Josh Boyer --- drivers/net/ibm_newemac/core.c | 10 +++++++++- drivers/net/ibm_newemac/mal.c | 15 ++++++++++++++- 2 files changed, 23 insertions(+), 2 deletions(-) (limited to 'drivers/net') diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c index efcf21c9f5c..2ee2622258f 100644 --- a/drivers/net/ibm_newemac/core.c +++ b/drivers/net/ibm_newemac/core.c @@ -2604,8 +2604,16 @@ static int __devinit emac_init_config(struct emac_instance *dev) if (of_device_is_compatible(np, "ibm,emac-440ep") || of_device_is_compatible(np, "ibm,emac-440gr")) dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX; - if (of_device_is_compatible(np, "ibm,emac-405ez")) + if (of_device_is_compatible(np, "ibm,emac-405ez")) { +#ifdef CONFIG_IBM_NEW_EMAC_NO_FLOW_CONTROL dev->features |= EMAC_FTR_NO_FLOW_CONTROL_40x; +#else + printk(KERN_ERR "%s: Flow control not disabled!\n", + np->full_name); + return -ENXIO; +#endif + } + } /* Fixup some feature bits based on the device tree */ diff --git a/drivers/net/ibm_newemac/mal.c b/drivers/net/ibm_newemac/mal.c index 1839d3f154a..ecf9798987f 100644 --- a/drivers/net/ibm_newemac/mal.c +++ b/drivers/net/ibm_newemac/mal.c @@ -280,9 +280,11 @@ static irqreturn_t mal_txeob(int irq, void *dev_instance) mal_schedule_poll(mal); set_mal_dcrn(mal, MAL_TXEOBISR, r); +#ifdef CONFIG_PPC_DCR_NATIVE if (mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT)) mtdcri(SDR0, DCRN_SDR_ICINTSTAT, (mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICTX)); +#endif return IRQ_HANDLED; } @@ -298,9 +300,11 @@ static irqreturn_t mal_rxeob(int irq, void *dev_instance) mal_schedule_poll(mal); set_mal_dcrn(mal, MAL_RXEOBISR, r); +#ifdef CONFIG_PPC_DCR_NATIVE if (mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT)) mtdcri(SDR0, DCRN_SDR_ICINTSTAT, (mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICRX)); +#endif return IRQ_HANDLED; } @@ -572,9 +576,18 @@ static int __devinit mal_probe(struct of_device *ofdev, goto fail; } - if (of_device_is_compatible(ofdev->node, "ibm,mcmal-405ez")) + if (of_device_is_compatible(ofdev->node, "ibm,mcmal-405ez")) { +#if defined(CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT) && \ + defined(CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR) mal->features |= (MAL_FTR_CLEAR_ICINTSTAT | MAL_FTR_COMMON_ERR_INT); +#else + printk(KERN_ERR "%s: Support for 405EZ not enabled!\n", + ofdev->node->full_name); + err = -ENODEV; + goto fail; +#endif + } mal->txeob_irq = irq_of_parse_and_map(ofdev->node, 0); mal->rxeob_irq = irq_of_parse_and_map(ofdev->node, 1); -- cgit v1.2.3