From 1a0ed732afdbd4b960a4b93f78fddc71b8076e61 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Fri, 1 Dec 2006 09:04:47 +0100 Subject: [ARM] 3949/2: AT91: SAM9 timer driver Add support for the timer on the Atmel AT91SAM9261 and AT91SAM9260 processors. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91rm9200/at91_pit.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 include/asm-arm/arch-at91rm9200/at91_pit.h (limited to 'include/asm-arm/arch-at91rm9200') diff --git a/include/asm-arm/arch-at91rm9200/at91_pit.h b/include/asm-arm/arch-at91rm9200/at91_pit.h new file mode 100644 index 00000000000..4a30d009c58 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_pit.h @@ -0,0 +1,29 @@ +/* + * include/asm-arm/arch-at91rm9200/at91_pit.h + * + * Periodic Interval Timer (PIT) - System peripherals regsters. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_PIT_H +#define AT91_PIT_H + +#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ +#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ +#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ +#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ + +#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ +#define AT91_PIT_PITS (1 << 0) /* Timer Status */ + +#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ +#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ +#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ +#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ + +#endif -- cgit v1.2.3