From c680b77efe4542830bb170e1cc40db1c47c569bc Mon Sep 17 00:00:00 2001
From: Lennert Buytenhek <buytenh@wantstofly.org>
Date: Mon, 18 Sep 2006 23:24:52 +0100
Subject: [ARM] 3830/1: iop3xx: board support file cleanup

Revamp the iop3xx board support: move the support code for each iop
board type into its own file, start using platform serial and platform
physmap flash devices, switch to a per-board time tick rate, and get
rid of the ARCH_EP80219 and STEPD config options by doing the relevant
checks at run time.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
 include/asm-arm/arch-iop32x/iop321.h  | 12 -----------
 include/asm-arm/arch-iop32x/iq31244.h |  7 -------
 include/asm-arm/arch-iop32x/iq80321.h |  7 -------
 include/asm-arm/arch-iop32x/irqs.h    | 38 -----------------------------------
 4 files changed, 64 deletions(-)

(limited to 'include/asm-arm/arch-iop32x')

diff --git a/include/asm-arm/arch-iop32x/iop321.h b/include/asm-arm/arch-iop32x/iop321.h
index 1e57e009476..8042946327e 100644
--- a/include/asm-arm/arch-iop32x/iop321.h
+++ b/include/asm-arm/arch-iop32x/iop321.h
@@ -150,18 +150,6 @@
 #define IOP321_IINTSRC    (volatile u32 *)IOP321_REG_ADDR(0x000007D8)
 #define IOP321_FINTSRC    (volatile u32 *)IOP321_REG_ADDR(0x000007DC)
 
-/* Timers */
-#ifdef CONFIG_ARCH_IQ80321
-#define	IOP321_TICK_RATE	200000000	/* 200 MHz clock */
-#elif defined(CONFIG_ARCH_IQ31244)
-#define IOP321_TICK_RATE	198000000	/* 33.000 MHz crystal */
-#endif
-
-#ifdef CONFIG_ARCH_EP80219
-#undef IOP321_TICK_RATE
-#define IOP321_TICK_RATE 200000000 /* 33.333333 Mhz crystal */
-#endif
-
 /* Application accelerator unit 0x00000800 - 0x000008FF */
 #define IOP321_AAU_ACR     (volatile u32 *)IOP321_REG_ADDR(0x00000800)
 #define IOP321_AAU_ASR     (volatile u32 *)IOP321_REG_ADDR(0x00000804)
diff --git a/include/asm-arm/arch-iop32x/iq31244.h b/include/asm-arm/arch-iop32x/iq31244.h
index f490063d215..cf2d2343398 100644
--- a/include/asm-arm/arch-iop32x/iq31244.h
+++ b/include/asm-arm/arch-iop32x/iq31244.h
@@ -7,18 +7,11 @@
 #ifndef _IQ31244_H_
 #define _IQ31244_H_
 
-#define	IQ31244_FLASHBASE	0xf0000000	/* Flash */
-#define	IQ31244_FLASHSIZE	0x00800000
-#define	IQ31244_FLASHWIDTH	2
-
 #define IQ31244_UART		0xfe800000	/* UART #1 */
 #define IQ31244_7SEG_1		0xfe840000	/* 7-Segment MSB */
 #define IQ31244_7SEG_0		0xfe850000	/* 7-Segment LSB (WO) */
 #define IQ31244_ROTARY_SW	0xfe8d0000	/* Rotary Switch */
 #define IQ31244_BATT_STAT	0xfe8f0000	/* Battery Status */
 
-#ifndef __ASSEMBLY__
-extern void iq31244_map_io(void);
-#endif
 
 #endif	// _IQ31244_H_
diff --git a/include/asm-arm/arch-iop32x/iq80321.h b/include/asm-arm/arch-iop32x/iq80321.h
index 7015a605ab6..55d70f49b7f 100644
--- a/include/asm-arm/arch-iop32x/iq80321.h
+++ b/include/asm-arm/arch-iop32x/iq80321.h
@@ -7,18 +7,11 @@
 #ifndef _IQ80321_H_
 #define _IQ80321_H_
 
-#define	IQ80321_FLASHBASE	0xf0000000	/* Flash */
-#define	IQ80321_FLASHSIZE	0x00800000
-#define	IQ80321_FLASHWIDTH	1
-
 #define IQ80321_UART		0xfe800000	/* UART #1 */
 #define IQ80321_7SEG_1		0xfe840000	/* 7-Segment MSB */
 #define IQ80321_7SEG_0		0xfe850000	/* 7-Segment LSB (WO) */
 #define IQ80321_ROTARY_SW	0xfe8d0000	/* Rotary Switch */
 #define IQ80321_BATT_STAT	0xfe8f0000	/* Battery Status */
 
-#ifndef __ASSEMBLY__
-extern void iq80321_map_io(void);
-#endif
 
 #endif	// _IQ80321_H_
diff --git a/include/asm-arm/arch-iop32x/irqs.h b/include/asm-arm/arch-iop32x/irqs.h
index 9fefcf3372b..a48327ced92 100644
--- a/include/asm-arm/arch-iop32x/irqs.h
+++ b/include/asm-arm/arch-iop32x/irqs.h
@@ -47,42 +47,4 @@
 #define NR_IRQS			32
 
 
-/*
- * Interrupts available on the IQ80321 board
- */
-
-/*
- * On board devices
- */
-#define	IRQ_IQ80321_I82544	IRQ_IOP321_XINT0
-#define IRQ_IQ80321_UART	IRQ_IOP321_XINT1
-
-/*
- * PCI interrupts
- */
-#define	IRQ_IQ80321_INTA	IRQ_IOP321_XINT0
-#define	IRQ_IQ80321_INTB	IRQ_IOP321_XINT1
-#define	IRQ_IQ80321_INTC	IRQ_IOP321_XINT2
-#define	IRQ_IQ80321_INTD	IRQ_IOP321_XINT3
-
-/*
- * Interrupts on the IQ31244 board
- */
-
-/*
- * On board devices
- */
-#define IRQ_IQ31244_UART	IRQ_IOP321_XINT1
-#define	IRQ_IQ31244_I82546	IRQ_IOP321_XINT0
-#define IRQ_IQ31244_SATA	IRQ_IOP321_XINT2
-#define	IRQ_IQ31244_PCIX_SLOT	IRQ_IOP321_XINT3
-
-/*
- * PCI interrupts
- */
-#define	IRQ_IQ31244_INTA	IRQ_IOP321_XINT0
-#define	IRQ_IQ31244_INTB	IRQ_IOP321_XINT1
-#define	IRQ_IQ31244_INTC	IRQ_IOP321_XINT2
-#define	IRQ_IQ31244_INTD	IRQ_IOP321_XINT3
-
 #endif // _IRQ_H_
-- 
cgit v1.2.3