From 74617fb6b825ea370ae72565f7543306bc08ef6e Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Mon, 19 Jun 2006 19:57:12 +0100 Subject: [ARM] 3593/1: Add reboot and shutdown handlers for Zaurus handhelds Patch from Richard Purdie Add functionality to allow machine specific reboot handlers on ARM. Add machine specific reboot and poweroff handlers for all PXA Zaurus models. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- include/asm-arm/arch-pxa/system.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/asm-arm/arch-pxa') diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h index 840a46bfbc5..1d56a3ef89f 100644 --- a/include/asm-arm/arch-pxa/system.h +++ b/include/asm-arm/arch-pxa/system.h @@ -10,6 +10,7 @@ * published by the Free Software Foundation. */ +#include #include "hardware.h" #include "pxa-regs.h" -- cgit v1.2.3 From 88660351cb6daa85baf9700f12dff3af564dc14a Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Mon, 19 Jun 2006 19:58:51 +0100 Subject: [ARM] 3561/1: Poodle: Correct the MMC/SD power control Patch from Richard Purdie Correct the Poodle power control for the MMC/SD port. Also add write protection switch support. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- include/asm-arm/arch-pxa/poodle.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/asm-arm/arch-pxa') diff --git a/include/asm-arm/arch-pxa/poodle.h b/include/asm-arm/arch-pxa/poodle.h index 6b5ac5144e7..6079e0aa1ab 100644 --- a/include/asm-arm/arch-pxa/poodle.h +++ b/include/asm-arm/arch-pxa/poodle.h @@ -31,6 +31,7 @@ #define POODLE_GPIO_CF_CD (14) #define POODLE_GPIO_CF_STSCHG (14) #define POODLE_GPIO_SD_PWR (33) +#define POODLE_GPIO_SD_PWR1 (3) #define POODLE_GPIO_nSD_CLK (6) #define POODLE_GPIO_nSD_WP (7) #define POODLE_GPIO_nSD_INT (8) @@ -42,6 +43,7 @@ #define POODLE_GPIO_BYPASS_ON (36) #define POODLE_GPIO_CHRG_ON (38) #define POODLE_GPIO_CHRG_FULL (16) +#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ /* PXA GPIOs */ #define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) -- cgit v1.2.3 From faed568413e89f87cd60aa8b292cc4b9996bae42 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Mon, 19 Jun 2006 20:46:05 +0100 Subject: [ARM] 3594/1: Poodle: Add touchscreen support + other updates Patch from Richard Purdie Poodle Updates: * Update corgi_ssp to make the GPIO chip selects optional * Enable corgi_ssp for use by poodle * Add corgi touchscreen platform device for poodle * Export locomo platform device. * Set framebuffer device parent correctly Signed-off-by: Richard Purdie Signed-off-by: Russell King --- include/asm-arm/arch-pxa/poodle.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/asm-arm/arch-pxa') diff --git a/include/asm-arm/arch-pxa/poodle.h b/include/asm-arm/arch-pxa/poodle.h index 6079e0aa1ab..4d6a4031576 100644 --- a/include/asm-arm/arch-pxa/poodle.h +++ b/include/asm-arm/arch-pxa/poodle.h @@ -70,4 +70,6 @@ #define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) #define POODLE_SCOOP_IO_OUT ( 0 ) +extern struct platform_device poodle_locomo_device; + #endif /* __ASM_ARCH_POODLE_H */ -- cgit v1.2.3 From c322e24b40b83bbdfa7c269bc0105e76a39e627f Mon Sep 17 00:00:00 2001 From: Liam Girdwood Date: Tue, 20 Jun 2006 19:26:42 +0100 Subject: [ARM] 3606/1: PXA27x SSP Register definitions Patch from Liam Girdwood This patch adds some new PXA27x SSP port registers and also fixes the SSP slots per frame macro Changes:- o SSCR0_SlotPerFrm fixed o Added SSP port TSA, RSA, TSS and ACD registers Signed-off-by: Liam Girdwood Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'include/asm-arm/arch-pxa') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index c8f53a71c07..7c1aefd99d5 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1626,7 +1626,7 @@ #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ -#define SSCR0_SlotsPerFrm(c) ((x) - 1) /* Time slots per frame [1..8] */ +#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */ #define SSCR0_ADC (1 << 30) /* Audio clock select */ #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ #endif @@ -1707,6 +1707,10 @@ #if defined (CONFIG_PXA27x) #define SSTO_P1 __REG(0x41000028) /* SSP Port 1 Time Out Register */ #define SSPSP_P1 __REG(0x4100002C) /* SSP Port 1 Programmable Serial Protocol */ +#define SSTSA_P1 __REG(0x41000030) /* SSP Port 1 Tx Timeslot Active */ +#define SSRSA_P1 __REG(0x41000034) /* SSP Port 1 Rx Timeslot Active */ +#define SSTSS_P1 __REG(0x41000038) /* SSP Port 1 Timeslot Status */ +#define SSACD_P1 __REG(0x4100003C) /* SSP Port 1 Audio Clock Divider */ #define SSCR0_P2 __REG(0x41700000) /* SSP Port 2 Control Register 0 */ #define SSCR1_P2 __REG(0x41700004) /* SSP Port 2 Control Register 1 */ #define SSSR_P2 __REG(0x41700008) /* SSP Port 2 Status Register */ @@ -1714,6 +1718,10 @@ #define SSDR_P2 __REG(0x41700010) /* (Write / Read) SSP Port 2 Data Write Register/SSP Data Read Register */ #define SSTO_P2 __REG(0x41700028) /* SSP Port 2 Time Out Register */ #define SSPSP_P2 __REG(0x4170002C) /* SSP Port 2 Programmable Serial Protocol */ +#define SSTSA_P2 __REG(0x41700030) /* SSP Port 2 Tx Timeslot Active */ +#define SSRSA_P2 __REG(0x41700034) /* SSP Port 2 Rx Timeslot Active */ +#define SSTSS_P2 __REG(0x41700038) /* SSP Port 2 Timeslot Status */ +#define SSACD_P2 __REG(0x4170003C) /* SSP Port 2 Audio Clock Divider */ #define SSCR0_P3 __REG(0x41900000) /* SSP Port 3 Control Register 0 */ #define SSCR1_P3 __REG(0x41900004) /* SSP Port 3 Control Register 1 */ #define SSSR_P3 __REG(0x41900008) /* SSP Port 3 Status Register */ @@ -1721,6 +1729,10 @@ #define SSDR_P3 __REG(0x41900010) /* (Write / Read) SSP Port 3 Data Write Register/SSP Data Read Register */ #define SSTO_P3 __REG(0x41900028) /* SSP Port 3 Time Out Register */ #define SSPSP_P3 __REG(0x4190002C) /* SSP Port 3 Programmable Serial Protocol */ +#define SSTSA_P3 __REG(0x41900030) /* SSP Port 3 Tx Timeslot Active */ +#define SSRSA_P3 __REG(0x41900034) /* SSP Port 3 Rx Timeslot Active */ +#define SSTSS_P3 __REG(0x41900038) /* SSP Port 3 Timeslot Status */ +#define SSACD_P3 __REG(0x4190003C) /* SSP Port 3 Audio Clock Divider */ #else /* PXA255 (only port 2) and PXA26x ports*/ #define SSTO_P1 __REG(0x41000028) /* SSP Port 1 Time Out Register */ #define SSPSP_P1 __REG(0x4100002C) /* SSP Port 1 Programmable Serial Protocol */ @@ -1747,6 +1759,10 @@ #define SSDR_P(x) (*(((x) == 1) ? &SSDR_P1 : ((x) == 2) ? &SSDR_P2 : ((x) == 3) ? &SSDR_P3 : NULL)) #define SSTO_P(x) (*(((x) == 1) ? &SSTO_P1 : ((x) == 2) ? &SSTO_P2 : ((x) == 3) ? &SSTO_P3 : NULL)) #define SSPSP_P(x) (*(((x) == 1) ? &SSPSP_P1 : ((x) == 2) ? &SSPSP_P2 : ((x) == 3) ? &SSPSP_P3 : NULL)) +#define SSTSA_P(x) (*(((x) == 1) ? &SSTSA_P1 : ((x) == 2) ? &SSTSA_P2 : ((x) == 3) ? &SSTSA_P3 : NULL)) +#define SSRSA_P(x) (*(((x) == 1) ? &SSRSA_P1 : ((x) == 2) ? &SSRSA_P2 : ((x) == 3) ? &SSRSA_P3 : NULL)) +#define SSTSS_P(x) (*(((x) == 1) ? &SSTSS_P1 : ((x) == 2) ? &SSTSS_P2 : ((x) == 3) ? &SSTSS_P3 : NULL)) +#define SSACD_P(x) (*(((x) == 1) ? &SSACD_P1 : ((x) == 2) ? &SSACD_P2 : ((x) == 3) ? &SSACD_P3 : NULL)) /* * MultiMediaCard (MMC) controller -- cgit v1.2.3