From f57e1abd1bb297994c7398478b4c37e628095243 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 18 Aug 2006 15:32:10 +0100 Subject: [ARM] 3753/1: S3C24XX: DMA fixes Patch from Ben Dooks A number of small issues with the S3C24XX DMA have cropped up, which this patch fixes. These are: - check wether we can load another buff in start - update state handling in s3c2410_dma_lastxfer - only reload in irq if channel is not idle - more informative timeout errors (add source) - do not call request_irq() with irqs locked - added waitforstop function The patch also adds a S3C2410_DMAOP_STARTED for the occasions when the driver wants to ensure that the DMA system load state is resynced after loading. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/dma.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/asm-arm/arch-s3c2410/dma.h') diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 72964f9b841..7463fd5252c 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -104,6 +104,7 @@ enum s3c2410_chan_op_e { S3C2410_DMAOP_RESUME, S3C2410_DMAOP_FLUSH, S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ + S3C2410_DMAOP_STARTED, /* indicate channel started */ }; typedef enum s3c2410_chan_op_e s3c2410_chan_op_t; -- cgit v1.2.3 From f105a7dfc5e81c28dd23ebf2328e42972e2cf240 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 31 Aug 2006 15:26:37 +0100 Subject: [ARM] 3764/1: S3C24XX: change type naming to kernel style Patch from Ben Dooks The type naming in the s3c24xx dma code is riddled with typedefs creating _t types, from the code import from 2.4 which is contrary to the current Kernel coding style. This patch cleans this up, removing the typedefs and and fixing up the resultant code changes. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/dma.h | 80 +++++++++++++++++--------------------- 1 file changed, 36 insertions(+), 44 deletions(-) (limited to 'include/asm-arm/arch-s3c2410/dma.h') diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 7463fd5252c..46e65409fcc 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -35,14 +35,14 @@ /* types */ -typedef enum { +enum s3c2410_dma_state { S3C2410_DMA_IDLE, S3C2410_DMA_RUNNING, S3C2410_DMA_PAUSED -} s3c2410_dma_state_t; +}; -/* s3c2410_dma_loadst_t +/* enum s3c2410_dma_loadst * * This represents the state of the DMA engine, wrt to the loaded / running * transfers. Since we don't have any way of knowing exactly the state of @@ -70,34 +70,32 @@ typedef enum { * currently running. */ -typedef enum { +enum s3c2410_dma_loadst { S3C2410_DMALOAD_NONE, S3C2410_DMALOAD_1LOADED, S3C2410_DMALOAD_1RUNNING, S3C2410_DMALOAD_1LOADED_1RUNNING, -} s3c2410_dma_loadst_t; +}; -typedef enum { +enum s3c2410_dma_buffresult { S3C2410_RES_OK, S3C2410_RES_ERR, S3C2410_RES_ABORT -} s3c2410_dma_buffresult_t; - +}; -typedef enum s3c2410_dmasrc_e s3c2410_dmasrc_t; -enum s3c2410_dmasrc_e { +enum s3c2410_dmasrc { S3C2410_DMASRC_HW, /* source is memory */ S3C2410_DMASRC_MEM /* source is hardware */ }; -/* enum s3c2410_chan_op_e +/* enum s3c2410_chan_op * * operation codes passed to the DMA code by the user, and also used * to inform the current channel owner of any changes to the system state */ -enum s3c2410_chan_op_e { +enum s3c2410_chan_op { S3C2410_DMAOP_START, S3C2410_DMAOP_STOP, S3C2410_DMAOP_PAUSE, @@ -107,8 +105,6 @@ enum s3c2410_chan_op_e { S3C2410_DMAOP_STARTED, /* indicate channel started */ }; -typedef enum s3c2410_chan_op_e s3c2410_chan_op_t; - /* flags */ #define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about @@ -117,22 +113,19 @@ typedef enum s3c2410_chan_op_e s3c2410_chan_op_t; /* dma buffer */ -typedef struct s3c2410_dma_buf_s s3c2410_dma_buf_t; - struct s3c2410_dma_client { char *name; }; -typedef struct s3c2410_dma_client s3c2410_dma_client_t; - /* s3c2410_dma_buf_s * * internally used buffer structure to describe a queued or running * buffer. */ -struct s3c2410_dma_buf_s { - s3c2410_dma_buf_t *next; +struct s3c2410_dma_buf; +struct s3c2410_dma_buf { + struct s3c2410_dma_buf *next; int magic; /* magic */ int size; /* buffer size in bytes */ dma_addr_t data; /* start of DMA data */ @@ -142,20 +135,21 @@ struct s3c2410_dma_buf_s { /* [1] is this updated for both recv/send modes? */ -typedef struct s3c2410_dma_chan_s s3c2410_dma_chan_t; +struct s3c2410_dma_chan; /* s3c2410_dma_cbfn_t * * buffer callback routine type */ -typedef void (*s3c2410_dma_cbfn_t)(s3c2410_dma_chan_t *, void *buf, int size, - s3c2410_dma_buffresult_t result); +typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *, + void *buf, int size, + enum s3c2410_dma_buffresult result); -typedef int (*s3c2410_dma_opfn_t)(s3c2410_dma_chan_t *, - s3c2410_chan_op_t ); +typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *, + enum s3c2410_chan_op ); -struct s3c2410_dma_stats_s { +struct s3c2410_dma_stats { unsigned long loads; unsigned long timeout_longest; unsigned long timeout_shortest; @@ -163,14 +157,12 @@ struct s3c2410_dma_stats_s { unsigned long timeout_failed; }; -typedef struct s3c2410_dma_stats_s s3c2410_dma_stats_t; - -/* struct s3c2410_dma_chan_s +/* struct s3c2410_dma_chan * * full state information for each DMA channel */ -struct s3c2410_dma_chan_s { +struct s3c2410_dma_chan { /* channel state flags and information */ unsigned char number; /* number of this dma channel */ unsigned char in_use; /* channel allocated */ @@ -180,12 +172,12 @@ struct s3c2410_dma_chan_s { /* channel state */ - s3c2410_dma_state_t state; - s3c2410_dma_loadst_t load_state; - s3c2410_dma_client_t *client; + enum s3c2410_dma_state state; + enum s3c2410_dma_loadst load_state; + struct s3c2410_dma_client *client; /* channel configuration */ - s3c2410_dmasrc_t source; + enum s3c2410_dmasrc source; unsigned long dev_addr; unsigned long load_timeout; unsigned int flags; /* channel flags */ @@ -201,20 +193,20 @@ struct s3c2410_dma_chan_s { s3c2410_dma_opfn_t op_fn; /* channel operation callback */ /* stats gathering */ - s3c2410_dma_stats_t *stats; - s3c2410_dma_stats_t stats_store; + struct s3c2410_dma_stats *stats; + struct s3c2410_dma_stats stats_store; /* buffer list and information */ - s3c2410_dma_buf_t *curr; /* current dma buffer */ - s3c2410_dma_buf_t *next; /* next buffer to load */ - s3c2410_dma_buf_t *end; /* end of queue */ + struct s3c2410_dma_buf *curr; /* current dma buffer */ + struct s3c2410_dma_buf *next; /* next buffer to load */ + struct s3c2410_dma_buf *end; /* end of queue */ /* system device */ struct sys_device dev; }; /* the currently allocated channel information */ -extern s3c2410_dma_chan_t s3c2410_chans[]; +extern struct s3c2410_dma_chan s3c2410_chans[]; /* note, we don't really use dma_device_t at the moment */ typedef unsigned long dma_device_t; @@ -227,7 +219,7 @@ typedef unsigned long dma_device_t; */ extern int s3c2410_dma_request(dmach_t channel, - s3c2410_dma_client_t *, void *dev); + struct s3c2410_dma_client *, void *dev); /* s3c2410_dma_ctrl @@ -235,7 +227,7 @@ extern int s3c2410_dma_request(dmach_t channel, * change the state of the dma channel */ -extern int s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op); +extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op); /* s3c2410_dma_setflags * @@ -250,7 +242,7 @@ extern int s3c2410_dma_setflags(dmach_t channel, * free the dma channel (will also abort any outstanding operations) */ -extern int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *); +extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *); /* s3c2410_dma_enqueue * @@ -274,7 +266,7 @@ extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon); * configure the device we're talking to */ -extern int s3c2410_dma_devconfig(int channel, s3c2410_dmasrc_t source, +extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, int hwcfg, unsigned long devaddr); /* s3c2410_dma_getposition -- cgit v1.2.3 From 57bcdafcb1e0782e7ae13471d9223c69e3a6cba2 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 31 Aug 2006 15:26:41 +0100 Subject: [ARM] 3765/1: S3C24XX: cleanup include/asm-arm/arch-s3c2410/dma.h Patch from Ben Dooks Cleanup for include/asm-arma/arch-s3c2410/dma.h, by using tab characters to indent items, remove the now un-necessary changelog, and update the copyright information. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/dma.h | 90 +++++++++++++++++--------------------- 1 file changed, 41 insertions(+), 49 deletions(-) (limited to 'include/asm-arm/arch-s3c2410/dma.h') diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 46e65409fcc..3661e465b0a 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -1,18 +1,13 @@ -/* linux/include/asm-arm/arch-bast/dma.h +/* linux/include/asm-arm/arch-s3c2410/dma.h * - * Copyright (C) 2003,2004 Simtec Electronics + * Copyright (C) 2003,2004,2006 Simtec Electronics * Ben Dooks * - * Samsung S3C2410X DMA support + * Samsung S3C241XX DMA support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. - * - * Changelog: - * ??-May-2003 BJD Created file - * ??-Jun-2003 BJD Added more dma functionality to go with arch - * 10-Nov-2004 BJD Added sys_device support */ #ifndef __ASM_ARCH_DMA_H @@ -21,15 +16,13 @@ #include #include "hardware.h" - /* * This is the maximum DMA address(physical address) that can be DMAd to. * */ -#define MAX_DMA_ADDRESS 0x20000000 +#define MAX_DMA_ADDRESS 0x40000000 #define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ - /* we have 4 dma channels */ #define S3C2410_DMA_CHANNELS (4) @@ -83,10 +76,9 @@ enum s3c2410_dma_buffresult { S3C2410_RES_ABORT }; - enum s3c2410_dmasrc { - S3C2410_DMASRC_HW, /* source is memory */ - S3C2410_DMASRC_MEM /* source is hardware */ + S3C2410_DMASRC_HW, /* source is memory */ + S3C2410_DMASRC_MEM /* source is hardware */ }; /* enum s3c2410_chan_op @@ -101,7 +93,7 @@ enum s3c2410_chan_op { S3C2410_DMAOP_PAUSE, S3C2410_DMAOP_RESUME, S3C2410_DMAOP_FLUSH, - S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ + S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ S3C2410_DMAOP_STARTED, /* indicate channel started */ }; @@ -125,12 +117,12 @@ struct s3c2410_dma_client { struct s3c2410_dma_buf; struct s3c2410_dma_buf { - struct s3c2410_dma_buf *next; - int magic; /* magic */ - int size; /* buffer size in bytes */ - dma_addr_t data; /* start of DMA data */ - dma_addr_t ptr; /* where the DMA got to [1] */ - void *id; /* client's id */ + struct s3c2410_dma_buf *next; + int magic; /* magic */ + int size; /* buffer size in bytes */ + dma_addr_t data; /* start of DMA data */ + dma_addr_t ptr; /* where the DMA got to [1] */ + void *id; /* client's id */ }; /* [1] is this updated for both recv/send modes? */ @@ -150,11 +142,11 @@ typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *, enum s3c2410_chan_op ); struct s3c2410_dma_stats { - unsigned long loads; - unsigned long timeout_longest; - unsigned long timeout_shortest; - unsigned long timeout_avg; - unsigned long timeout_failed; + unsigned long loads; + unsigned long timeout_longest; + unsigned long timeout_shortest; + unsigned long timeout_avg; + unsigned long timeout_failed; }; /* struct s3c2410_dma_chan @@ -164,42 +156,42 @@ struct s3c2410_dma_stats { struct s3c2410_dma_chan { /* channel state flags and information */ - unsigned char number; /* number of this dma channel */ - unsigned char in_use; /* channel allocated */ - unsigned char irq_claimed; /* irq claimed for channel */ - unsigned char irq_enabled; /* irq enabled for channel */ - unsigned char xfer_unit; /* size of an transfer */ + unsigned char number; /* number of this dma channel */ + unsigned char in_use; /* channel allocated */ + unsigned char irq_claimed; /* irq claimed for channel */ + unsigned char irq_enabled; /* irq enabled for channel */ + unsigned char xfer_unit; /* size of an transfer */ /* channel state */ - enum s3c2410_dma_state state; - enum s3c2410_dma_loadst load_state; - struct s3c2410_dma_client *client; + enum s3c2410_dma_state state; + enum s3c2410_dma_loadst load_state; + struct s3c2410_dma_client *client; /* channel configuration */ - enum s3c2410_dmasrc source; - unsigned long dev_addr; - unsigned long load_timeout; - unsigned int flags; /* channel flags */ + enum s3c2410_dmasrc source; + unsigned long dev_addr; + unsigned long load_timeout; + unsigned int flags; /* channel flags */ /* channel's hardware position and configuration */ - void __iomem *regs; /* channels registers */ - void __iomem *addr_reg; /* data address register */ - unsigned int irq; /* channel irq */ - unsigned long dcon; /* default value of DCON */ + void __iomem *regs; /* channels registers */ + void __iomem *addr_reg; /* data address register */ + unsigned int irq; /* channel irq */ + unsigned long dcon; /* default value of DCON */ /* driver handles */ - s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ - s3c2410_dma_opfn_t op_fn; /* channel operation callback */ + s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ + s3c2410_dma_opfn_t op_fn; /* channel op callback */ /* stats gathering */ - struct s3c2410_dma_stats *stats; - struct s3c2410_dma_stats stats_store; + struct s3c2410_dma_stats *stats; + struct s3c2410_dma_stats stats_store; /* buffer list and information */ - struct s3c2410_dma_buf *curr; /* current dma buffer */ - struct s3c2410_dma_buf *next; /* next buffer to load */ - struct s3c2410_dma_buf *end; /* end of queue */ + struct s3c2410_dma_buf *curr; /* current dma buffer */ + struct s3c2410_dma_buf *next; /* next buffer to load */ + struct s3c2410_dma_buf *end; /* end of queue */ /* system device */ struct sys_device dev; -- cgit v1.2.3