From abc0197d7a74e51a1581ce9971d7c2c0f2adadaf Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 27 Mar 2008 14:51:40 -0400 Subject: plat-orion: share PCIe handling code Split off Orion PCIe handling code into plat-orion/. Signed-off-by: Lennert Buytenhek Reviewed-by: Tzachi Perelstein Acked-by: Russell King Signed-off-by: Nicolas Pitre --- include/asm-arm/plat-orion/pcie.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 include/asm-arm/plat-orion/pcie.h (limited to 'include/asm-arm/plat-orion') diff --git a/include/asm-arm/plat-orion/pcie.h b/include/asm-arm/plat-orion/pcie.h new file mode 100644 index 00000000000..6434ac685d2 --- /dev/null +++ b/include/asm-arm/plat-orion/pcie.h @@ -0,0 +1,31 @@ +/* + * include/asm-arm/plat-orion/pcie.h + * + * Marvell Orion SoC PCIe handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_PLAT_ORION_PCIE_H +#define __ASM_PLAT_ORION_PCIE_H + +u32 orion_pcie_dev_id(void __iomem *base); +u32 orion_pcie_rev(void __iomem *base); +int orion_pcie_link_up(void __iomem *base); +int orion_pcie_get_local_bus_nr(void __iomem *base); +void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); +void orion_pcie_setup(void __iomem *base, + struct mbus_dram_target_info *dram); +int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 val); + + +#endif -- cgit v1.2.3