From efe90d273b6f365d37c0f82fbbd68a40982c3265 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 8 Dec 2006 15:22:20 +0000 Subject: [ARM] Handle HWCAP_VFP in VFP support code Don't set HWCAP_VFP in the processor support file; not only does it depend on the processor features, but it also depends on the support code being present. Therefore, only set it if the support code detects that we have a VFP coprocessor attached. Also, move the VFP handling of the coprocessor access register into the VFP support code. Signed-off-by: Russell King --- include/asm-arm/system.h | 43 ++++++++++++++++++++++++++++++------------- 1 file changed, 30 insertions(+), 13 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index f05fbe31576..f60faccf01f 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -139,19 +139,36 @@ static inline int cpu_is_xsc3(void) #define cpu_is_xscale() 1 #endif -#define set_cr(x) \ - __asm__ __volatile__( \ - "mcr p15, 0, %0, c1, c0, 0 @ set CR" \ - : : "r" (x) : "cc") - -#define get_cr() \ - ({ \ - unsigned int __val; \ - __asm__ __volatile__( \ - "mrc p15, 0, %0, c1, c0, 0 @ get CR" \ - : "=r" (__val) : : "cc"); \ - __val; \ - }) +static inline unsigned int get_cr(void) +{ + unsigned int val; + asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); + return val; +} + +static inline void set_cr(unsigned int val) +{ + asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" + : : "r" (val) : "cc"); +} + +#define CPACC_FULL(n) (3 << (n * 2)) +#define CPACC_SVC(n) (1 << (n * 2)) +#define CPACC_DISABLE(n) (0 << (n * 2)) + +static inline unsigned int get_copro_access(void) +{ + unsigned int val; + asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access" + : "=r" (val) : : "cc"); + return val; +} + +static inline void set_copro_access(unsigned int val) +{ + asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access" + : : "r" (val) : "cc"); +} extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ extern unsigned long cr_alignment; /* defined in entry-armv.S */ -- cgit v1.2.3 From 9fddda232ca2de4d40ba9c3890e27bdb4f4f8bbd Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 8 Dec 2006 00:08:33 +0100 Subject: [ARM] 4004/1: S3C24XX: UDC remove implict addition of VA to regs Remove the implicit addition of a virtual address to the UDC registers. This should have been done by ioremap() in the driver, not by a static map. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-udc.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/regs-udc.h b/include/asm-arm/arch-s3c2410/regs-udc.h index 487861d5b49..3c8354619b6 100644 --- a/include/asm-arm/arch-s3c2410/regs-udc.h +++ b/include/asm-arm/arch-s3c2410/regs-udc.h @@ -11,8 +11,7 @@ #ifndef __ASM_ARCH_REGS_UDC_H #define __ASM_ARCH_REGS_UDC_H - -#define S3C2410_USBDREG(x) ((x) + S3C24XX_VA_USBDEV) +#define S3C2410_USBDREG(x) (x) #define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140) #define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144) @@ -136,8 +135,8 @@ #define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W #define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W -#define S3C2410_UDC_SETIX(x) \ - __raw_writel(S3C2410_UDC_INDEX_ ## x, S3C2410_UDC_INDEX_REG); +#define S3C2410_UDC_SETIX(base,x) \ + writel(S3C2410_UDC_INDEX_ ## x, base+S3C2410_UDC_INDEX_REG); #define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0) -- cgit v1.2.3 From be90038a24c814dc98bc5a813f41855779000018 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Fri, 8 Dec 2006 02:38:43 -0800 Subject: [PATCH] tty: preparatory structures for termios revamp In order to sort out our struct termios and add proper speed control we need to separate the kernel and user termios structures. Glibc is fine but the other libraries rely on the kernel exported struct termios and we need to extend this without breaking the ABI/API To do so we add a struct ktermios which is the kernel view of a termios structure and overlaps the struct termios with extra fields on the end for now. (That limitation will go away in later patches). Some platforms (eg alpha) planned ahead and thus use the same struct for both, others did not. This just adds the structures but does not use them, it seems a sensible splitting point for bisect if there are compile failures (not that I expect them) Signed-off-by: Alan Cox Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-arm/termbits.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/termbits.h b/include/asm-arm/termbits.h index bbc6e1d24d3..a3f4fe1742d 100644 --- a/include/asm-arm/termbits.h +++ b/include/asm-arm/termbits.h @@ -15,6 +15,18 @@ struct termios { cc_t c_cc[NCCS]; /* control characters */ }; +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + + /* c_cc characters */ #define VINTR 0 #define VQUIT 1 -- cgit v1.2.3 From 357b819dda03e642f9c2d737596ad6cdc0022c00 Mon Sep 17 00:00:00 2001 From: "Arnaud Patard (Rtp" Date: Fri, 8 Dec 2006 02:40:23 -0800 Subject: [PATCH] s3c2410fb: Add support for STN displays This patch adds support for stn displays on the s3c2410 arm SoC. The LCD type is choosen by a new field in the s3c2410fb_mach_info structure and its value is the value of the PNRMODE bits. This worth to be noted as a value of 0 means that you configure a 4 bit dual scan stn display. Signed-off-by: Arnaud Patard Cc: "Antonino A. Daplas" Cc: Russell King Cc: Ben Dooks Acked-by: James Simmons Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-arm/arch-s3c2410/fb.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h index 90894214cac..93a58e7862b 100644 --- a/include/asm-arm/arch-s3c2410/fb.h +++ b/include/asm-arm/arch-s3c2410/fb.h @@ -31,6 +31,9 @@ struct s3c2410fb_hw { struct s3c2410fb_mach_info { unsigned char fixed_syncs; /* do not update sync/border */ + /* LCD types */ + int type; + /* Screen size */ int width; int height; -- cgit v1.2.3 From bca0b8e75f6b7cf52cf52c967286b72d84f9b37e Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 9 Dec 2006 16:41:55 +0000 Subject: [ARM] Add sys_*at syscalls Later glibc requires the *at syscalls. Add them. Signed-off-by: Russell King --- include/asm-arm/unistd.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index d44c629d842..32b06eb5281 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -347,6 +347,19 @@ #define __NR_mbind (__NR_SYSCALL_BASE+319) #define __NR_get_mempolicy (__NR_SYSCALL_BASE+320) #define __NR_set_mempolicy (__NR_SYSCALL_BASE+321) +#define __NR_openat (__NR_SYSCALL_BASE+322) +#define __NR_mkdirat (__NR_SYSCALL_BASE+323) +#define __NR_mknodat (__NR_SYSCALL_BASE+324) +#define __NR_fchownat (__NR_SYSCALL_BASE+325) +#define __NR_futimesat (__NR_SYSCALL_BASE+326) +#define __NR_fstatat64 (__NR_SYSCALL_BASE+327) +#define __NR_unlinkat (__NR_SYSCALL_BASE+328) +#define __NR_renameat (__NR_SYSCALL_BASE+329) +#define __NR_linkat (__NR_SYSCALL_BASE+330) +#define __NR_symlinkat (__NR_SYSCALL_BASE+331) +#define __NR_readlinkat (__NR_SYSCALL_BASE+332) +#define __NR_fchmodat (__NR_SYSCALL_BASE+333) +#define __NR_faccessat (__NR_SYSCALL_BASE+334) /* * The following SWIs are ARM private. -- cgit v1.2.3 From 8d94cc50aa4f1448a6483975097805eb8d6be0e0 Mon Sep 17 00:00:00 2001 From: Stephen Street Date: Sun, 10 Dec 2006 02:18:54 -0800 Subject: [PATCH] spi: stabilize PIO mode transfers on PXA2xx systems Stabilize PIO mode transfers against a range of word sizes and FIFO thresholds and fixes word size setup/override issues. 1) 16 and 32 bit DMA/PIO transfers broken due to timing differences. 2) Potential for bad transfer counts due to transfer size assumptions. 3) Setup function broken is multiple ways. 4) Per transfer bit_per_word changes break DMA setup in pump_tranfers. 5) False positive timeout are not errors. 6) Changes in pxa2xx_spi_chip not effective in calls to setup. 7) Timeout scaling wrong for PXA255 NSSP. 8) Driver leaks memory while busy during unloading. Known issues: SPI_CS_HIGH and SPI_LSB_FIRST settings in struct spi_device are not handled. Testing: This patch has been test against the "random length, random bits/word, random data (verified on loopback) and stepped baud rate by octaves (3.6MHz to 115kHz)" test. It is robust in PIO mode, using any combination of tx and rx thresholds, and also in DMA mode (which internally computes the thresholds). Much thanks to Ned Forrester for exhaustive reviews, fixes and testing. The driver is substantially better for his efforts. Signed-off-by: Stephen Street Signed-off-by: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-arm/arch-pxa/pxa2xx_spi.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-pxa/pxa2xx_spi.h b/include/asm-arm/arch-pxa/pxa2xx_spi.h index 915590c391c..acc7ec7a84a 100644 --- a/include/asm-arm/arch-pxa/pxa2xx_spi.h +++ b/include/asm-arm/arch-pxa/pxa2xx_spi.h @@ -27,16 +27,13 @@ #define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00) #define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) #define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) -#define SSP_TIMEOUT_SCALE (2712) #elif defined(CONFIG_PXA27x) #define CLOCK_SPEED_HZ 13000000 #define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) #define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) #define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) -#define SSP_TIMEOUT_SCALE (769) #endif -#define SSP_TIMEOUT(x) ((x*10000)/SSP_TIMEOUT_SCALE) #define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1))))) #define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2))))) #define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3))))) @@ -63,7 +60,7 @@ struct pxa2xx_spi_chip { u8 tx_threshold; u8 rx_threshold; u8 dma_burst_size; - u32 timeout_microsecs; + u32 timeout; u8 enable_loopback; void (*cs_control)(u32 command); }; -- cgit v1.2.3 From 41561f28e76a47dc6de0a954da85d0b5c42874eb Mon Sep 17 00:00:00 2001 From: Vitaly Wool Date: Sun, 10 Dec 2006 21:21:29 +0100 Subject: i2c: New Philips PNX bus driver New I2C bus driver for Philips ARM boards (Philips IP3204 I2C IP block). This I2C controller can be found on (at least) PNX010x, PNX52xx and PNX4008 Philips boards. Signed-off-by: Vitaly Wool Signed-off-by: Jean Delvare --- include/asm-arm/arch-pnx4008/i2c.h | 67 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 include/asm-arm/arch-pnx4008/i2c.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-pnx4008/i2c.h b/include/asm-arm/arch-pnx4008/i2c.h new file mode 100644 index 00000000000..92e8d65006f --- /dev/null +++ b/include/asm-arm/arch-pnx4008/i2c.h @@ -0,0 +1,67 @@ +/* + * PNX4008-specific tweaks for I2C IP3204 block + * + * Author: Vitaly Wool + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#ifndef __ASM_ARCH_I2C_H__ +#define __ASM_ARCH_I2C_H__ + +#include +#include + +enum { + mstatus_tdi = 0x00000001, + mstatus_afi = 0x00000002, + mstatus_nai = 0x00000004, + mstatus_drmi = 0x00000008, + mstatus_active = 0x00000020, + mstatus_scl = 0x00000040, + mstatus_sda = 0x00000080, + mstatus_rff = 0x00000100, + mstatus_rfe = 0x00000200, + mstatus_tff = 0x00000400, + mstatus_tfe = 0x00000800, +}; + +enum { + mcntrl_tdie = 0x00000001, + mcntrl_afie = 0x00000002, + mcntrl_naie = 0x00000004, + mcntrl_drmie = 0x00000008, + mcntrl_daie = 0x00000020, + mcntrl_rffie = 0x00000040, + mcntrl_tffie = 0x00000080, + mcntrl_reset = 0x00000100, + mcntrl_cdbmode = 0x00000400, +}; + +enum { + rw_bit = 1 << 0, + start_bit = 1 << 8, + stop_bit = 1 << 9, +}; + +#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */ +#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */ +#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */ +#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */ +#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */ +#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */ +#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */ +#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */ +#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */ +#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */ +#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */ +#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */ +#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */ + +#define HCLK_MHZ 13 +#define I2C_CHIP_NAME "PNX4008-I2C" + +#endif /* __ASM_ARCH_I2C_H___ */ -- cgit v1.2.3 From ad1ae2fe7fe68414ef29eab3c87b48841f8b72f2 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 13 Dec 2006 14:34:43 +0000 Subject: [ARM] Unuse another Linux PTE bit L_PTE_ASID is not really required to be stored in every PTE, since we can identify it via the address passed to set_pte_at(). So, create set_pte_ext() which takes the address of the PTE to set, the Linux PTE value, and the additional CPU PTE bits which aren't encoded in the Linux PTE value. Signed-off-by: Russell King --- include/asm-arm/cpu-multi32.h | 7 ++++--- include/asm-arm/cpu-single.h | 4 ++-- include/asm-arm/pgtable.h | 11 +++++++---- 3 files changed, 13 insertions(+), 9 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h index 4679f63688e..715e18a4add 100644 --- a/include/asm-arm/cpu-multi32.h +++ b/include/asm-arm/cpu-multi32.h @@ -50,9 +50,10 @@ extern struct processor { */ void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm); /* - * Set a PTE + * Set a possibly extended PTE. Non-extended PTEs should + * ignore 'ext'. */ - void (*set_pte)(pte_t *ptep, pte_t pte); + void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext); } processor; #define cpu_proc_init() processor._proc_init() @@ -60,5 +61,5 @@ extern struct processor { #define cpu_reset(addr) processor.reset(addr) #define cpu_do_idle() processor._do_idle() #define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz) -#define cpu_set_pte(ptep, pte) processor.set_pte(ptep, pte) +#define cpu_set_pte_ext(ptep,pte,ext) processor.set_pte_ext(ptep,pte,ext) #define cpu_do_switch_mm(pgd,mm) processor.switch_mm(pgd,mm) diff --git a/include/asm-arm/cpu-single.h b/include/asm-arm/cpu-single.h index 6723e67244f..0b120ee3609 100644 --- a/include/asm-arm/cpu-single.h +++ b/include/asm-arm/cpu-single.h @@ -28,7 +28,7 @@ #define cpu_do_idle __cpu_fn(CPU_NAME,_do_idle) #define cpu_dcache_clean_area __cpu_fn(CPU_NAME,_dcache_clean_area) #define cpu_do_switch_mm __cpu_fn(CPU_NAME,_switch_mm) -#define cpu_set_pte __cpu_fn(CPU_NAME,_set_pte) +#define cpu_set_pte_ext __cpu_fn(CPU_NAME,_set_pte_ext) #include @@ -40,5 +40,5 @@ extern void cpu_proc_fin(void); extern int cpu_do_idle(void); extern void cpu_dcache_clean_area(void *, int); extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); -extern void cpu_set_pte(pte_t *ptep, pte_t pte); +extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index 88cd5c784ef..b8cf2d5ec30 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -21,6 +21,7 @@ #include #include +#include /* * Just any arbitrary offset to the start of the vmalloc VM area: the @@ -170,7 +171,6 @@ extern void __pgd_error(const char *file, int line, unsigned long val); #define L_PTE_EXEC (1 << 6) #define L_PTE_DIRTY (1 << 7) #define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */ -#define L_PTE_ASID (1 << 11) /* non-global (use ASID, v6) */ #ifndef __ASSEMBLY__ @@ -228,7 +228,7 @@ extern struct page *empty_zero_page; #define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))) #define pte_none(pte) (!pte_val(pte)) -#define pte_clear(mm,addr,ptep) set_pte_at((mm),(addr),(ptep), __pte(0)) +#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0) #define pte_page(pte) (pfn_to_page(pte_pfn(pte))) #define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr)) #define pte_offset_map(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr)) @@ -236,8 +236,11 @@ extern struct page *empty_zero_page; #define pte_unmap(pte) do { } while (0) #define pte_unmap_nested(pte) do { } while (0) -#define set_pte(ptep, pte) cpu_set_pte(ptep,pte) -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) +#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) + +#define set_pte_at(mm,addr,ptep,pteval) do { \ + set_pte_ext(ptep, pteval, (addr) >= PAGE_OFFSET ? 0 : PTE_EXT_NG); \ + } while (0) /* * The following only work if pte_present() is true. -- cgit v1.2.3 From 8a102eed9c4e1d21bad07a8fd97bd4fbf125d966 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Wed, 13 Dec 2006 00:34:30 -0800 Subject: [PATCH] PM: Fix SMP races in the freezer Currently, to tell a task that it should go to the refrigerator, we set the PF_FREEZE flag for it and send a fake signal to it. Unfortunately there are two SMP-related problems with this approach. First, a task running on another CPU may be updating its flags while the freezer attempts to set PF_FREEZE for it and this may leave the task's flags in an inconsistent state. Second, there is a potential race between freeze_process() and refrigerator() in which freeze_process() running on one CPU is reading a task's PF_FREEZE flag while refrigerator() running on another CPU has just set PF_FROZEN for the same task and attempts to reset PF_FREEZE for it. If the refrigerator wins the race, freeze_process() will state that PF_FREEZE hasn't been set for the task and will set it unnecessarily, so the task will go to the refrigerator once again after it's been thawed. To solve first of these problems we need to stop using PF_FREEZE to tell tasks that they should go to the refrigerator. Instead, we can introduce a special TIF_*** flag and use it for this purpose, since it is allowed to change the other tasks' TIF_*** flags and there are special calls for it. To avoid the freeze_process()-refrigerator() race we can make freeze_process() to always check the task's PF_FROZEN flag after it's read its "freeze" flag. We should also make sure that refrigerator() will always reset the task's "freeze" flag after it's set PF_FROZEN for it. Signed-off-by: Rafael J. Wysocki Acked-by: Pavel Machek Cc: Russell King Cc: David Howells Cc: Andi Kleen Cc: "Luck, Tony" Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Paul Mundt Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-arm/thread_info.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index d9b8bddc873..5014794f9eb 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -147,6 +147,7 @@ extern void iwmmxt_task_switch(struct thread_info *); #define TIF_POLLING_NRFLAG 16 #define TIF_USING_IWMMXT 17 #define TIF_MEMDIE 18 +#define TIF_FREEZE 19 #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) @@ -154,6 +155,7 @@ extern void iwmmxt_task_switch(struct thread_info *); #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) #define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) +#define _TIF_FREEZE (1 << TIF_FREEZE) /* * Change these and you break ASM code in entry-common.S -- cgit v1.2.3 From ec8c0446b6e2b67b5c8813eb517f4bf00efa99a9 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 12 Dec 2006 17:14:57 +0000 Subject: [PATCH] Optimize D-cache alias handling on fork Virtually index, physically tagged cache architectures can get away without cache flushing when forking. This patch adds a new cache flushing function flush_cache_dup_mm(struct mm_struct *) which for the moment I've implemented to do the same thing on all architectures except on MIPS where it's a no-op. Signed-off-by: Ralf Baechle Signed-off-by: Linus Torvalds --- include/asm-arm/cacheflush.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index f0845646aac..378a3a2ce8d 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -319,6 +319,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, unsigned long len, int write); #endif +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) + /* * flush_cache_user_range is used when we want to ensure that the * Harvard caches are synchronised for the user space address range. -- cgit v1.2.3 From 02828845dda5ccf921ab2557c6ca17b6e7fc70e2 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Wed, 13 Dec 2006 18:39:26 +0100 Subject: [ARM] 4016/1: prefetch macro is wrong wrt gcc's "delete-null-pointer-checks" optimization The gcc manual says: |`-fdelete-null-pointer-checks' | Use global dataflow analysis to identify and eliminate useless | checks for null pointers. The compiler assumes that dereferencing | a null pointer would have halted the program. If a pointer is | checked after it has already been dereferenced, it cannot be null. | Enabled at levels `-O2', `-O3', `-Os'. Now the problem can be seen with this test case: #include extern void bar(char *x); void foo(char *x) { prefetch(x); if (x) bar(x); } Because the constraint to the inline asm used in the prefetch() macro is a memory operand, gcc assumes that the asm code does dereference the pointer and the delete-null-pointer-checks optimization kicks in. Inspection of generated assembly for the above example shows that bar() is indeed called unconditionally without any test on the value of x. Of course in the prefetch case there is no real dereference and it cannot be assumed that a null pointer would have been caught at that point. This causes kernel oopses with constructs like hlist_for_each_entry() where the list's 'next' content is prefetched before the pointer is tested against NULL, and only when gcc feels like applying this optimization which doesn't happen all the time with more complex code. It appears that the way to prevent delete-null-pointer-checks optimization to occur in this case is to make prefetch() into a static inline function instead of a macro. At least this is what is done on x86_64 where a similar inline asm memory operand is used (I presume they would have seen the same problem if it didn't work) and resulting code for the above example confirms that. An alternative would consist of replacing the memory operand by a register operand containing the pointer, and use the addressing mode explicitly in the asm template. But that would be less optimal than an offsettable memory reference. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/processor.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h index b442e8e2a80..1bbf16182d6 100644 --- a/include/asm-arm/processor.h +++ b/include/asm-arm/processor.h @@ -103,14 +103,14 @@ extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); #if __LINUX_ARM_ARCH__ >= 5 #define ARCH_HAS_PREFETCH -#define prefetch(ptr) \ - ({ \ - __asm__ __volatile__( \ - "pld\t%0" \ - : \ - : "o" (*(char *)(ptr)) \ - : "cc"); \ - }) +static inline void prefetch(const void *ptr) +{ + __asm__ __volatile__( + "pld\t%0" + : + : "o" (*(char *)ptr) + : "cc"); +} #define ARCH_HAS_PREFETCHW #define prefetchw(ptr) prefetch(ptr) -- cgit v1.2.3 From 47fd705287e9377acd2a4cee9aeeea02867d2e54 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 13 Dec 2006 18:33:53 +0000 Subject: [ARM] Provide a method to alter the control register i.MX needs to tweak the control register to support CPU frequency scaling. Rather than have folk blindly try and change the control register by writing to it and then wondering why it doesn't work, provide a method (which is safe for UP only, and therefore only available for UP) to achieve this. Signed-off-by: Russell King --- include/asm-arm/system.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index f60faccf01f..e160aeb0138 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -173,6 +173,26 @@ static inline void set_copro_access(unsigned int val) extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ extern unsigned long cr_alignment; /* defined in entry-armv.S */ +#ifndef CONFIG_SMP +static inline void adjust_cr(unsigned long mask, unsigned long set) +{ + unsigned long flags, cr; + + mask &= ~CR_A; + + set &= mask; + + local_irq_save(flags); + + cr_no_alignment = (cr_no_alignment & ~mask) | set; + cr_alignment = (cr_alignment & ~mask) | set; + + set_cr((get_cr() & ~mask) | set); + + local_irq_restore(flags); +} +#endif + #define UDBG_UNDEFINED (1 << 0) #define UDBG_SYSCALL (1 << 1) #define UDBG_BADABORT (1 << 2) -- cgit v1.2.3 From 3c8cd0cce9ab8a25dbcf519cb0de00d2716f8379 Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Wed, 6 Dec 2006 17:25:04 +0100 Subject: [ARM] 3992/1: i.MX/MX1 CPU Frequency scaling support Support to change MX1 CPU frequency at runtime. Tested on PiKRON's PiMX1 board and seems to be fully stable up to 200 MHz end even as low as 8 MHz. Signed-off-by: Pavel Pisa Signed-off-by: Russell King --- include/asm-arm/arch-imx/imx-regs.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h index a6912b3d867..e56a4e247d6 100644 --- a/include/asm-arm/arch-imx/imx-regs.h +++ b/include/asm-arm/arch-imx/imx-regs.h @@ -41,7 +41,13 @@ /* PLL registers */ #define CSCR __REG(IMX_PLL_BASE) /* Clock Source Control Register */ -#define CSCR_SYSTEM_SEL (1<<16) +#define CSCR_SPLL_RESTART (1<<22) +#define CSCR_MPLL_RESTART (1<<21) +#define CSCR_SYSTEM_SEL (1<<16) +#define CSCR_BCLK_DIV (0xf<<10) +#define CSCR_MPU_PRESC (1<<15) +#define CSCR_SPEN (1<<1) +#define CSCR_MPEN (1<<0) #define MPCTL0 __REG(IMX_PLL_BASE + 0x4) /* MCU PLL Control Register 0 */ #define MPCTL1 __REG(IMX_PLL_BASE + 0x8) /* MCU PLL and System Clock Register 1 */ @@ -49,8 +55,6 @@ #define SPCTL1 __REG(IMX_PLL_BASE + 0x10) /* System PLL Control Register 1 */ #define PCDR __REG(IMX_PLL_BASE + 0x20) /* Peripheral Clock Divider Register */ -#define CSCR_MPLL_RESTART (1<<21) - /* * GPIO Module and I/O Multiplexer * x = 0..3 for reg_A, reg_B, reg_C, reg_D -- cgit v1.2.3 From 5a059f1ac0ed0c937257027aed5da50241f5ec2b Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 Dec 2006 18:23:10 +0000 Subject: [ARM] Add more syscalls Add: sys_unshare sys_set_robust_list sys_get_robust_list sys_splice sys_arm_sync_file_range sys_tee sys_vmsplice sys_move_pages sys_getcpu Special note about sys_arm_sync_file_range(), which is implemented as: asmlinkage long sys_arm_sync_file_range(int fd, unsigned int flags, loff_t offset, loff_t nbytes) { return sys_sync_file_range(fd, offset, nbytes, flags); } We can't export sys_sync_file_range() directly on ARM because the argument list someone picked does not fit in the available registers. Would be nice if... there was an arch maintainer review mechanism for new syscalls before they hit the kernel. Signed-off-by: Russell King --- include/asm-arm/unistd.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 32b06eb5281..97e7060000c 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -360,6 +360,18 @@ #define __NR_readlinkat (__NR_SYSCALL_BASE+332) #define __NR_fchmodat (__NR_SYSCALL_BASE+333) #define __NR_faccessat (__NR_SYSCALL_BASE+334) + /* 335 for pselect6 */ + /* 336 for ppoll */ +#define __NR_unshare (__NR_SYSCALL_BASE+337) +#define __NR_set_robust_list (__NR_SYSCALL_BASE+338) +#define __NR_get_robust_list (__NR_SYSCALL_BASE+339) +#define __NR_splice (__NR_SYSCALL_BASE+340) +#define __NR_arm_sync_file_range (__NR_SYSCALL_BASE+341) +#define __NR_tee (__NR_SYSCALL_BASE+342) +#define __NR_vmsplice (__NR_SYSCALL_BASE+343) +#define __NR_move_pages (__NR_SYSCALL_BASE+344) +#define __NR_getcpu (__NR_SYSCALL_BASE+345) + /* 346 for epoll_pwait */ /* * The following SWIs are ARM private. -- cgit v1.2.3 From f056076ea727f7c291daf17da4ae25af474f0c67 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 Dec 2006 19:59:20 +0100 Subject: [ARM] 4038/1: S3C24XX: Fix copyrights in include/asm-arm/arch-s3c2410 (core) Fix copyright notices in include/asm-arm/arch-s3c2410 to actually have `Copyright` in the line. This patch deals with all the core files. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/audio.h | 2 +- include/asm-arm/arch-s3c2410/hardware.h | 4 ++-- include/asm-arm/arch-s3c2410/iic.h | 2 +- include/asm-arm/arch-s3c2410/leds-gpio.h | 2 +- include/asm-arm/arch-s3c2410/map.h | 4 ++-- include/asm-arm/arch-s3c2410/nand.h | 4 ++-- include/asm-arm/arch-s3c2410/system.h | 4 ++-- include/asm-arm/arch-s3c2410/timex.h | 4 ++-- include/asm-arm/arch-s3c2410/uncompress.h | 4 ++-- include/asm-arm/arch-s3c2410/usb-control.h | 4 ++-- 10 files changed, 17 insertions(+), 17 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/audio.h b/include/asm-arm/arch-s3c2410/audio.h index 7e0222276c9..65e0acffa1a 100644 --- a/include/asm-arm/arch-s3c2410/audio.h +++ b/include/asm-arm/arch-s3c2410/audio.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/audio.h * - * (c) 2004-2005 Simtec Electronics + * Copyright (c) 2004-2005 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ * Ben Dooks * diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 871f8af09b8..729565e5cdf 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/hardware.h * - * (c) 2003 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks * * S3C2410 - hardware * diff --git a/include/asm-arm/arch-s3c2410/iic.h b/include/asm-arm/arch-s3c2410/iic.h index ed3d6c7bf6d..71211c8b538 100644 --- a/include/asm-arm/arch-s3c2410/iic.h +++ b/include/asm-arm/arch-s3c2410/iic.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/iic.h * - * (c) 2004 Simtec Electronics + * Copyright (c) 2004 Simtec Electronics * Ben Dooks * * S3C2410 - I2C Controller platfrom_device info diff --git a/include/asm-arm/arch-s3c2410/leds-gpio.h b/include/asm-arm/arch-s3c2410/leds-gpio.h index f07ed040622..800846ebddb 100644 --- a/include/asm-arm/arch-s3c2410/leds-gpio.h +++ b/include/asm-arm/arch-s3c2410/leds-gpio.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/leds-gpio.h * - * (c) 2006 Simtec Electronics + * Copyright (c) 2006 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks * diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h index 7895042d176..4ef4eebf42b 100644 --- a/include/asm-arm/arch-s3c2410/map.h +++ b/include/asm-arm/arch-s3c2410/map.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/map.h * - * (c) 2003 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks * * S3C2410 - Memory map definitions * diff --git a/include/asm-arm/arch-s3c2410/nand.h b/include/asm-arm/arch-s3c2410/nand.h index e350ae2acfc..8816f7f9cee 100644 --- a/include/asm-arm/arch-s3c2410/nand.h +++ b/include/asm-arm/arch-s3c2410/nand.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/nand.h * - * (c) 2004 Simtec Electronics - * Ben Dooks + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks * * S3C2410 - NAND device controller platfrom_device info * diff --git a/include/asm-arm/arch-s3c2410/system.h b/include/asm-arm/arch-s3c2410/system.h index 4f72a853a5c..ecf250db45f 100644 --- a/include/asm-arm/arch-s3c2410/system.h +++ b/include/asm-arm/arch-s3c2410/system.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/system.h * - * (c) 2003 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks * * S3C2410 - System function defines and includes * diff --git a/include/asm-arm/arch-s3c2410/timex.h b/include/asm-arm/arch-s3c2410/timex.h index 703c337c561..c16a99c5a59 100644 --- a/include/asm-arm/arch-s3c2410/timex.h +++ b/include/asm-arm/arch-s3c2410/timex.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/timex.h * - * (c) 2003-2005 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks * * S3C2410 - time parameters * diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h index 81b3e91c56a..69551ffb4f8 100644 --- a/include/asm-arm/arch-s3c2410/uncompress.h +++ b/include/asm-arm/arch-s3c2410/uncompress.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/uncompress.h * - * (c) 2003 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks * * S3C2410 - uncompress code * diff --git a/include/asm-arm/arch-s3c2410/usb-control.h b/include/asm-arm/arch-s3c2410/usb-control.h index 35723569a17..5bfa376e33d 100644 --- a/include/asm-arm/arch-s3c2410/usb-control.h +++ b/include/asm-arm/arch-s3c2410/usb-control.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/usb-control.h * - * (c) 2004 Simtec Electronics - * Ben Dooks + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks * * S3C2410 - usb port information * -- cgit v1.2.3 From 9d6be125ba8b7cd3af4832094bf3643e09d6e39b Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 Dec 2006 20:02:01 +0100 Subject: [ARM] 4039/1: S3C24XX: Fix copyrights in include/asm-arm/arch-s3c2410 (mach) Fix copyright notices in include/asm-arm/arch-s3c2410 to actually have `Copyright` in the line. This patch deals with all the core files. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/anubis-cpld.h | 2 +- include/asm-arm/arch-s3c2410/anubis-irq.h | 2 +- include/asm-arm/arch-s3c2410/anubis-map.h | 2 +- include/asm-arm/arch-s3c2410/bast-cpld.h | 4 ++-- include/asm-arm/arch-s3c2410/bast-irq.h | 4 ++-- include/asm-arm/arch-s3c2410/bast-map.h | 4 ++-- include/asm-arm/arch-s3c2410/bast-pmu.h | 2 +- include/asm-arm/arch-s3c2410/h1940-latch.h | 2 +- include/asm-arm/arch-s3c2410/osiris-cpld.h | 2 +- include/asm-arm/arch-s3c2410/vr1000-cpld.h | 4 ++-- include/asm-arm/arch-s3c2410/vr1000-irq.h | 4 ++-- include/asm-arm/arch-s3c2410/vr1000-map.h | 4 ++-- 12 files changed, 18 insertions(+), 18 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h index 40e8e270d33..dcebf6d6190 100644 --- a/include/asm-arm/arch-s3c2410/anubis-cpld.h +++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/anubis-cpld.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks * diff --git a/include/asm-arm/arch-s3c2410/anubis-irq.h b/include/asm-arm/arch-s3c2410/anubis-irq.h index 4b5f423779d..cd77a70d45c 100644 --- a/include/asm-arm/arch-s3c2410/anubis-irq.h +++ b/include/asm-arm/arch-s3c2410/anubis-irq.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/anubis-irq.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks * diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h index 058a2104b03..ab076de4a0d 100644 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ b/include/asm-arm/arch-s3c2410/anubis-map.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/anubis-map.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks * diff --git a/include/asm-arm/arch-s3c2410/bast-cpld.h b/include/asm-arm/arch-s3c2410/bast-cpld.h index 8969cffe83f..034d2c5a47c 100644 --- a/include/asm-arm/arch-s3c2410/bast-cpld.h +++ b/include/asm-arm/arch-s3c2410/bast-cpld.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/bast-cpld.h * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks * * BAST - CPLD control constants * diff --git a/include/asm-arm/arch-s3c2410/bast-irq.h b/include/asm-arm/arch-s3c2410/bast-irq.h index 15ffa66f501..726c0466f85 100644 --- a/include/asm-arm/arch-s3c2410/bast-irq.h +++ b/include/asm-arm/arch-s3c2410/bast-irq.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/bast-irq.h * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks * * Machine BAST - IRQ Number definitions * diff --git a/include/asm-arm/arch-s3c2410/bast-map.h b/include/asm-arm/arch-s3c2410/bast-map.h index 727cef84c70..86ac1c108db 100644 --- a/include/asm-arm/arch-s3c2410/bast-map.h +++ b/include/asm-arm/arch-s3c2410/bast-map.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/bast-map.h * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks * * Machine BAST - Memory map definitions * diff --git a/include/asm-arm/arch-s3c2410/bast-pmu.h b/include/asm-arm/arch-s3c2410/bast-pmu.h index 82836027f00..37a11fe54a7 100644 --- a/include/asm-arm/arch-s3c2410/bast-pmu.h +++ b/include/asm-arm/arch-s3c2410/bast-pmu.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/bast-pmu.h * - * (c) 2003,2004 Simtec Electronics + * Copyright (c) 2003,2004 Simtec Electronics * Ben Dooks * Vincent Sanders * diff --git a/include/asm-arm/arch-s3c2410/h1940-latch.h b/include/asm-arm/arch-s3c2410/h1940-latch.h index c5802411f43..22a7efd358f 100644 --- a/include/asm-arm/arch-s3c2410/h1940-latch.h +++ b/include/asm-arm/arch-s3c2410/h1940-latch.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/h1940-latch.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks * diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h index e9d1ae1f354..3b6498468d6 100644 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h * - * (c) 2005 Simtec Electronics + * Copyright (c) 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks * diff --git a/include/asm-arm/arch-s3c2410/vr1000-cpld.h b/include/asm-arm/arch-s3c2410/vr1000-cpld.h index a341b1e1bd9..0557b0a5ab1 100644 --- a/include/asm-arm/arch-s3c2410/vr1000-cpld.h +++ b/include/asm-arm/arch-s3c2410/vr1000-cpld.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/vr1000-cpld.h * - * (c) 2003 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks * * VR1000 - CPLD control constants * diff --git a/include/asm-arm/arch-s3c2410/vr1000-irq.h b/include/asm-arm/arch-s3c2410/vr1000-irq.h index c39a0ffa670..890937083c6 100644 --- a/include/asm-arm/arch-s3c2410/vr1000-irq.h +++ b/include/asm-arm/arch-s3c2410/vr1000-irq.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/vr1000-irq.h * - * (c) 2003,2004 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks * * Machine VR1000 - IRQ Number definitions * diff --git a/include/asm-arm/arch-s3c2410/vr1000-map.h b/include/asm-arm/arch-s3c2410/vr1000-map.h index 1fe4db36c83..92a56a724a8 100644 --- a/include/asm-arm/arch-s3c2410/vr1000-map.h +++ b/include/asm-arm/arch-s3c2410/vr1000-map.h @@ -1,7 +1,7 @@ /* linux/include/asm-arm/arch-s3c2410/vr1000-map.h * - * (c) 2003-2005 Simtec Electronics - * Ben Dooks + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks * * Machine VR1000 - Memory map definitions * -- cgit v1.2.3 From cdcb38352b6cf97241d4c3969f93f792026d18cc Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 Dec 2006 20:15:13 +0100 Subject: [ARM] 4041/1: S3C24XX: Fix sparse errors from VA addresses Fix address-space conversion errors from passing addresses generated from include/asm-arm/arch-s3c2410/map.h by adding an __force argument to the `void __iomem *` for all the virtual addresses. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/map.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h index 4ef4eebf42b..6746114e1a2 100644 --- a/include/asm-arm/arch-s3c2410/map.h +++ b/include/asm-arm/arch-s3c2410/map.h @@ -25,7 +25,7 @@ */ #ifndef __ASSEMBLY__ -#define S3C2410_ADDR(x) ((void __iomem *)0xF0000000 + (x)) +#define S3C2410_ADDR(x) ((void __iomem __force *)0xF0000000 + (x)) #else #define S3C2410_ADDR(x) (0xF0000000 + (x)) #endif -- cgit v1.2.3 From 2d8c1cef84dcba462e1806c1223aecd97df33f99 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 Dec 2006 20:18:40 +0100 Subject: [ARM] 4042/1: H1940: Fix sparse errors from VA addresses Fix address-space conversion errors from passing addresses generated from include/asm-arm/arch-s3c2410/map.h by adding an __force argument to the `void __iomem *` for all the virtual addresses. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/h1940-latch.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/h1940-latch.h b/include/asm-arm/arch-s3c2410/h1940-latch.h index 22a7efd358f..c3de5ab102e 100644 --- a/include/asm-arm/arch-s3c2410/h1940-latch.h +++ b/include/asm-arm/arch-s3c2410/h1940-latch.h @@ -16,7 +16,7 @@ #ifndef __ASSEMBLY__ -#define H1940_LATCH ((void __iomem *)0xF8000000) +#define H1940_LATCH ((void __force __iomem *)0xF8000000) #else #define H1940_LATCH 0xF8000000 #endif -- cgit v1.2.3 From 58d19d6ea608077e83c30e58ae1494246b1f6b82 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 Dec 2006 20:50:55 +0100 Subject: [ARM] 4045/1: S3C24XX: remove old VA for non-shared areas Remove old (and non-shared) VA addresses from the mappings in arch/arm/mach-s3c2410/map.h and anywhere they are being mapped in arch/arm/mach-s3c2410 Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/map.h | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h index 6746114e1a2..4505aefbad1 100644 --- a/include/asm-arm/arch-s3c2410/map.h +++ b/include/asm-arm/arch-s3c2410/map.h @@ -47,73 +47,65 @@ #define S3C24XX_SZ_MEMCTRL SZ_1M /* USB host controller */ -#define S3C24XX_VA_USBHOST S3C2410_ADDR(0x00200000) #define S3C2400_PA_USBHOST (0x14200000) #define S3C2410_PA_USBHOST (0x49000000) #define S3C24XX_SZ_USBHOST SZ_1M /* DMA controller */ -#define S3C24XX_VA_DMA S3C2410_ADDR(0x00300000) #define S3C2400_PA_DMA (0x14600000) #define S3C2410_PA_DMA (0x4B000000) #define S3C24XX_SZ_DMA SZ_1M /* Clock and Power management */ -#define S3C24XX_VA_CLKPWR S3C2410_ADDR(0x00400000) +#define S3C24XX_VA_CLKPWR S3C2410_ADDR(0x00200000) #define S3C2400_PA_CLKPWR (0x14800000) #define S3C2410_PA_CLKPWR (0x4C000000) #define S3C24XX_SZ_CLKPWR SZ_1M /* LCD controller */ -#define S3C24XX_VA_LCD S3C2410_ADDR(0x00600000) +#define S3C24XX_VA_LCD S3C2410_ADDR(0x00300000) #define S3C2400_PA_LCD (0x14A00000) #define S3C2410_PA_LCD (0x4D000000) #define S3C24XX_SZ_LCD SZ_1M /* NAND flash controller */ -#define S3C24XX_VA_NAND S3C2410_ADDR(0x00700000) #define S3C2410_PA_NAND (0x4E000000) #define S3C24XX_SZ_NAND SZ_1M /* MMC controller - available on the S3C2400 */ -#define S3C2400_VA_MMC S3C2400_ADDR(0x00700000) #define S3C2400_PA_MMC (0x15A00000) #define S3C2400_SZ_MMC SZ_1M /* UARTs */ -#define S3C24XX_VA_UART S3C2410_ADDR(0x00800000) +#define S3C24XX_VA_UART S3C2410_ADDR(0x00400000) #define S3C2400_PA_UART (0x15000000) #define S3C2410_PA_UART (0x50000000) #define S3C24XX_SZ_UART SZ_1M /* Timers */ -#define S3C24XX_VA_TIMER S3C2410_ADDR(0x00900000) +#define S3C24XX_VA_TIMER S3C2410_ADDR(0x00500000) #define S3C2400_PA_TIMER (0x15100000) #define S3C2410_PA_TIMER (0x51000000) #define S3C24XX_SZ_TIMER SZ_1M /* USB Device port */ -#define S3C24XX_VA_USBDEV S3C2410_ADDR(0x00A00000) +#define S3C24XX_VA_USBDEV S3C2410_ADDR(0x00600000) #define S3C2400_PA_USBDEV (0x15200140) #define S3C2410_PA_USBDEV (0x52000000) #define S3C24XX_SZ_USBDEV SZ_1M /* Watchdog */ -#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00B00000) +#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00700000) #define S3C2400_PA_WATCHDOG (0x15300000) #define S3C2410_PA_WATCHDOG (0x53000000) #define S3C24XX_SZ_WATCHDOG SZ_1M /* IIC hardware controller */ -#define S3C24XX_VA_IIC S3C2410_ADDR(0x00C00000) #define S3C2400_PA_IIC (0x15400000) #define S3C2410_PA_IIC (0x54000000) #define S3C24XX_SZ_IIC SZ_1M -#define VA_IIC_BASE (S3C24XX_VA_IIC) - /* IIS controller */ -#define S3C24XX_VA_IIS S3C2410_ADDR(0x00D00000) #define S3C2400_PA_IIS (0x15508000) #define S3C2410_PA_IIS (0x55000000) #define S3C24XX_SZ_IIS SZ_1M @@ -134,25 +126,21 @@ #define S3C24XX_SZ_GPIO SZ_1M /* RTC */ -#define S3C24XX_VA_RTC S3C2410_ADDR(0x00F00000) #define S3C2400_PA_RTC (0x15700040) #define S3C2410_PA_RTC (0x57000000) #define S3C24XX_SZ_RTC SZ_1M /* ADC */ -#define S3C24XX_VA_ADC S3C2410_ADDR(0x01000000) #define S3C2400_PA_ADC (0x15800000) #define S3C2410_PA_ADC (0x58000000) #define S3C24XX_SZ_ADC SZ_1M /* SPI */ -#define S3C24XX_VA_SPI S3C2410_ADDR(0x01100000) #define S3C2400_PA_SPI (0x15900000) #define S3C2410_PA_SPI (0x59000000) #define S3C24XX_SZ_SPI SZ_1M /* SDI */ -#define S3C24XX_VA_SDI S3C2410_ADDR(0x01200000) #define S3C2410_PA_SDI (0x5A000000) #define S3C24XX_SZ_SDI SZ_1M -- cgit v1.2.3 From b6d1f542e3f44f8988b601e3ca6277c143282179 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 Dec 2006 23:22:26 +0100 Subject: [ARM] 4049/1: S3C24XX: fix sparse warning due to upf_t in regs-serial.h Change the include/asm-arm/arch-s3c2410/regs-serial.h platform data to use the prorper type (upf_t) for the uart_flags. Fix all the other parts of arch/arm/mach-s3c2410 to include and all other uses of the include file. mach-rx3715.c:101:18: warning: incorrect type in initializer (different base types) mach-rx3715.c:101:18: expected unsigned long [unsigned] uart_flags mach-rx3715.c:101:18: got restricted unsigned int [usertype] [force] Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-serial.h | 2 +- include/asm-arm/arch-s3c2410/uncompress.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/regs-serial.h b/include/asm-arm/arch-s3c2410/regs-serial.h index 19c77da9c3f..46f52401d13 100644 --- a/include/asm-arm/arch-s3c2410/regs-serial.h +++ b/include/asm-arm/arch-s3c2410/regs-serial.h @@ -197,7 +197,7 @@ struct s3c2410_uartcfg { unsigned char hwport; /* hardware port number */ unsigned char unused; unsigned short flags; - unsigned long uart_flags; /* default uart flags */ + upf_t uart_flags; /* default uart flags */ unsigned long ucon; /* value of ucon for port */ unsigned long ulcon; /* value of ulcon for port */ diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h index 69551ffb4f8..dcb2cef38f5 100644 --- a/include/asm-arm/arch-s3c2410/uncompress.h +++ b/include/asm-arm/arch-s3c2410/uncompress.h @@ -13,6 +13,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H +typedef unsigned int upf_t; /* cannot include linux/serial_core.h */ /* defines for UART registers */ #include "asm/arch/regs-serial.h" -- cgit v1.2.3 From 255d1f8639f5877381545d0da6821079ebad1c21 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 18 Dec 2006 00:12:47 +0000 Subject: [ARM] Fix warnings from asm/system.h Move adjust_cr() into arch/arm/mm/mmu.c, and move irqflags.h to a more appropriate place in the header file. Signed-off-by: Russell King --- include/asm-arm/system.h | 33 ++++++++------------------------- 1 file changed, 8 insertions(+), 25 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index e160aeb0138..aa223fc546a 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -73,6 +73,7 @@ #ifndef __ASSEMBLY__ #include +#include struct thread_info; struct task_struct; @@ -139,6 +140,9 @@ static inline int cpu_is_xsc3(void) #define cpu_is_xscale() 1 #endif +extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ +extern unsigned long cr_alignment; /* defined in entry-armv.S */ + static inline unsigned int get_cr(void) { unsigned int val; @@ -152,6 +156,10 @@ static inline void set_cr(unsigned int val) : : "r" (val) : "cc"); } +#ifndef CONFIG_SMP +extern void adjust_cr(unsigned long mask, unsigned long set); +#endif + #define CPACC_FULL(n) (3 << (n * 2)) #define CPACC_SVC(n) (1 << (n * 2)) #define CPACC_DISABLE(n) (0 << (n * 2)) @@ -170,29 +178,6 @@ static inline void set_copro_access(unsigned int val) : : "r" (val) : "cc"); } -extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ -extern unsigned long cr_alignment; /* defined in entry-armv.S */ - -#ifndef CONFIG_SMP -static inline void adjust_cr(unsigned long mask, unsigned long set) -{ - unsigned long flags, cr; - - mask &= ~CR_A; - - set &= mask; - - local_irq_save(flags); - - cr_no_alignment = (cr_no_alignment & ~mask) | set; - cr_alignment = (cr_alignment & ~mask) | set; - - set_cr((get_cr() & ~mask) | set); - - local_irq_restore(flags); -} -#endif - #define UDBG_UNDEFINED (1 << 0) #define UDBG_SYSCALL (1 << 1) #define UDBG_BADABORT (1 << 2) @@ -248,8 +233,6 @@ static inline void sched_cacheflush(void) { } -#include - #ifdef CONFIG_SMP #define smp_mb() mb() -- cgit v1.2.3 From 99e4a6dda9dc4b863773c0a5857b762474b817cf Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Mon, 18 Dec 2006 00:59:10 +0100 Subject: [ARM] 4054/1: ep93xx: add HWCAP_CRUNCH Add HWCAP_CRUNCH so that the dynamic linker knows whether it can use Crunch-optimised libraries or not. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/elf.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h index 642382d2c9f..3679a8a8922 100644 --- a/include/asm-arm/elf.h +++ b/include/asm-arm/elf.h @@ -52,6 +52,7 @@ typedef struct user_fp elf_fpregset_t; #define HWCAP_EDSP 128 #define HWCAP_JAVA 256 #define HWCAP_IWMMXT 512 +#define HWCAP_CRUNCH 1024 #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -- cgit v1.2.3 From 6d2e857d02a59332b7cd89aeac8b5962a357ac7a Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Mon, 18 Dec 2006 01:01:08 +0100 Subject: [ARM] 4055/1: iop13xx: fix phys_io/io_pg_offst for iq81340mc/sc The phys_io/io_pg_offst machine record variables were being set to bogus values, causing problems when enabling DEBUG_LL. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-iop13xx/iq81340.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-iop13xx/iq81340.h b/include/asm-arm/arch-iop13xx/iq81340.h index b98f8f109c2..ba2cf931e9c 100644 --- a/include/asm-arm/arch-iop13xx/iq81340.h +++ b/include/asm-arm/arch-iop13xx/iq81340.h @@ -24,8 +24,5 @@ #define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH) #define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1) -/* These are the values used in the Machine description */ -#define PHYS_IO 0xfeffff00 -#define IO_PG_OFFSET 0xffffff00 -#define BOOT_PARAM_OFFSET 0x00000100 + #endif /* _IQ81340_H_ */ -- cgit v1.2.3 From c041ffb36407897bbc3b7bf87d1fa856ce085cdf Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Mon, 18 Dec 2006 01:04:09 +0100 Subject: [ARM] 4057/1: ixp23xx: unconditionally enable hardware coherency On ixp23xx, it was thought to be necessary to disable coherency to work around certain silicon errata. This turns out not to be the case -- none of the documented errata workarounds require disabling coherency, and disabling coherency does not work around any existing errata. Furthermore, all ixp23xx models do support coherency, so we should just unconditionally enable coherency for all ixp23xx. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ixp23xx/memory.h | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h index c85fc06a043..6d859d742d7 100644 --- a/include/asm-arm/arch-ixp23xx/memory.h +++ b/include/asm-arm/arch-ixp23xx/memory.h @@ -41,21 +41,7 @@ data = *((volatile int *)IXP23XX_PCI_SDRAM_BAR); \ __phys_to_virt((((b - (data & 0xfffffff0)) + 0x00000000))); }) -/* - * Coherency support. Only supported on A2 CPUs or on A1 - * systems that have the cache coherency workaround. - */ -static inline int __ixp23xx_arch_is_coherent(void) -{ - extern unsigned int processor_id; - - if (((processor_id & 15) >= 4) || machine_is_roadrunner()) - return 1; - - return 0; -} - -#define arch_is_coherent() __ixp23xx_arch_is_coherent() +#define arch_is_coherent() 1 #endif -- cgit v1.2.3 From 2ca2c570b0e38b0c214426b1708ee1b0c3a5067d Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 22 Dec 2006 14:33:18 +0100 Subject: [ARM] 4063/1: ep93xx: fix IRQ_EP93XX_GPIO?MUX numbering Fix incorrect IRQ numbering in arch-ep93xx/irqs.h (source: Applied Data Systems 2.6.17 kernel tree.) Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ep93xx/irqs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h index 9a42f5de9e5..ae532e304bf 100644 --- a/include/asm-arm/arch-ep93xx/irqs.h +++ b/include/asm-arm/arch-ep93xx/irqs.h @@ -22,9 +22,9 @@ #define IRQ_EP93XX_DMAM2P9 16 #define IRQ_EP93XX_DMAM2M0 17 #define IRQ_EP93XX_DMAM2M1 18 -#define IRQ_EP93XX_GPIO0MUX 20 -#define IRQ_EP93XX_GPIO1MUX 21 -#define IRQ_EP93XX_GPIO2MUX 22 +#define IRQ_EP93XX_GPIO0MUX 19 +#define IRQ_EP93XX_GPIO1MUX 20 +#define IRQ_EP93XX_GPIO2MUX 21 #define IRQ_EP93XX_GPIO3MUX 22 #define IRQ_EP93XX_UART1RX 23 #define IRQ_EP93XX_UART1TX 24 -- cgit v1.2.3 From 431d2cd99f9721ad09f859dc65895f30385cc5c6 Mon Sep 17 00:00:00 2001 From: Arnaud Patard Date: Wed, 27 Dec 2006 22:56:44 +0100 Subject: [ARM] 4073/1: Prevent s3c24xx drivers from including asm/arch/hardware.h and asm/arch/irqs.h As reminded in http://lkml.org/lkml/2006/12/23/26, one should use asm/hardware.h and asm/irq.h but absent-minded devs like me tends to use asm/arch/hardware.h and/or asm/arch/irqs.h. This patch aims at preventing such things. In order to make it work, I had to modify asm-arm/irq.h too so that it can be included from assembly files. Also, as a side effect, I had to modify some headers who were using the asm/arch/hardware.h or asm/arch/irqs.h. Signed-off-by: Arnaud Patard Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/dma.h | 2 +- include/asm-arm/arch-s3c2410/entry-macro.S | 2 +- include/asm-arm/arch-s3c2410/hardware.h | 4 ++++ include/asm-arm/arch-s3c2410/irqs.h | 3 +++ include/asm-arm/irq.h | 5 ++++- 5 files changed, 13 insertions(+), 3 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 7ac22483697..58ffa7ba3c8 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -14,7 +14,7 @@ #define __ASM_ARCH_DMA_H __FILE__ #include -#include "hardware.h" +#include /* * This is the maximum DMA address(physical address) that can be DMAd to. diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S index e09a6b8ec15..1eb4e6b8d24 100644 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ b/include/asm-arm/arch-s3c2410/entry-macro.S @@ -20,7 +20,7 @@ #define INTOFFSET (0x14) #include -#include +#include .macro get_irqnr_and_base, irqnr, irqstat, base, tmp diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 729565e5cdf..6dadf58ff98 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -13,6 +13,10 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H +#ifndef __ASM_HARDWARE_H +#error "Do not include this directly, instead #include " +#endif + #ifndef __ASSEMBLY__ /* external functions for GPIO support diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h index 39a69829d16..4b7cff456c4 100644 --- a/include/asm-arm/arch-s3c2410/irqs.h +++ b/include/asm-arm/arch-s3c2410/irqs.h @@ -12,6 +12,9 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H __FILE__ +#ifndef __ASM_ARM_IRQ_H +#error "Do not include this directly, instead #include " +#endif /* we keep the first set of CPU IRQs out of the range of * the ISA space, so that the PC104 has them to itself diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index 283af50a16c..1b882a255e3 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -19,7 +19,6 @@ #define NO_IRQ ((unsigned int)(-1)) #endif -struct irqaction; /* * Migration helpers @@ -37,6 +36,10 @@ struct irqaction; #define IRQT_HIGH (__IRQT_HIGHLVL) #define IRQT_PROBE IRQ_TYPE_PROBE +#ifndef __ASSEMBLY__ +struct irqaction; extern void migrate_irqs(void); #endif +#endif + -- cgit v1.2.3 From 4cc2f7a84d64d25a16bb9383148c1467284e2356 Mon Sep 17 00:00:00 2001 From: Paul Brook Date: Thu, 28 Dec 2006 01:54:16 +0100 Subject: [ARM] 4074/1: Flat loader stack alignment The ARM EABI requires doubleword (8-byte) stack alignment at all public entry points. The patch below makes the bFLT loader honour this. It's always safe to start with a doubleword aligned stack so it doesn't seem worth making this conditional on CONFIG_AEABI. Paul Signed-off-by: Paul Brook Signed-off-by: Russell King --- include/asm-arm/flat.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h index 96694647858..16f5375e57b 100644 --- a/include/asm-arm/flat.h +++ b/include/asm-arm/flat.h @@ -5,7 +5,9 @@ #ifndef __ARM_FLAT_H__ #define __ARM_FLAT_H__ -#define flat_stack_align(sp) /* nothing needed */ +/* An odd number of words will be pushed after this alignment, so + deliberately misalign the value. */ +#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4) #define flat_argvp_envp_on_stack() 1 #define flat_old_ram_flag(flags) (flags) #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) -- cgit v1.2.3 From b0b1d60a64054697ef828e0565f006cc0f823590 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Fri, 29 Dec 2006 01:30:24 +0100 Subject: [ARM] 4077/1: iop13xx: fix __io() macro Since iop13xx defines the PCI I/O spaces with physical resource addresses the __io macro needs to perform the physical to virtual conversion. I incorrectly assumed that this would be handled by ioremap, but drivers (like e1000) directly dereference the address returned from __io. Signed-off-by: Dan Williams Signed-off-by: Russell King --- include/asm-arm/arch-iop13xx/io.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h index db6de2480a2..5a7bdb52660 100644 --- a/include/asm-arm/arch-iop13xx/io.h +++ b/include/asm-arm/arch-iop13xx/io.h @@ -21,10 +21,11 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) (a) +#define __io(a) __iop13xx_io(a) #define __mem_pci(a) (a) #define __mem_isa(a) (a) +extern void __iomem * __iop13xx_io(unsigned long io_addr); extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size, unsigned long flags); -- cgit v1.2.3 From 1c9d3df5e88ad7db23f5b22f4341c39722a904a4 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Sat, 30 Dec 2006 16:08:50 +0100 Subject: [ARM] 4078/1: Fix ARM copypage cache coherency problems If PG_dcache_dirty is set for a page, we need to flush the source page before performing any copypage operation using a different virtual address. This fixes the copypage implementations for XScale, StrongARM and ARMv6. This patch fixes segmentation faults seen in the dynamic linker under the usage patterns in glibc 2.4/2.5. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 378a3a2ce8d..d51049522cd 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -355,6 +355,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, */ extern void flush_dcache_page(struct page *); +extern void __flush_dcache_page(struct address_space *mapping, struct page *page); + #define flush_dcache_mmap_lock(mapping) \ write_lock_irq(&(mapping)->tree_lock) #define flush_dcache_mmap_unlock(mapping) \ -- cgit v1.2.3 From f566b2b22d89c4785f25e6e4d60163b5ae6251f4 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 2 Jan 2007 20:59:38 +0100 Subject: [ARM] 4080/1: Fix for the SSCR0_SlotsPerFrm macro The SSCR0_SlotsPerFrm macro writes a 3-bit value to bits [2:0], while the correct location of FRDC in SSCR0 is at bits [26:24]. This patch adds the missing "<< 24". Signed-off-by: Philipp Zabel Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 083e03c5639..f8f34505f47 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1626,7 +1626,7 @@ #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ -#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */ +#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ #define SSCR0_ADC (1 << 30) /* Audio clock select */ #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ #endif -- cgit v1.2.3 From d02b161eda65528ad3e89d642e416c265c17ceb8 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 2 Jan 2007 21:06:57 +0100 Subject: [ARM] 4081/1: Add definition for TI Sync Serial Protocol Of the possible SSP frame formats (FRF bits in SSCR0), only SSCR0_PSP is defined. Other possible formats are Motorola SPI (0<<4), TI SSP (1<<4) and Microwire (2<<4). Attached patch adds a definition SSCR0_TISSP. This mode is used for the sound codec attached to the PXA272 SSP1 of some HTC PDA phones. Signed-off-by: Philipp Zabel Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index f8f34505f47..e24f6b6c79a 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1655,6 +1655,7 @@ #define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */ /* extra bits in PXA255, PXA26x and PXA27x SSP ports */ +#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ #define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */ #define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */ #define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */ -- cgit v1.2.3 From 4ac941d2d04ef26a91adf677f3a371818596305d Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Thu, 4 Jan 2007 02:14:49 +0100 Subject: [ARM] 4082/1: iop3xx: fix iop33x gpio register offset iop33x gpio offset is correct in include/asm-arm/arch-iop33x/iop33x.h, but include/asm-arm/hardware/iop3xx.h adds 4. Signed-off-by: Dan Williams Signed-off-by: Russell King --- include/asm-arm/arch-iop32x/iop32x.h | 2 +- include/asm-arm/hardware/iop3xx.h | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h index 4bbd85f3ed2..2e9469047eb 100644 --- a/include/asm-arm/arch-iop32x/iop32x.h +++ b/include/asm-arm/arch-iop32x/iop32x.h @@ -19,7 +19,7 @@ * Peripherals that are shared between the iop32x and iop33x but * located at different addresses. */ -#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg)) +#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg)) #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) #include diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index 1018a7486ab..13ac8a4cd01 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h @@ -168,9 +168,9 @@ extern void gpio_line_set(int line, int value); #define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710) /* General Purpose I/O */ -#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0004) -#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0008) -#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x000c) +#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0000) +#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0004) +#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x0008) /* Timers */ #define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) -- cgit v1.2.3 From 6020dff09252e3670a89edb36baaa4afb9b10d15 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 30 Dec 2006 23:17:40 +0000 Subject: [ARM] Resolve fuse and direct-IO failures due to missing cache flushes fuse does not work on ARM due to cache incoherency issues - fuse wants to use get_user_pages() to copy data from the current process into kernel space. However, since this accesses userspace via the kernel mapping, the kernel mapping can be out of date wrt data written to userspace. This can lead to unpredictable behaviour (in the case of fuse) or data corruption for direct-IO. This resolves debian bug #402876 Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index d51049522cd..5f531ea0305 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -357,6 +357,16 @@ extern void flush_dcache_page(struct page *); extern void __flush_dcache_page(struct address_space *mapping, struct page *page); +#define ARCH_HAS_FLUSH_ANON_PAGE +static inline void flush_anon_page(struct vm_area_struct *vma, + struct page *page, unsigned long vmaddr) +{ + extern void __flush_anon_page(struct vm_area_struct *vma, + struct page *, unsigned long); + if (PageAnon(page)) + __flush_anon_page(vma, page, vmaddr); +} + #define flush_dcache_mmap_lock(mapping) \ write_lock_irq(&(mapping)->tree_lock) #define flush_dcache_mmap_unlock(mapping) \ -- cgit v1.2.3 From 410f4eae4b33631ace70d84470218f3db302afac Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Tue, 9 Jan 2007 08:51:43 +0100 Subject: [ARM] 4085/1: AT91: Header fixes. Fix two typo's where AT01_* was used instead of AT91_*. [Patch from Wojtek Kaniewski] Fix definition of AT91_SMC_EXNWMODE for the SAM9 processors. [Patch from Wu Xuan] Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91rm9200/at91_rstc.h | 2 +- include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h | 2 +- include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | 8 ++++---- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-at91rm9200/at91_rstc.h b/include/asm-arm/arch-at91rm9200/at91_rstc.h index ccdc52da973..237d3c40b31 100644 --- a/include/asm-arm/arch-at91rm9200/at91_rstc.h +++ b/include/asm-arm/arch-at91rm9200/at91_rstc.h @@ -17,7 +17,7 @@ #define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ #define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ #define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ -#define AT01_RSTC_KEY (0xff << 24) /* KEY Password */ +#define AT91_RSTC_KEY (0xff << 24) /* KEY Password */ #define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ #define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ diff --git a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h index 270a5dcdf1c..ab25f9e94d6 100644 --- a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h +++ b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h @@ -15,7 +15,7 @@ #define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT01_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ #define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ #define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ diff --git a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h index 7d94968b5d5..8ac797e39a1 100644 --- a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h +++ b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h @@ -110,10 +110,10 @@ #define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ -#define AT91_SMC_EXNWMODE (3 << 5) /* NWAIT Mode */ -#define AT91_SMC_EXNWMODE_DISABLE (0 << 5) -#define AT91_SMC_EXNWMODE_FROZEN (2 << 5) -#define AT91_SMC_EXNWMODE_READY (3 << 5) +#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ +#define AT91_SMC_EXNWMODE_DISABLE (0 << 4) +#define AT91_SMC_EXNWMODE_FROZEN (2 << 4) +#define AT91_SMC_EXNWMODE_READY (3 << 4) #define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ #define AT91_SMC_BAT_SELECT (0 << 8) #define AT91_SMC_BAT_WRITE (1 << 8) -- cgit v1.2.3 From a14d527306dc7dbc38e4607c3cc3a50a600fc98b Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Tue, 9 Jan 2007 09:03:42 +0100 Subject: [ARM] 4086/1: AT91: Whitespace cleanup A couple of whitespace cleanups, mainly in the AT91 header files. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91rm9200/at91_ecc.h | 8 ++++---- include/asm-arm/arch-at91rm9200/at91_pmc.h | 2 +- include/asm-arm/arch-at91rm9200/at91_rtc.h | 16 ++++++++-------- include/asm-arm/arch-at91rm9200/at91rm9200.h | 2 +- include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h | 2 +- include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h | 4 ++-- include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | 8 ++++---- 7 files changed, 21 insertions(+), 21 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-at91rm9200/at91_ecc.h b/include/asm-arm/arch-at91rm9200/at91_ecc.h index fddf256a98d..5c564ede5c5 100644 --- a/include/asm-arm/arch-at91rm9200/at91_ecc.h +++ b/include/asm-arm/arch-at91rm9200/at91_ecc.h @@ -14,7 +14,7 @@ #define AT91_ECC_H #define AT91_ECC_CR (AT91_ECC + 0x00) /* Control register */ -#define AT91_ECC_RST (1 << 0) /* Reset parity */ +#define AT91_ECC_RST (1 << 0) /* Reset parity */ #define AT91_ECC_MR (AT91_ECC + 0x04) /* Mode register */ #define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */ @@ -23,16 +23,16 @@ #define AT91_ECC_PAGESIZE_2112 (2) #define AT91_ECC_PAGESIZE_4224 (3) -#define AT91_ECC_SR (AT91_ECC + 0x08) /* Status register */ +#define AT91_ECC_SR (AT91_ECC + 0x08) /* Status register */ #define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */ #define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */ #define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */ -#define AT91_ECC_PR (AT91_ECC + 0x0c) /* Parity register */ +#define AT91_ECC_PR (AT91_ECC + 0x0c) /* Parity register */ #define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */ #define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */ -#define AT91_ECC_NPR (AT91_ECC + 0x10) /* NParity register */ +#define AT91_ECC_NPR (AT91_ECC + 0x10) /* NParity register */ #define AT91_ECC_NPARITY (0xffff << 0) /* NParity */ #endif diff --git a/include/asm-arm/arch-at91rm9200/at91_pmc.h b/include/asm-arm/arch-at91rm9200/at91_pmc.h index de8c3da74a0..c3b489d09b6 100644 --- a/include/asm-arm/arch-at91rm9200/at91_pmc.h +++ b/include/asm-arm/arch-at91rm9200/at91_pmc.h @@ -61,7 +61,7 @@ #define AT91_PMC_CSS_PLLA (2 << 0) #define AT91_PMC_CSS_PLLB (3 << 0) #define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ -#define AT91_PMC_PRES_1 (0 << 2) +#define AT91_PMC_PRES_1 (0 << 2) #define AT91_PMC_PRES_2 (1 << 2) #define AT91_PMC_PRES_4 (2 << 2) #define AT91_PMC_PRES_8 (3 << 2) diff --git a/include/asm-arm/arch-at91rm9200/at91_rtc.h b/include/asm-arm/arch-at91rm9200/at91_rtc.h index 6e5065d5626..095fe088310 100644 --- a/include/asm-arm/arch-at91rm9200/at91_rtc.h +++ b/include/asm-arm/arch-at91rm9200/at91_rtc.h @@ -21,21 +21,21 @@ #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ #define AT91_RTC_TIMEVSEL_MINUTE (0 << 8) -#define AT91_RTC_TIMEVSEL_HOUR (1 << 8) -#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) -#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) +#define AT91_RTC_TIMEVSEL_HOUR (1 << 8) +#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) +#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) #define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */ -#define AT91_RTC_CALEVSEL_WEEK (0 << 16) -#define AT91_RTC_CALEVSEL_MONTH (1 << 16) -#define AT91_RTC_CALEVSEL_YEAR (2 << 16) +#define AT91_RTC_CALEVSEL_WEEK (0 << 16) +#define AT91_RTC_CALEVSEL_MONTH (1 << 16) +#define AT91_RTC_CALEVSEL_YEAR (2 << 16) #define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ -#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ +#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ #define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ -#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ +#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ #define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ #define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200.h b/include/asm-arm/arch-at91rm9200/at91rm9200.h index 4d51177efdd..c569b6a21a4 100644 --- a/include/asm-arm/arch-at91rm9200/at91rm9200.h +++ b/include/asm-arm/arch-at91rm9200/at91rm9200.h @@ -274,7 +274,7 @@ #define AT91_PD19_TPK7 (1 << 19) /* B: ETM Trace Packet Port 7 */ #define AT91_PD20_NPCS3 (1 << 20) /* A: SPI Peripheral Chip Select 3 */ #define AT91_PD20_TPK8 (1 << 20) /* B: ETM Trace Packet Port 8 */ -#define AT91_PD21_RTS0 (1 << 21) /* A: USART Ready To Send 0 */ +#define AT91_PD21_RTS0 (1 << 21) /* A: USART Ready To Send 0 */ #define AT91_PD21_TPK9 (1 << 21) /* B: ETM Trace Packet Port 9 */ #define AT91_PD22_RTS1 (1 << 22) /* A: USART Ready To Send 1 */ #define AT91_PD22_TPK10 (1 << 22) /* B: ETM Trace Packet Port 10 */ diff --git a/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h b/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h index 746d973705b..78f6b4917b8 100644 --- a/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h +++ b/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h @@ -58,7 +58,7 @@ #define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ #define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ #define AT91_MATRIX_CS1A_SMC (0 << 1) #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) #define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ diff --git a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h index ab25f9e94d6..ec88efabbe6 100644 --- a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h +++ b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h @@ -43,8 +43,8 @@ #define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ #define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS1A_SMC (0 << 1) +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) #define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ #define AT91_MATRIX_CS3A_SMC (0 << 3) #define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) diff --git a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h index 8ac797e39a1..972e7531c7f 100644 --- a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h +++ b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h @@ -33,14 +33,14 @@ #define AT91_SDRAMC_NC_9 (1 << 0) #define AT91_SDRAMC_NC_10 (2 << 0) #define AT91_SDRAMC_NC_11 (3 << 0) -#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ +#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ #define AT91_SDRAMC_NR_11 (0 << 2) #define AT91_SDRAMC_NR_12 (1 << 2) #define AT91_SDRAMC_NR_13 (2 << 2) -#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ +#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ #define AT91_SDRAMC_NB_2 (0 << 4) -#define AT91_SDRAMC_NB_4 (1 << 4) -#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ +#define AT91_SDRAMC_NB_4 (1 << 4) +#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ #define AT91_SDRAMC_CAS_1 (1 << 5) #define AT91_SDRAMC_CAS_2 (2 << 5) #define AT91_SDRAMC_CAS_3 (3 << 5) -- cgit v1.2.3 From 6c3c5bb3c68b932ece9f92b9d201196d537cb99c Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 16 Jan 2007 12:33:35 +0100 Subject: [ARM] 4095/1: S3C24XX: Fix GPIO set for Bank A GPIO bank A can only be output or a special function, and the regs-gpio.h header has mistakenly got this as input or output. The mistake is carried on into the gpio.c s3c2410_gpio_cfgpin() call which will set the wrong value if S3C2410_GPIO_OUTPUT is passed. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-gpio.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index b2893e32a23..eae91694edc 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -52,10 +52,10 @@ /* general configuration options */ #define S3C2410_GPIO_LEAVE (0xFFFFFFFF) -#define S3C2410_GPIO_INPUT (0xFFFFFFF0) +#define S3C2410_GPIO_INPUT (0xFFFFFFF0) /* not available on A */ #define S3C2410_GPIO_OUTPUT (0xFFFFFFF1) #define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */ -#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* not available on A */ +#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* bank A => addr/cs/nand */ #define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */ /* register address for the GPIO registers. -- cgit v1.2.3 From 7baced8a5923ce13d3d42d50a042a869092ab4e5 Mon Sep 17 00:00:00 2001 From: Matt Reimer Date: Wed, 24 Jan 2007 01:30:37 +0100 Subject: [ARM] 4106/1: S3C2410: typo fixes in register definitions The Trcd* bits of the S3C24xx BANKCON6 and BANKCON7 registers are misspelled in include/asm-arm/arch-s3c2410/regs-mem.h as Trdc*. Signed-off-by: Matt Reimer Acked-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/regs-mem.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-s3c2410/regs-mem.h b/include/asm-arm/arch-s3c2410/regs-mem.h index 375dca50364..e4d82341f7b 100644 --- a/include/asm-arm/arch-s3c2410/regs-mem.h +++ b/include/asm-arm/arch-s3c2410/regs-mem.h @@ -133,10 +133,10 @@ #define S3C2410_BANKCON_SDRAM (0x3 << 15) /* next bits only for EDO DRAM in 6,7 */ -#define S3C2400_BANKCON_EDO_Trdc1 (0x00 << 4) -#define S3C2400_BANKCON_EDO_Trdc2 (0x01 << 4) -#define S3C2400_BANKCON_EDO_Trdc3 (0x02 << 4) -#define S3C2400_BANKCON_EDO_Trdc4 (0x03 << 4) +#define S3C2400_BANKCON_EDO_Trcd1 (0x00 << 4) +#define S3C2400_BANKCON_EDO_Trcd2 (0x01 << 4) +#define S3C2400_BANKCON_EDO_Trcd3 (0x02 << 4) +#define S3C2400_BANKCON_EDO_Trcd4 (0x03 << 4) /* CAS pulse width */ #define S3C2400_BANKCON_EDO_PULSE1 (0x00 << 3) @@ -153,9 +153,9 @@ #define S3C2400_BANKCON_EDO_SCANb11 (0x03 << 0) /* next bits only for SDRAM in 6,7 */ -#define S3C2410_BANKCON_Trdc2 (0x00 << 2) -#define S3C2410_BANKCON_Trdc3 (0x01 << 2) -#define S3C2410_BANKCON_Trdc4 (0x02 << 2) +#define S3C2410_BANKCON_Trcd2 (0x00 << 2) +#define S3C2410_BANKCON_Trcd3 (0x01 << 2) +#define S3C2410_BANKCON_Trcd4 (0x02 << 2) /* control column address select */ #define S3C2410_BANKCON_SCANb8 (0x00 << 0) -- cgit v1.2.3 From c6428464894889e110418928e6b37dc2eb4cee56 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Wed, 24 Jan 2007 18:47:08 +0100 Subject: [ARM] 4111/1: Allow VFP to work with thread migration on SMP The current lazy saving of the VFP registers is no longer possible with thread migration on SMP. This patch implements a per-CPU vfp-state pointer and the saving of the VFP registers at every context switch. The registers restoring is still performed in a lazy way. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- include/asm-arm/fpstate.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h index 6af4e6bd129..f31cda5a55e 100644 --- a/include/asm-arm/fpstate.h +++ b/include/asm-arm/fpstate.h @@ -35,6 +35,9 @@ struct vfp_hard_struct { */ __u32 fpinst; __u32 fpinst2; +#ifdef CONFIG_SMP + __u32 cpu; +#endif }; union vfp_state { -- cgit v1.2.3 From 75e7153abd220f1c4a731a9613fb705485b56aa8 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 9 Feb 2007 17:08:58 +0000 Subject: [APM] ARM: Convert to use shared APM emulation. Signed-off-by: Ralf Baechle --- include/asm-arm/apm.h | 64 --------------------------------------------------- 1 file changed, 64 deletions(-) delete mode 100644 include/asm-arm/apm.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/apm.h b/include/asm-arm/apm.h deleted file mode 100644 index d09113b37e4..00000000000 --- a/include/asm-arm/apm.h +++ /dev/null @@ -1,64 +0,0 @@ -/* -*- linux-c -*- - * - * (C) 2003 zecke@handhelds.org - * - * GPL version 2 - * - * based on arch/arm/kernel/apm.c - * factor out the information needed by architectures to provide - * apm status - * - * - */ -#ifndef ARM_ASM_SA1100_APM_H -#define ARM_ASM_SA1100_APM_H - -#include - -/* - * This structure gets filled in by the machine specific 'get_power_status' - * implementation. Any fields which are not set default to a safe value. - */ -struct apm_power_info { - unsigned char ac_line_status; -#define APM_AC_OFFLINE 0 -#define APM_AC_ONLINE 1 -#define APM_AC_BACKUP 2 -#define APM_AC_UNKNOWN 0xff - - unsigned char battery_status; -#define APM_BATTERY_STATUS_HIGH 0 -#define APM_BATTERY_STATUS_LOW 1 -#define APM_BATTERY_STATUS_CRITICAL 2 -#define APM_BATTERY_STATUS_CHARGING 3 -#define APM_BATTERY_STATUS_NOT_PRESENT 4 -#define APM_BATTERY_STATUS_UNKNOWN 0xff - - unsigned char battery_flag; -#define APM_BATTERY_FLAG_HIGH (1 << 0) -#define APM_BATTERY_FLAG_LOW (1 << 1) -#define APM_BATTERY_FLAG_CRITICAL (1 << 2) -#define APM_BATTERY_FLAG_CHARGING (1 << 3) -#define APM_BATTERY_FLAG_NOT_PRESENT (1 << 7) -#define APM_BATTERY_FLAG_UNKNOWN 0xff - - int battery_life; - int time; - int units; -#define APM_UNITS_MINS 0 -#define APM_UNITS_SECS 1 -#define APM_UNITS_UNKNOWN -1 - -}; - -/* - * This allows machines to provide their own "apm get power status" function. - */ -extern void (*apm_get_power_status)(struct apm_power_info *); - -/* - * Queue an event (APM_SYS_SUSPEND or APM_CRITICAL_SUSPEND) - */ -void apm_queue_event(apm_event_t event); - -#endif -- cgit v1.2.3 From 4ec031166f6a466a443f462e567f7551096b1741 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Fri, 9 Feb 2007 16:38:30 +0000 Subject: [PATCH] kill eth_io_copy_and_sum() On all targets that sucker boils down to memcpy_fromio(sbk->data, from, len). The function name is highly misguiding (it _never_ does any checksums), the last argument is just a noise and simply expanding the call to memcpy_fromio() gives shorter and more readable source. For a lot of reasons it has almost no remaining users, so it's better to just outright kill it. Signed-off-by: Al Viro Signed-off-by: Linus Torvalds --- include/asm-arm/arch-ixp4xx/io.h | 3 --- include/asm-arm/io.h | 5 ----- 2 files changed, 8 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index 0d517267fb6..b7b5414d932 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h @@ -238,9 +238,6 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count) #define memcpy_fromio(a,c,l) _memcpy_fromio((a),(c),(l)) #define memcpy_toio(c,a,l) _memcpy_toio((c),(a),(l)) -#define eth_io_copy_and_sum(s,c,l,b) \ - eth_copy_and_sum((s),__mem_pci(c),(l),(b)) - static inline int check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature, int length) diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index 288f76b166d..5f60b422090 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -182,9 +182,6 @@ extern void _memset_io(volatile void __iomem *, int, size_t); #define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) #define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) -#define eth_io_copy_and_sum(s,c,l,b) \ - eth_copy_and_sum((s),__mem_pci(c),(l),(b)) - #elif !defined(readb) #define readb(c) (__readwrite_bug("readb"),0) @@ -194,8 +191,6 @@ extern void _memset_io(volatile void __iomem *, int, size_t); #define writew(v,c) __readwrite_bug("writew") #define writel(v,c) __readwrite_bug("writel") -#define eth_io_copy_and_sum(s,c,l,b) __readwrite_bug("eth_io_copy_and_sum") - #define check_signature(io,sig,len) (0) #endif /* __mem_pci */ -- cgit v1.2.3