From d1dcdf5718977c93805f9300b6c79f039db84c8b Mon Sep 17 00:00:00 2001 From: merge Date: Fri, 6 Feb 2009 00:22:54 +0000 Subject: MERGE-via-pending-tracking-hist-MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011-1233879414-1233879505 pending-tracking-hist top was MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011-1233879414-1233879505 / 1c405b6ccee468298e7ccbfd9a3a3f4d123207b0 ... parent commitmessage: From: merge MERGE-via-stable-tracking-hist-MERGE-via-mokopatches-tracking-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011-1233879414 stable-tracking-hist top was MERGE-via-mokopatches-tracking-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011-1233879414 / 71be0a45396066b1f8f27f8f4f87937247a129e1 ... parent commitmessage: From: merge MERGE-via-mokopatches-tracking-hist-MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011 mokopatches-tracking-hist top was MERGE-via-master-MERGE-via-master-hist-1232625318-1233879011 / 1be1b01373f572a02c6f1f99863c8c11ed2f9f5b ... parent commitmessage: From: merge MERGE-via-master-MERGE-via-master-hist-1232625318 master top was MERGE-via-master-hist-1232625318 / dd4b117123ae66451695810017eb72fbdfc05df5 ... parent commitmessage: From: merge MERGE-master-patchset-edits --- include/asm-arm/plat-s3c24xx/regs-iis.h | 77 ------------------------- include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h | 72 ----------------------- 2 files changed, 149 deletions(-) delete mode 100644 include/asm-arm/plat-s3c24xx/regs-iis.h delete mode 100644 include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h (limited to 'include/asm-arm') diff --git a/include/asm-arm/plat-s3c24xx/regs-iis.h b/include/asm-arm/plat-s3c24xx/regs-iis.h deleted file mode 100644 index a6f1d5df13b..00000000000 --- a/include/asm-arm/plat-s3c24xx/regs-iis.h +++ /dev/null @@ -1,77 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/regs-iis.h - * - * Copyright (c) 2003 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 IIS register definition -*/ - -#ifndef __ASM_ARCH_REGS_IIS_H -#define __ASM_ARCH_REGS_IIS_H - -#define S3C2410_IISCON (0x00) - -#define S3C2410_IISCON_LRINDEX (1<<8) -#define S3C2410_IISCON_TXFIFORDY (1<<7) -#define S3C2410_IISCON_RXFIFORDY (1<<6) -#define S3C2410_IISCON_TXDMAEN (1<<5) -#define S3C2410_IISCON_RXDMAEN (1<<4) -#define S3C2410_IISCON_TXIDLE (1<<3) -#define S3C2410_IISCON_RXIDLE (1<<2) -#define S3C2410_IISCON_PSCEN (1<<1) -#define S3C2410_IISCON_IISEN (1<<0) - -#define S3C2410_IISMOD (0x04) - -#define S3C2440_IISMOD_MPLL (1<<9) -#define S3C2410_IISMOD_SLAVE (1<<8) -#define S3C2410_IISMOD_NOXFER (0<<6) -#define S3C2410_IISMOD_RXMODE (1<<6) -#define S3C2410_IISMOD_TXMODE (2<<6) -#define S3C2410_IISMOD_TXRXMODE (3<<6) -#define S3C2410_IISMOD_LR_LLOW (0<<5) -#define S3C2410_IISMOD_LR_RLOW (1<<5) -#define S3C2410_IISMOD_IIS (0<<4) -#define S3C2410_IISMOD_MSB (1<<4) -#define S3C2410_IISMOD_8BIT (0<<3) -#define S3C2410_IISMOD_16BIT (1<<3) -#define S3C2410_IISMOD_BITMASK (1<<3) -#define S3C2410_IISMOD_256FS (0<<2) -#define S3C2410_IISMOD_384FS (1<<2) -#define S3C2410_IISMOD_16FS (0<<0) -#define S3C2410_IISMOD_32FS (1<<0) -#define S3C2410_IISMOD_48FS (2<<0) -#define S3C2410_IISMOD_FS_MASK (3<<0) - -#define S3C2410_IISPSR (0x08) -#define S3C2410_IISPSR_INTMASK (31<<5) -#define S3C2410_IISPSR_INTSHIFT (5) -#define S3C2410_IISPSR_EXTMASK (31<<0) -#define S3C2410_IISPSR_EXTSHFIT (0) - -#define S3C2410_IISFCON (0x0c) - -#define S3C2410_IISFCON_TXDMA (1<<15) -#define S3C2410_IISFCON_RXDMA (1<<14) -#define S3C2410_IISFCON_TXENABLE (1<<13) -#define S3C2410_IISFCON_RXENABLE (1<<12) -#define S3C2410_IISFCON_TXMASK (0x3f << 6) -#define S3C2410_IISFCON_TXSHIFT (6) -#define S3C2410_IISFCON_RXMASK (0x3f) -#define S3C2410_IISFCON_RXSHIFT (0) - -#define S3C2400_IISFCON_TXDMA (1<<11) -#define S3C2400_IISFCON_RXDMA (1<<10) -#define S3C2400_IISFCON_TXENABLE (1<<9) -#define S3C2400_IISFCON_RXENABLE (1<<8) -#define S3C2400_IISFCON_TXMASK (0x07 << 4) -#define S3C2400_IISFCON_TXSHIFT (4) -#define S3C2400_IISFCON_RXMASK (0x07) -#define S3C2400_IISFCON_RXSHIFT (0) - -#define S3C2410_IISFIFO (0x10) -#endif /* __ASM_ARCH_REGS_IIS_H */ diff --git a/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h b/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h deleted file mode 100644 index 25d4058bcfe..00000000000 --- a/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h +++ /dev/null @@ -1,72 +0,0 @@ -/* linux/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h - * - * Copyright 2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2412 IIS register definition -*/ - -#ifndef __ASM_ARCH_REGS_S3C2412_IIS_H -#define __ASM_ARCH_REGS_S3C2412_IIS_H - -#define S3C2412_IISCON (0x00) -#define S3C2412_IISMOD (0x04) -#define S3C2412_IISFIC (0x08) -#define S3C2412_IISPSR (0x0C) -#define S3C2412_IISTXD (0x10) -#define S3C2412_IISRXD (0x14) - -#define S3C2412_IISCON_LRINDEX (1 << 11) -#define S3C2412_IISCON_TXFIFO_EMPTY (1 << 10) -#define S3C2412_IISCON_RXFIFO_EMPTY (1 << 9) -#define S3C2412_IISCON_TXFIFO_FULL (1 << 8) -#define S3C2412_IISCON_RXFIFO_FULL (1 << 7) -#define S3C2412_IISCON_TXDMA_PAUSE (1 << 6) -#define S3C2412_IISCON_RXDMA_PAUSE (1 << 5) -#define S3C2412_IISCON_TXCH_PAUSE (1 << 4) -#define S3C2412_IISCON_RXCH_PAUSE (1 << 3) -#define S3C2412_IISCON_TXDMA_ACTIVE (1 << 2) -#define S3C2412_IISCON_RXDMA_ACTIVE (1 << 1) -#define S3C2412_IISCON_IIS_ACTIVE (1 << 0) - -#define S3C2412_IISMOD_MASTER_INTERNAL (0 << 10) -#define S3C2412_IISMOD_MASTER_EXTERNAL (1 << 10) -#define S3C2412_IISMOD_SLAVE (2 << 10) -#define S3C2412_IISMOD_MASTER_MASK (3 << 10) -#define S3C2412_IISMOD_MODE_TXONLY (0 << 8) -#define S3C2412_IISMOD_MODE_RXONLY (1 << 8) -#define S3C2412_IISMOD_MODE_TXRX (2 << 8) -#define S3C2412_IISMOD_MODE_MASK (3 << 8) -#define S3C2412_IISMOD_LR_LLOW (0 << 7) -#define S3C2412_IISMOD_LR_RLOW (1 << 7) -#define S3C2412_IISMOD_SDF_IIS (0 << 5) -#define S3C2412_IISMOD_SDF_MSB (0 << 5) -#define S3C2412_IISMOD_SDF_LSB (0 << 5) -#define S3C2412_IISMOD_SDF_MASK (3 << 5) -#define S3C2412_IISMOD_RCLK_256FS (0 << 3) -#define S3C2412_IISMOD_RCLK_512FS (1 << 3) -#define S3C2412_IISMOD_RCLK_384FS (2 << 3) -#define S3C2412_IISMOD_RCLK_768FS (3 << 3) -#define S3C2412_IISMOD_RCLK_MASK (3 << 3) -#define S3C2412_IISMOD_BCLK_32FS (0 << 1) -#define S3C2412_IISMOD_BCLK_48FS (1 << 1) -#define S3C2412_IISMOD_BCLK_16FS (2 << 1) -#define S3C2412_IISMOD_BCLK_24FS (3 << 1) -#define S3C2412_IISMOD_BCLK_MASK (3 << 1) -#define S3C2412_IISMOD_8BIT (1 << 0) - -#define S3C2412_IISPSR_PSREN (1 << 15) - -#define S3C2412_IISFIC_TXFLUSH (1 << 15) -#define S3C2412_IISFIC_RXFLUSH (1 << 7) -#define S3C2412_IISFIC_TXCOUNT(x) (((x) >> 8) & 0xf) -#define S3C2412_IISFIC_RXCOUNT(x) (((x) >> 0) & 0xf) - - - -#endif /* __ASM_ARCH_REGS_S3C2412_IIS_H */ - -- cgit v1.2.3