From 0893f1250f87e0a832f47bb60fb69ed0d52be7a3 Mon Sep 17 00:00:00 2001 From: Bernd Schmidt Date: Wed, 7 May 2008 11:41:26 +0800 Subject: [Blackfin] arch: fix gdb testing regression When transferring to IRQ5 from an exception, save SYSCFG in memory across the transfer and clear the trace bit. When we get a single step exception, check whether we can safely clear the trace bit in SYSCFG. We can (and should) clear it after the first instruction of the interrupt handler; the first insn saves SYSCFG to the stack in all handlers. Signed-off-by: Bernd Schmidt Signed-off-by: Bryan Wu --- include/asm-blackfin/entry.h | 5 +++++ include/asm-blackfin/mach-common/context.S | 5 +++++ 2 files changed, 10 insertions(+) (limited to 'include/asm-blackfin') diff --git a/include/asm-blackfin/entry.h b/include/asm-blackfin/entry.h index 562c6d3a323..c4f721e0d00 100644 --- a/include/asm-blackfin/entry.h +++ b/include/asm-blackfin/entry.h @@ -17,6 +17,11 @@ #define PF_DTRACE_OFF 1 #define PF_DTRACE_BIT 5 +/* + * NOTE! The single-stepping code assumes that all interrupt handlers + * start by saving SYSCFG on the stack with their first instruction. + */ + /* This one is used for exceptions, emulation, and NMI. It doesn't push RETI and doesn't do cli. */ #define SAVE_ALL_SYS save_context_no_interrupts diff --git a/include/asm-blackfin/mach-common/context.S b/include/asm-blackfin/mach-common/context.S index fd0ebe1862b..c0e630edfb9 100644 --- a/include/asm-blackfin/mach-common/context.S +++ b/include/asm-blackfin/mach-common/context.S @@ -27,6 +27,11 @@ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +/* + * NOTE! The single-stepping code assumes that all interrupt handlers + * start by saving SYSCFG on the stack with their first instruction. + */ + /* * Code to save processor context. * We even save the register which are preserved by a function call -- cgit v1.2.3