From 9267a30d1dc7dcd7cadb5eb6a5bbfed703feeefa Mon Sep 17 00:00:00 2001
From: Marc St-Jean <stjeanma@pmc-sierra.com>
Date: Thu, 14 Jun 2007 15:55:31 -0600
Subject: [MIPS] PMC MSP71xx mips common

Patch to add mips common support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
 include/asm-mips/war.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

(limited to 'include/asm-mips/war.h')

diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index c507f1b8014..45cb8272483 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -197,6 +197,14 @@
 #define R10000_LLSC_WAR 1
 #endif
 
+/*
+ * 34K core erratum: "Problems Executing the TLBR Instruction"
+ */
+#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \
+	defined(CONFIG_PMC_MSP7120_FPGA)
+#define MIPS34K_MISSED_ITLB_WAR		1
+#endif
+
 /*
  * Workarounds default to off
  */
@@ -236,5 +244,8 @@
 #ifndef R10000_LLSC_WAR
 #define R10000_LLSC_WAR			0
 #endif
+#ifndef MIPS34K_MISSED_ITLB_WAR
+#define MIPS34K_MISSED_ITLB_WAR		0
+#endif
 
 #endif /* _ASM_WAR_H */
-- 
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