From 373e68b5472d421cbd2703e7a77caf053f78c005 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:41:24 +0900 Subject: sh: Board updates for I/O routine rework. This updates the various boards for some of the recent I/O routine updates. Signed-off-by: Paul Mundt --- include/asm-sh/hs7751rvoip/hs7751rvoip.h | 3 ++ include/asm-sh/mc146818rtc.h | 2 +- include/asm-sh/se.h | 80 +++++++++++++++++++++++++++ include/asm-sh/se/io.h | 35 ------------ include/asm-sh/se/se.h | 77 -------------------------- include/asm-sh/se7300.h | 64 ++++++++++++++++++++++ include/asm-sh/se7300/io.h | 29 ---------- include/asm-sh/se7300/se7300.h | 61 --------------------- include/asm-sh/se73180.h | 65 ++++++++++++++++++++++ include/asm-sh/se73180/io.h | 32 ----------- include/asm-sh/se73180/se73180.h | 62 --------------------- include/asm-sh/se7751.h | 71 ++++++++++++++++++++++++ include/asm-sh/se7751/io.h | 42 --------------- include/asm-sh/se7751/se7751.h | 68 ----------------------- include/asm-sh/sh03/io.h | 10 +--- include/asm-sh/snapgear.h | 79 +++++++++++++++++++++++++++ include/asm-sh/snapgear/io.h | 92 -------------------------------- include/asm-sh/systemh/7751systemh.h | 68 ----------------------- include/asm-sh/systemh/io.h | 43 --------------- include/asm-sh/systemh7751.h | 71 ++++++++++++++++++++++++ 20 files changed, 435 insertions(+), 619 deletions(-) create mode 100644 include/asm-sh/se.h delete mode 100644 include/asm-sh/se/io.h delete mode 100644 include/asm-sh/se/se.h create mode 100644 include/asm-sh/se7300.h delete mode 100644 include/asm-sh/se7300/io.h delete mode 100644 include/asm-sh/se7300/se7300.h create mode 100644 include/asm-sh/se73180.h delete mode 100644 include/asm-sh/se73180/io.h delete mode 100644 include/asm-sh/se73180/se73180.h create mode 100644 include/asm-sh/se7751.h delete mode 100644 include/asm-sh/se7751/io.h delete mode 100644 include/asm-sh/se7751/se7751.h create mode 100644 include/asm-sh/snapgear.h delete mode 100644 include/asm-sh/snapgear/io.h delete mode 100644 include/asm-sh/systemh/7751systemh.h delete mode 100644 include/asm-sh/systemh/io.h create mode 100644 include/asm-sh/systemh7751.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h index 857cc2ebbc6..69faf017147 100644 --- a/include/asm-sh/hs7751rvoip/hs7751rvoip.h +++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h @@ -44,6 +44,9 @@ #define IRQ_RINGING 4 /* Ringing IRQ */ #define IRQ_CODEC 5 /* CODEC IRQ */ +#define __IO_PREFIX hs7751rvoip +#include + /* arch/sh/boards/renesas/hs7751rvoip/irq.c */ void init_hs7751rvoip_IRQ(void); diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h index 1707cfb2915..adc6e67c6b7 100644 --- a/include/asm-sh/mc146818rtc.h +++ b/include/asm-sh/mc146818rtc.h @@ -24,7 +24,7 @@ #define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b) #elif defined(CONFIG_SH_SECUREEDGE5410) -#include +#include #define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR #define CMOS_READ(addr) secureedge5410_cmos_read(addr) diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h new file mode 100644 index 00000000000..a1832154a3a --- /dev/null +++ b/include/asm-sh/se.h @@ -0,0 +1,80 @@ +#ifndef __ASM_SH_HITACHI_SE_H +#define __ASM_SH_HITACHI_SE_H + +/* + * linux/include/asm-sh/hitachi_se.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SolutionEngine support + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_83902 0xb0000000 /* DP83902A */ +#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ +#define PA_83902_RST 0xb0080000 /* DP83902A reset port */ + +#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ +#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ +#define PA_LED 0xb0c00000 /* LED */ +#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#define PA_BCR 0xb0e00000 +#else +#define PA_BCR 0xb1400000 /* FPGA */ +#endif + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#define IRQ_STNIC 12 +#else +#define IRQ_STNIC 10 +#endif + +#define __IO_PREFIX se +#include + +#endif /* __ASM_SH_HITACHI_SE_H */ diff --git a/include/asm-sh/se/io.h b/include/asm-sh/se/io.h deleted file mode 100644 index 9eeb86cd6ce..00000000000 --- a/include/asm-sh/se/io.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * include/asm-sh/io_se.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi SolutionEngine - */ - -#ifndef _ASM_SH_IO_SE_H -#define _ASM_SH_IO_SE_H - -extern unsigned char se_inb(unsigned long port); -extern unsigned short se_inw(unsigned long port); -extern unsigned int se_inl(unsigned long port); - -extern void se_outb(unsigned char value, unsigned long port); -extern void se_outw(unsigned short value, unsigned long port); -extern void se_outl(unsigned int value, unsigned long port); - -extern unsigned char se_inb_p(unsigned long port); -extern void se_outb_p(unsigned char value, unsigned long port); - -extern void se_insb(unsigned long port, void *addr, unsigned long count); -extern void se_insw(unsigned long port, void *addr, unsigned long count); -extern void se_insl(unsigned long port, void *addr, unsigned long count); -extern void se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void se_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned long se_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_SE_H */ diff --git a/include/asm-sh/se/se.h b/include/asm-sh/se/se.h deleted file mode 100644 index 791c5da0388..00000000000 --- a/include/asm-sh/se/se.h +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE_H -#define __ASM_SH_HITACHI_SE_H - -/* - * linux/include/asm-sh/hitachi_se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_83902 0xb0000000 /* DP83902A */ -#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ -#define PA_83902_RST 0xb0080000 /* DP83902A reset port */ - -#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ -#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ -#define PA_LED 0xb0c00000 /* LED */ -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define PA_BCR 0xb0e00000 -#else -#define PA_BCR 0xb1400000 /* FPGA */ -#endif - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define IRQ_STNIC 12 -#else -#define IRQ_STNIC 10 -#endif - -#endif /* __ASM_SH_HITACHI_SE_H */ diff --git a/include/asm-sh/se7300.h b/include/asm-sh/se7300.h new file mode 100644 index 00000000000..4e24edccb30 --- /dev/null +++ b/include/asm-sh/se7300.h @@ -0,0 +1,64 @@ +#ifndef __ASM_SH_HITACHI_SE7300_H +#define __ASM_SH_HITACHI_SE7300_H + +/* + * linux/include/asm-sh/se/se7300.h + * + * Copyright (C) 2003 Takashi Kusuda + * + * SH-Mobile SolutionEngine 7300 support + */ + +/* Box specific addresses. */ + +/* Area 0 */ +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ +#define PA_FROM 0x00400000 /* Flash ROM */ +#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ +#define PA_SRAM 0x00800000 /* SRAM */ +#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ +/* Area 1 */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +/* Area 2 */ +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +/* Area 3 */ +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 +/* Area 4 */ +#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) +#define PA_LED 0xb0800000 /* LED */ +#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ +#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ +#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ +#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ +/* Area 5 */ +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +/* Area 6 */ +#define PA_LCD1 0xb8000000 +#define PA_LCD2 0xb8800000 + +#define __IO_PREFIX sh7300se +#include + +#endif /* __ASM_SH_HITACHI_SE7300_H */ diff --git a/include/asm-sh/se7300/io.h b/include/asm-sh/se7300/io.h deleted file mode 100644 index c6af8552971..00000000000 --- a/include/asm-sh/se7300/io.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * include/asm-sh/se7300/io.h - * - * Copyright (C) 2003 Takashi Kusuda - * IO functions for SH-Mobile(SH7300) SolutionEngine - */ - -#ifndef _ASM_SH_IO_7300SE_H -#define _ASM_SH_IO_7300SE_H - -extern unsigned char sh7300se_inb(unsigned long port); -extern unsigned short sh7300se_inw(unsigned long port); -extern unsigned int sh7300se_inl(unsigned long port); - -extern void sh7300se_outb(unsigned char value, unsigned long port); -extern void sh7300se_outw(unsigned short value, unsigned long port); -extern void sh7300se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7300se_inb_p(unsigned long port); -extern void sh7300se_outb_p(unsigned char value, unsigned long port); - -extern void sh7300se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7300se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7300se_outsl(unsigned long port, const void *addr, unsigned long count); - -#endif /* _ASM_SH_IO_7300SE_H */ diff --git a/include/asm-sh/se7300/se7300.h b/include/asm-sh/se7300/se7300.h deleted file mode 100644 index 3ec1ded86c9..00000000000 --- a/include/asm-sh/se7300/se7300.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE7300_H -#define __ASM_SH_HITACHI_SE7300_H - -/* - * linux/include/asm-sh/se/se7300.h - * - * Copyright (C) 2003 Takashi Kusuda - * - * SH-Mobile SolutionEngine 7300 support - */ - -/* Box specific addresses. */ - -/* Area 0 */ -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ -#define PA_FROM 0x00400000 /* Flash ROM */ -#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ -#define PA_SRAM 0x00800000 /* SRAM */ -#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ -/* Area 1 */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -/* Area 2 */ -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -/* Area 3 */ -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 -/* Area 4 */ -#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ -#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) -#define PA_LED 0xb0800000 /* LED */ -#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ -#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ -#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ -/* Area 5 */ -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -/* Area 6 */ -#define PA_LCD1 0xb8000000 -#define PA_LCD2 0xb8800000 - -#endif /* __ASM_SH_HITACHI_SE7300_H */ diff --git a/include/asm-sh/se73180.h b/include/asm-sh/se73180.h new file mode 100644 index 00000000000..3a4acb3e38a --- /dev/null +++ b/include/asm-sh/se73180.h @@ -0,0 +1,65 @@ +#ifndef __ASM_SH_HITACHI_SE73180_H +#define __ASM_SH_HITACHI_SE73180_H + +/* + * include/asm-sh/se/se73180.h + * + * Copyright (C) 2003 Takashi Kusuda + * + * SH-Mobile SolutionEngine 73180 support + */ + +/* Box specific addresses. */ + +/* Area 0 */ +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ +#define PA_FROM 0x00400000 /* Flash ROM */ +#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ +#define PA_SRAM 0x00800000 /* SRAM */ +#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ +/* Area 1 */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +/* Area 2 */ +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +/* Area 3 */ +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 +/* Area 4 */ +#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) +#define PA_LED 0xb0C00000 /* LED */ +#define LED_SHIFT 0 +#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ +#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ +#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ +#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ +/* Area 5 */ +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +/* Area 6 */ +#define PA_LCD1 0xb8000000 +#define PA_LCD2 0xb8800000 + +#define __IO_PREFIX sh73180se +#include + +#endif /* __ASM_SH_HITACHI_SE73180_H */ diff --git a/include/asm-sh/se73180/io.h b/include/asm-sh/se73180/io.h deleted file mode 100644 index c9cb1b9412c..00000000000 --- a/include/asm-sh/se73180/io.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-sh/se73180/io.h - * - * Copyright (C) 2003 Takashi Kusuda - * Based on include/asm-sh/se7300/io.h - * - * IO functions for SH-Mobile3(SH73180) SolutionEngine - * - */ - -#ifndef _ASM_SH_IO_73180SE_H -#define _ASM_SH_IO_73180SE_H - -extern unsigned char sh73180se_inb(unsigned long port); -extern unsigned short sh73180se_inw(unsigned long port); -extern unsigned int sh73180se_inl(unsigned long port); - -extern void sh73180se_outb(unsigned char value, unsigned long port); -extern void sh73180se_outw(unsigned short value, unsigned long port); -extern void sh73180se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh73180se_inb_p(unsigned long port); -extern void sh73180se_outb_p(unsigned char value, unsigned long port); - -extern void sh73180se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh73180se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh73180se_outsl(unsigned long port, const void *addr, unsigned long count); - -#endif /* _ASM_SH_IO_73180SE_H */ diff --git a/include/asm-sh/se73180/se73180.h b/include/asm-sh/se73180/se73180.h deleted file mode 100644 index f5b93e39e76..00000000000 --- a/include/asm-sh/se73180/se73180.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE73180_H -#define __ASM_SH_HITACHI_SE73180_H - -/* - * include/asm-sh/se/se73180.h - * - * Copyright (C) 2003 Takashi Kusuda - * - * SH-Mobile SolutionEngine 73180 support - */ - -/* Box specific addresses. */ - -/* Area 0 */ -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ -#define PA_FROM 0x00400000 /* Flash ROM */ -#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ -#define PA_SRAM 0x00800000 /* SRAM */ -#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ -/* Area 1 */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -/* Area 2 */ -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -/* Area 3 */ -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 -/* Area 4 */ -#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ -#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) -#define PA_LED 0xb0C00000 /* LED */ -#define LED_SHIFT 0 -#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ -#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ -#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ -/* Area 5 */ -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -/* Area 6 */ -#define PA_LCD1 0xb8000000 -#define PA_LCD2 0xb8800000 - -#endif /* __ASM_SH_HITACHI_SE73180_H */ diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h new file mode 100644 index 00000000000..88cd379d908 --- /dev/null +++ b/include/asm-sh/se7751.h @@ -0,0 +1,71 @@ +#ifndef __ASM_SH_HITACHI_7751SE_H +#define __ASM_SH_HITACHI_7751SE_H + +/* + * linux/include/asm-sh/hitachi_7751se.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SolutionEngine support + + * Modified for 7751 Solution Engine by + * Ian da Silva and Jeremy Siegel, 2001. + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ +#define PA_LED 0xba000000 /* LED */ +#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_MODE (PA_MRSHPC + 4) +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#define IRQ_79C973 13 + +#define __IO_PREFIX sh7751se +#include + +#endif /* __ASM_SH_HITACHI_7751SE_H */ diff --git a/include/asm-sh/se7751/io.h b/include/asm-sh/se7751/io.h deleted file mode 100644 index 78d8f5744bc..00000000000 --- a/include/asm-sh/se7751/io.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-sh/io_7751se.h - * - * Modified version of io_se.h for the 7751se-specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi SolutionEngine - */ - -#ifndef _ASM_SH_IO_7751SE_H -#define _ASM_SH_IO_7751SE_H - -extern unsigned char sh7751se_inb(unsigned long port); -extern unsigned short sh7751se_inw(unsigned long port); -extern unsigned int sh7751se_inl(unsigned long port); - -extern void sh7751se_outb(unsigned char value, unsigned long port); -extern void sh7751se_outw(unsigned short value, unsigned long port); -extern void sh7751se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7751se_inb_p(unsigned long port); -extern void sh7751se_outb_p(unsigned char value, unsigned long port); - -extern void sh7751se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7751se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char sh7751se_readb(unsigned long addr); -extern unsigned short sh7751se_readw(unsigned long addr); -extern unsigned int sh7751se_readl(unsigned long addr); -extern void sh7751se_writeb(unsigned char b, unsigned long addr); -extern void sh7751se_writew(unsigned short b, unsigned long addr); -extern void sh7751se_writel(unsigned int b, unsigned long addr); - -extern unsigned long sh7751se_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_7751SE_H */ diff --git a/include/asm-sh/se7751/se7751.h b/include/asm-sh/se7751/se7751.h deleted file mode 100644 index 738e22bebdf..00000000000 --- a/include/asm-sh/se7751/se7751.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef __ASM_SH_HITACHI_7751SE_H -#define __ASM_SH_HITACHI_7751SE_H - -/* - * linux/include/asm-sh/hitachi_7751se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - - * Modified for 7751 Solution Engine by - * Ian da Silva and Jeremy Siegel, 2001. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#endif /* __ASM_SH_HITACHI_7751SE_H */ diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h index 25792e9831e..df3b187ef88 100644 --- a/include/asm-sh/sh03/io.h +++ b/include/asm-sh/sh03/io.h @@ -33,14 +33,6 @@ #define IRL3_IPR_POS 0 #define IRL3_PRIORITY 4 - -extern unsigned long sh03_isa_port2addr(unsigned long offset); - -extern void setup_sh03(void); -extern void init_sh03_IRQ(void); -extern void heartbeat_sh03(void); - -extern void sh03_rtc_gettimeofday(struct timeval *tv); -extern int sh03_rtc_settimeofday(const struct timeval *tv); +void heartbeat_sh03(void); #endif /* _ASM_SH_IO_SH03_H */ diff --git a/include/asm-sh/snapgear.h b/include/asm-sh/snapgear.h new file mode 100644 index 00000000000..6b5e4ddc073 --- /dev/null +++ b/include/asm-sh/snapgear.h @@ -0,0 +1,79 @@ +/* + * include/asm-sh/snapgear/io.h + * + * Modified version of io_se.h for the snapgear-specific functions. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * IO functions for a SnapGear + */ + +#ifndef _ASM_SH_IO_SNAPGEAR_H +#define _ASM_SH_IO_SNAPGEAR_H + +#if defined(CONFIG_CPU_SH4) +/* + * The external interrupt lines, these take up ints 0 - 15 inclusive + * depending on the priority for the interrupt. In fact the priority + * is the interrupt :-) + */ + +#define IRL0_IRQ 2 +#define IRL0_IPR_ADDR INTC_IPRD +#define IRL0_IPR_POS 3 +#define IRL0_PRIORITY 13 + +#define IRL1_IRQ 5 +#define IRL1_IPR_ADDR INTC_IPRD +#define IRL1_IPR_POS 2 +#define IRL1_PRIORITY 10 + +#define IRL2_IRQ 8 +#define IRL2_IPR_ADDR INTC_IPRD +#define IRL2_IPR_POS 1 +#define IRL2_PRIORITY 7 + +#define IRL3_IRQ 11 +#define IRL3_IPR_ADDR INTC_IPRD +#define IRL3_IPR_POS 0 +#define IRL3_PRIORITY 4 +#endif + +#define __IO_PREFIX snapgear +#include + +#ifdef CONFIG_SH_SECUREEDGE5410 +/* + * We need to remember what was written to the ioport as some bits + * are shared with other functions and you cannot read back what was + * written :-| + * + * Bit Read Write + * ----------------------------------------------- + * D0 DCD on ttySC1 power + * D1 Reset Switch heatbeat + * D2 ttySC0 CTS (7100) LAN + * D3 - WAN + * D4 ttySC0 DCD (7100) CONSOLE + * D5 - ONLINE + * D6 - VPN + * D7 - DTR on ttySC1 + * D8 - ttySC0 RTS (7100) + * D9 - ttySC0 DTR (7100) + * D10 - RTC SCLK + * D11 RTC DATA RTC DATA + * D12 - RTS RESET + */ + +#define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) +extern unsigned short secureedge5410_ioport; + +#define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ + (secureedge5410_ioport = \ + ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) +#define SECUREEDGE_READ_IOPORT() \ + ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) +#endif + +#endif /* _ASM_SH_IO_SNAPGEAR_H */ diff --git a/include/asm-sh/snapgear/io.h b/include/asm-sh/snapgear/io.h deleted file mode 100644 index bfa97ac0628..00000000000 --- a/include/asm-sh/snapgear/io.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * include/asm-sh/snapgear/io.h - * - * Modified version of io_se.h for the snapgear-specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for a SnapGear - */ - -#ifndef _ASM_SH_IO_SNAPGEAR_H -#define _ASM_SH_IO_SNAPGEAR_H - -#if defined(CONFIG_CPU_SH4) -/* - * The external interrupt lines, these take up ints 0 - 15 inclusive - * depending on the priority for the interrupt. In fact the priority - * is the interrupt :-) - */ - -#define IRL0_IRQ 2 -#define IRL0_IPR_ADDR INTC_IPRD -#define IRL0_IPR_POS 3 -#define IRL0_PRIORITY 13 - -#define IRL1_IRQ 5 -#define IRL1_IPR_ADDR INTC_IPRD -#define IRL1_IPR_POS 2 -#define IRL1_PRIORITY 10 - -#define IRL2_IRQ 8 -#define IRL2_IPR_ADDR INTC_IPRD -#define IRL2_IPR_POS 1 -#define IRL2_PRIORITY 7 - -#define IRL3_IRQ 11 -#define IRL3_IPR_ADDR INTC_IPRD -#define IRL3_IPR_POS 0 -#define IRL3_PRIORITY 4 -#endif - -extern unsigned char snapgear_inb(unsigned long port); -extern unsigned short snapgear_inw(unsigned long port); -extern unsigned int snapgear_inl(unsigned long port); - -extern void snapgear_outb(unsigned char value, unsigned long port); -extern void snapgear_outw(unsigned short value, unsigned long port); -extern void snapgear_outl(unsigned int value, unsigned long port); - -extern unsigned char snapgear_inb_p(unsigned long port); -extern void snapgear_outb_p(unsigned char value, unsigned long port); - -extern void snapgear_insl(unsigned long port, void *addr, unsigned long count); -extern void snapgear_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned long snapgear_isa_port2addr(unsigned long offset); - -#ifdef CONFIG_SH_SECUREEDGE5410 -/* - * We need to remember what was written to the ioport as some bits - * are shared with other functions and you cannot read back what was - * written :-| - * - * Bit Read Write - * ----------------------------------------------- - * D0 DCD on ttySC1 power - * D1 Reset Switch heatbeat - * D2 ttySC0 CTS (7100) LAN - * D3 - WAN - * D4 ttySC0 DCD (7100) CONSOLE - * D5 - ONLINE - * D6 - VPN - * D7 - DTR on ttySC1 - * D8 - ttySC0 RTS (7100) - * D9 - ttySC0 DTR (7100) - * D10 - RTC SCLK - * D11 RTC DATA RTC DATA - * D12 - RTS RESET - */ - - #define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) - extern unsigned short secureedge5410_ioport; - - #define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ - (secureedge5410_ioport = \ - ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) - #define SECUREEDGE_READ_IOPORT() \ - ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) -#endif - -#endif /* _ASM_SH_IO_SNAPGEAR_H */ diff --git a/include/asm-sh/systemh/7751systemh.h b/include/asm-sh/systemh/7751systemh.h deleted file mode 100644 index 4170531bdbd..00000000000 --- a/include/asm-sh/systemh/7751systemh.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H -#define __ASM_SH_SYSTEMH_7751SYSTEMH_H - -/* - * linux/include/asm-sh/systemh/7751systemh.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SystemH support - - * Modified for 7751 SystemH by - * Jonathan Short, 2002. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ diff --git a/include/asm-sh/systemh/io.h b/include/asm-sh/systemh/io.h deleted file mode 100644 index 327849b49db..00000000000 --- a/include/asm-sh/systemh/io.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * include/asm-sh/systemh/io.h - * - * Stupid I/O definitions for SystemH, cloned from SE7751. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_SYSTEMH_IO_H -#define __ASM_SH_SYSTEMH_IO_H - -extern unsigned char sh7751systemh_inb(unsigned long port); -extern unsigned short sh7751systemh_inw(unsigned long port); -extern unsigned int sh7751systemh_inl(unsigned long port); - -extern void sh7751systemh_outb(unsigned char value, unsigned long port); -extern void sh7751systemh_outw(unsigned short value, unsigned long port); -extern void sh7751systemh_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7751systemh_inb_p(unsigned long port); -extern void sh7751systemh_outb_p(unsigned char value, unsigned long port); - -extern void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char sh7751systemh_readb(unsigned long addr); -extern unsigned short sh7751systemh_readw(unsigned long addr); -extern unsigned int sh7751systemh_readl(unsigned long addr); -extern void sh7751systemh_writeb(unsigned char b, unsigned long addr); -extern void sh7751systemh_writew(unsigned short b, unsigned long addr); -extern void sh7751systemh_writel(unsigned int b, unsigned long addr); - -extern unsigned long sh7751systemh_isa_port2addr(unsigned long offset); - -#endif /* __ASM_SH_SYSTEMH_IO_H */ - diff --git a/include/asm-sh/systemh7751.h b/include/asm-sh/systemh7751.h new file mode 100644 index 00000000000..b143bb2a2ca --- /dev/null +++ b/include/asm-sh/systemh7751.h @@ -0,0 +1,71 @@ +#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H +#define __ASM_SH_SYSTEMH_7751SYSTEMH_H + +/* + * linux/include/asm-sh/systemh/7751systemh.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SystemH support + + * Modified for 7751 SystemH by + * Jonathan Short, 2002. + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ +#define PA_LED 0xba000000 /* LED */ +#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_MODE (PA_MRSHPC + 4) +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#define IRQ_79C973 13 + +#define __IO_PREFIX sh7751systemh +#include + +#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ -- cgit v1.2.3