From 73505b445dbb8ad12df468404c4dd5cde9c40c65 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Sun, 12 Aug 2007 15:26:12 +0900 Subject: sh: intc - rework core code This patch reworks the intc core, implementing the following features: - Support dual priority registers - one set and one clear register - All 8/16/32 bit register combinations are now supported - Both single mask and single enable bitmap register are supported - Add code to set interrupt priority - Speedup sense and priority configuration code - Allocate data using bootmem, allows intc data structures to be __initdata - Save memory - allocated memory footprint is smaller than intc structures Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/hw_irq.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index 6c759b2b892..0e6a6030497 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h @@ -75,7 +75,7 @@ struct intc_desc { unsigned int nr_prio_regs; struct intc_sense_reg *sense_regs; unsigned int nr_sense_regs; - struct irq_chip chip; + char *name; }; #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) @@ -86,7 +86,7 @@ struct intc_desc symbol = { \ _INTC_ARRAY(priorities), \ _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ _INTC_ARRAY(sense_regs), \ - .chip.name = chipname, \ + chipname, \ } void __init register_intc_controller(struct intc_desc *desc); -- cgit v1.2.3