From 9f8fcf38e8928cccf8c7b32668d146e457f2ccf2 Mon Sep 17 00:00:00 2001 From: Chris Zankel Date: Fri, 18 Jan 2008 16:15:29 -0800 Subject: [XTENSA] Fix cache flush macro for D$/I$ aliasing/non-aliasing For configurations that have aliasing in the data cache but not in the instruction cache, we don't need to flush the instruction cache. Thus, we didn't define the macros to flush the instruction cache. Some cache-flush functions, howerver, were using those macros. Signed-off-by: Chris Zankel --- include/asm-xtensa/cacheflush.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/asm-xtensa') diff --git a/include/asm-xtensa/cacheflush.h b/include/asm-xtensa/cacheflush.h index b773c57e75a..94c4c53a099 100644 --- a/include/asm-xtensa/cacheflush.h +++ b/include/asm-xtensa/cacheflush.h @@ -70,6 +70,8 @@ extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long); #endif #if (ICACHE_WAY_SIZE > PAGE_SIZE) extern void __invalidate_icache_page_alias(unsigned long, unsigned long); +#else +# define __invalidate_icache_page_alias(v,p) do { } while(0) #endif /* -- cgit v1.2.3