From ef300e42234eac066b193c871714203d999b481c Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 6 May 2007 18:31:18 +0100 Subject: [MIPS] Define and use vi_handler_t for vectored interrupt handlers. Signed-off-by: Ralf Baechle --- include/asm-mips/system.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 3713d256d36..bb0b289dbc9 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -464,7 +464,10 @@ static inline unsigned long __cmpxchg_local(volatile void * ptr, extern void set_handler (unsigned long offset, void *addr, unsigned long len); extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len); -extern void *set_vi_handler (int n, void *addr); + +typedef void (*vi_handler_t)(void); +extern void *set_vi_handler (int n, vi_handler_t addr); + extern void *set_except_vector(int n, void *addr); extern unsigned long ebase; extern void per_cpu_trap_init(void); -- cgit v1.2.3 From d725cf3818b12a17d78b87a2de19e8eec17126ae Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Tue, 8 May 2007 14:05:39 +0100 Subject: [MIPS] MT: Reenable EIC support and add support for SOCit SC. Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle --- include/asm-mips/mips-boards/malta.h | 4 ++++ include/asm-mips/msc01_ic.h | 5 +---- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mips-boards/malta.h b/include/asm-mips/mips-boards/malta.h index b0ba3c5a921..eec91001bb6 100644 --- a/include/asm-mips/mips-boards/malta.h +++ b/include/asm-mips/mips-boards/malta.h @@ -25,6 +25,10 @@ #include #include +/* Mips interrupt controller found in SOCit variations */ +#define MIPS_MSC01_IC_REG_BASE 0x1bc40000 +#define MIPS_SOCITSC_IC_REG_BASE 0x1ffa0000 + /* * Malta I/O ports base address for the Galileo GT64120 and Algorithmics * Bonito system controllers. diff --git a/include/asm-mips/msc01_ic.h b/include/asm-mips/msc01_ic.h index aa7ad9a7176..7989b9ffc1d 100644 --- a/include/asm-mips/msc01_ic.h +++ b/include/asm-mips/msc01_ic.h @@ -94,10 +94,7 @@ /* * MIPS System controller interrupt register base. * - * FIXME - are these macros specific to Malta and co or to the MSC? If the - * latter, they should be moved elsewhere. */ -#define MIPS_MSC01_IC_REG_BASE 0x1bc40000 /***************************************************************************** * Absolute register addresses @@ -144,7 +141,7 @@ typedef struct msc_irqmap { #define MSC01_IRQ_LEVEL 0 #define MSC01_IRQ_EDGE 1 -extern void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq); +extern void __init init_msc_irqs(unsigned long icubase, unsigned int base, msc_irqmap_t *imp, int nirq); extern void ll_msc_irq(void); #endif /* __ASM_MIPS_BOARDS_MSC01_IC_H */ -- cgit v1.2.3 From 0b6249567b4ecf6e9d5a8efcf149f3e7cf788cc0 Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Tue, 8 May 2007 16:09:13 +0100 Subject: [MIPS] FPU hazard handling Move FPU hazard handling to hazards.h and provide proper support for MIPSR2 processors Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle --- include/asm-mips/fpu.h | 23 +++-------------------- include/asm-mips/hazards.h | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h index b414a7d9db4..483685b1592 100644 --- a/include/asm-mips/fpu.h +++ b/include/asm-mips/fpu.h @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -38,34 +39,16 @@ extern void _init_fpu(void); extern void _save_fp(struct task_struct *); extern void _restore_fp(struct task_struct *); -#if defined(CONFIG_CPU_SB1) -#define __enable_fpu_hazard() \ -do { \ - asm(".set push \n\t" \ - ".set mips64 \n\t" \ - ".set noreorder \n\t" \ - "ssnop \n\t" \ - "bnezl $0, .+4 \n\t" \ - "ssnop \n\t" \ - ".set pop"); \ -} while (0) -#else -#define __enable_fpu_hazard() \ -do { \ - asm("nop;nop;nop;nop"); /* max. hazard */ \ -} while (0) -#endif - #define __enable_fpu() \ do { \ set_c0_status(ST0_CU1); \ - __enable_fpu_hazard(); \ + enable_fpu_hazard(); \ } while (0) #define __disable_fpu() \ do { \ clear_c0_status(ST0_CU1); \ - /* We don't care about the c0 hazard here */ \ + disable_fpu_hazard(); \ } while (0) #define enable_fpu() \ diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index e50c77e69cb..1542f23ab9d 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -178,4 +178,36 @@ ASMMACRO(back_to_back_c0_hazard, #endif + +/* FPU hazards */ + +#if defined(CONFIG_CPU_SB1) +ASMMACRO(enable_fpu_hazard, + .set push; + .set mips64; + .set noreorder; + _ssnop; + bnezl $0,.+4; + _ssnop + .set pop +) +ASMMACRO(disable_fpu_hazard, +) + +#elif defined(CONFIG_CPU_MIPSR2) +ASMMACRO(enable_fpu_hazard, + _ehb +) +ASMMACRO(disable_fpu_hazard, + _ehb +) +#else +ASMMACRO(enable_fpu_hazard, + nop; nop; nop; nop +) +ASMMACRO(disable_fpu_hazard, + _ehb +) +#endif + #endif /* _ASM_HAZARDS_H */ -- cgit v1.2.3 From 1e54f778af4467b816bf1289e7c4bf7e50067b7b Mon Sep 17 00:00:00 2001 From: Franck Bui-Huu Date: Mon, 7 May 2007 18:01:51 +0200 Subject: [MIPS] Remove Momenco Ocelot G support Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle --- include/asm-mips/bootinfo.h | 2 +- include/asm-mips/serial.h | 22 ---------------------- 2 files changed, 1 insertion(+), 23 deletions(-) (limited to 'include') diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index dbf834f4dac..198ecc08ab4 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -119,7 +119,7 @@ */ #define MACH_GROUP_MOMENCO 12 /* Momentum Boards */ #define MACH_MOMENCO_OCELOT 0 -#define MACH_MOMENCO_OCELOT_G 1 +#define MACH_MOMENCO_OCELOT_G 1 /* no more supported (may 2007) */ #define MACH_MOMENCO_OCELOT_C 2 #define MACH_MOMENCO_JAGUAR_ATX 3 #define MACH_MOMENCO_OCELOT_3 4 diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index d7a65135d83..5e0da6e2d69 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -134,27 +134,6 @@ #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS #endif -#ifdef CONFIG_MOMENCO_OCELOT_G -/* Ordinary NS16552 duart with a 20MHz crystal. */ -#define OCELOT_G_BASE_BAUD ( 20000000 / 16 ) - -#define OCELOT_G_SERIAL1_IRQ 4 -#if 0 -#define OCELOT_G_SERIAL1_BASE 0xe0001020 -#else -#define OCELOT_G_SERIAL1_BASE 0xfd000020 -#endif - -#define _OCELOT_G_SERIAL_INIT(int, base) \ - { .baud_base = OCELOT_G_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,\ - .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM } -#define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ - _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE) -#else -#define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS -#endif - #ifdef CONFIG_MOMENCO_OCELOT_C /* Ordinary NS16552 duart with a 20MHz crystal. */ #define OCELOT_C_BASE_BAUD ( 20000000 / 16 ) @@ -210,7 +189,6 @@ IP32_SERIAL_PORT_DEFNS \ JAZZ_SERIAL_PORT_DEFNS \ STD_SERIAL_PORT_DEFNS \ - MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS -- cgit v1.2.3 From bef964e55ac128b1a6894c68171d0b22263449f8 Mon Sep 17 00:00:00 2001 From: Franck Bui-Huu Date: Mon, 7 May 2007 18:01:52 +0200 Subject: [MIPS] Remove Momenco Jaguar ATX support It has some hackish code and it odd DMA results in the need to support old features in kernel code. Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle --- include/asm-mips/bootinfo.h | 2 +- include/asm-mips/mach-ja/cpu-feature-overrides.h | 45 ------------------------ include/asm-mips/mach-ja/spaces.h | 20 ----------- include/asm-mips/serial.h | 19 ---------- 4 files changed, 1 insertion(+), 85 deletions(-) delete mode 100644 include/asm-mips/mach-ja/cpu-feature-overrides.h delete mode 100644 include/asm-mips/mach-ja/spaces.h (limited to 'include') diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index 198ecc08ab4..b0c329783ac 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -121,7 +121,7 @@ #define MACH_MOMENCO_OCELOT 0 #define MACH_MOMENCO_OCELOT_G 1 /* no more supported (may 2007) */ #define MACH_MOMENCO_OCELOT_C 2 -#define MACH_MOMENCO_JAGUAR_ATX 3 +#define MACH_MOMENCO_JAGUAR_ATX 3 /* no more supported (may 2007) */ #define MACH_MOMENCO_OCELOT_3 4 /* diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h deleted file mode 100644 index 84b6dead0e8..00000000000 --- a/include/asm-mips/mach-ja/cpu-feature-overrides.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2003, 2004 Ralf Baechle - */ -#ifndef __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H -#define __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H - -/* - * Momentum Jaguar ATX always has the RM9000 processor. - */ -#define cpu_has_watch 1 -#define cpu_has_mips16 0 -#define cpu_has_divec 0 -#define cpu_has_vce 0 -#define cpu_has_cache_cdex_p 0 -#define cpu_has_cache_cdex_s 0 -#define cpu_has_prefetch 1 -#define cpu_has_mcheck 0 -#define cpu_has_ejtag 0 - -#define cpu_has_llsc 1 -#define cpu_has_vtag_icache 0 -#define cpu_has_dc_aliases 0 -#define cpu_has_ic_fills_f_dc 0 -#define cpu_has_dsp 0 -#define cpu_icache_snoops_remote_store 0 - -#define cpu_has_nofpuex 0 -#define cpu_has_64bits 1 - -#define cpu_has_inclusive_pcaches 0 - -#define cpu_dcache_line_size() 32 -#define cpu_icache_line_size() 32 -#define cpu_scache_line_size() 32 - -#define cpu_has_mips32r1 0 -#define cpu_has_mips32r2 0 -#define cpu_has_mips64r1 0 -#define cpu_has_mips64r2 0 - -#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ja/spaces.h b/include/asm-mips/mach-ja/spaces.h deleted file mode 100644 index 8466a0e69c7..00000000000 --- a/include/asm-mips/mach-ja/spaces.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle - * Copyright (C) 2000, 2002 Maciej W. Rozycki - * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc. - */ -#ifndef __ASM_MACH_JA_SPACES_H -#define __ASM_MACH_JA_SPACES_H - -/* - * Memory above this physical address will be considered highmem. - */ -#define HIGHMEM_START 0x08000000UL - -#include_next - -#endif /* __ASM_MACH_JA_SPACES_H */ diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index 5e0da6e2d69..ce51213d84f 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -81,25 +81,6 @@ #define STD_SERIAL_PORT_DEFNS #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ -#ifdef CONFIG_MOMENCO_JAGUAR_ATX -/* Ordinary NS16552 duart with a 20MHz crystal. */ -#define JAGUAR_ATX_UART_CLK 20000000 -#define JAGUAR_ATX_BASE_BAUD (JAGUAR_ATX_UART_CLK / 16) - -#define JAGUAR_ATX_SERIAL1_IRQ 6 -#define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L - -#define _JAGUAR_ATX_SERIAL_INIT(int, base) \ - { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \ - .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ - io_type: SERIAL_IO_MEM } -#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \ - _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE) -#else -#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS -#endif - #ifdef CONFIG_MOMENCO_OCELOT_3 #define OCELOT_3_BASE_BAUD ( 20000000 / 16 ) #define OCELOT_3_SERIAL_IRQ 6 -- cgit v1.2.3 From 599ca0fb639ba843da46c3ad1a53590763539750 Mon Sep 17 00:00:00 2001 From: Franck Bui-Huu Date: Mon, 7 May 2007 18:01:53 +0200 Subject: [MIPS] Remove LIMITED_DMA support This code was needed only by Jaguar ATX. Signed-off-by: Franck Bui-Huu Signed-off-by: Ralf Baechle --- include/asm-mips/highmem.h | 42 ------------------------------------------ include/asm-mips/page.h | 4 ---- 2 files changed, 46 deletions(-) (limited to 'include') diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h index f8c8182f7f2..4d6bd5c31c7 100644 --- a/include/asm-mips/highmem.h +++ b/include/asm-mips/highmem.h @@ -48,46 +48,6 @@ extern pte_t *pkmap_page_table; extern void * kmap_high(struct page *page); extern void kunmap_high(struct page *page); -/* - * CONFIG_LIMITED_DMA is for systems with DMA limitations such as Momentum's - * Jaguar ATX. This option exploits the highmem code in the kernel so is - * always enabled together with CONFIG_HIGHMEM but at this time doesn't - * actually add highmem functionality. - */ - -#ifdef CONFIG_LIMITED_DMA - -/* - * These are the default functions for the no-highmem case from - * - */ -static inline void *kmap(struct page *page) -{ - might_sleep(); - return page_address(page); -} - -#define kunmap(page) do { (void) (page); } while (0) - -static inline void *kmap_atomic(struct page *page, enum km_type type) -{ - pagefault_disable(); - return page_address(page); -} - -static inline void kunmap_atomic(void *kvaddr, enum km_type type) -{ - pagefault_enable(); -} - -#define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) - -#define kmap_atomic_to_page(ptr) virt_to_page(ptr) - -#define flush_cache_kmaps() do { } while (0) - -#else /* LIMITED_DMA */ - extern void *__kmap(struct page *page); extern void __kunmap(struct page *page); extern void *__kmap_atomic(struct page *page, enum km_type type); @@ -103,8 +63,6 @@ extern struct page *__kmap_atomic_to_page(void *ptr); #define flush_cache_kmaps() flush_cache_all() -#endif /* LIMITED_DMA */ - #endif /* __KERNEL__ */ #endif /* _ASM_HIGHMEM_H */ diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index d3fbd83ff54..5c3239dad0f 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -190,10 +190,6 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) -#ifdef CONFIG_LIMITED_DMA -#define WANT_PAGE_VIRTUAL -#endif - #include #include -- cgit v1.2.3 From a1b53a7b22934504d8c4e065759e8674e665506d Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 9 May 2007 17:49:53 +0100 Subject: [MIPS] SB1: Build fix. Signed-off-by: Ralf Baechle --- include/asm-mips/hazards.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 1542f23ab9d..d9119f43f9a 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -188,7 +188,7 @@ ASMMACRO(enable_fpu_hazard, .set noreorder; _ssnop; bnezl $0,.+4; - _ssnop + _ssnop; .set pop ) ASMMACRO(disable_fpu_hazard, -- cgit v1.2.3 From 44320f2bcbc05c3f4d62fcdd06fe440d9a803ce0 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 10 May 2007 20:00:55 +0900 Subject: [MIPS] Add extern cobalt_board_id Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- include/asm-mips/mach-cobalt/cobalt.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h index 24a8d51a55a..684a501c04c 100644 --- a/include/asm-mips/mach-cobalt/cobalt.h +++ b/include/asm-mips/mach-cobalt/cobalt.h @@ -69,6 +69,8 @@ #define COBALT_BRD_ID_QUBE2 0x5 #define COBALT_BRD_ID_RAQ2 0x6 +extern int cobalt_board_id; + #define PCI_CFG_SET(devfn,where) \ GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \ (PCI_FUNC (devfn) << 8) | (where))) -- cgit v1.2.3 From 7b239bb1068eda3f7e8befd9b43671093c206f0e Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 10 May 2007 23:47:45 +0900 Subject: [MIPS] Fix build error in atomic64_cmpxchg Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/atomic.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 62daa746a9c..1b60624dab7 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -689,7 +689,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) } #define atomic64_cmpxchg(v, o, n) \ - (((__typeof__((v)->counter)))cmpxchg(&((v)->counter), (o), (n))) + ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) #define atomic64_xchg(v, new) (xchg(&((v)->counter), (new))) /** -- cgit v1.2.3