From 0b35786d77ba4037f181982cc8ca20a7a3bf0fd2 Mon Sep 17 00:00:00 2001 From: Milton Miller Date: Fri, 21 Sep 2007 18:09:02 -0500 Subject: kbuild: call make once for all targets when O=.. is used Change the invocations of make in the output directory Makefile and the main Makefile for separate object trees to pass all goals to one $(MAKE) via a new phony target "sub-make" and the existing target _all. When compiling with separate object directories, a separate make is called in the context of another directory (from the output directory the main Makefile is called, the Makefile is then restarted with current directory set to the object tree). Before this patch, when multiple make command goals are specified, each target results in a separate make invocation. With make -j, these invocations may run in parallel, resulting in multiple commands running in the same directory clobbering each others results. I did not try to address make -j for mixed dot-config and no-dot-config targets. Because the order does matter, a solution was not obvious. Perhaps a simple check for MAKEFLAGS having -j and refusing to run would be appropriate. Signed-off-by: Milton Miller Signed-off-by: Sam Ravnborg --- scripts/mkmakefile | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'scripts/mkmakefile') diff --git a/scripts/mkmakefile b/scripts/mkmakefile index 7f9d544f9b6..ee39facee15 100644 --- a/scripts/mkmakefile +++ b/scripts/mkmakefile @@ -26,11 +26,13 @@ MAKEFLAGS += --no-print-directory .PHONY: all \$(MAKECMDGOALS) +all := \$(filter-out all Makefile,\$(MAKECMDGOALS)) + all: - \$(MAKE) -C \$(KERNELSRC) O=\$(KERNELOUTPUT) + \$(MAKE) -C \$(KERNELSRC) O=\$(KERNELOUTPUT) \$(all) Makefile:; -\$(filter-out all Makefile,\$(MAKECMDGOALS)) %/: - \$(MAKE) -C \$(KERNELSRC) O=\$(KERNELOUTPUT) \$@ +\$(all) %/: all + @: EOF -- cgit v1.2.3