From 82fb159aa3d187aac0fce076739d7d8884e7a0af Mon Sep 17 00:00:00 2001 From: Matt Reimer Date: Thu, 12 Jul 2007 12:27:24 +0200 Subject: [ALSA] Make s3c24xx_i2s_set_clkdiv() change the correct bits Make s3c24xx_i2s_set_clkdiv() change the correct bits. Signed-off-by: Matt Reimer Signed-off-by: Takashi Iwai Signed-off-by: Jaroslav Kysela --- sound/soc/s3c24xx/s3c24xx-i2s.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'sound/soc/s3c24xx') diff --git a/sound/soc/s3c24xx/s3c24xx-i2s.c b/sound/soc/s3c24xx/s3c24xx-i2s.c index 8ca314dc889..39f02462e07 100644 --- a/sound/soc/s3c24xx/s3c24xx-i2s.c +++ b/sound/soc/s3c24xx/s3c24xx-i2s.c @@ -344,11 +344,11 @@ static int s3c24xx_i2s_set_clkdiv(struct snd_soc_cpu_dai *cpu_dai, DBG("Entered %s\n", __FUNCTION__); switch (div_id) { - case S3C24XX_DIV_MCLK: + case S3C24XX_DIV_BCLK: reg = readl(s3c24xx_i2s.regs + S3C2410_IISMOD) & ~S3C2410_IISMOD_FS_MASK; writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD); break; - case S3C24XX_DIV_BCLK: + case S3C24XX_DIV_MCLK: reg = readl(s3c24xx_i2s.regs + S3C2410_IISMOD) & ~(S3C2410_IISMOD_384FS); writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD); break; -- cgit v1.2.3