| Age | Commit message (Collapse) | Author |
|---|
|
|
|
|
|
rudimentary command verifier for dma buffers. Changed the decoder futex
ioctl parameters. Bumped the via major version number.
|
|
|
|
|
|
customization
2) compiles again on 2.4, but doesn't work
|
|
|
|
version number.
|
|
|
|
DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH
The first ioctl sets up an area in AGP memory that will be used as the ring
buffer. The second ioctl copies a command buffer from user space memory
to the ring buffer. The third ioctl waits for engine idle until it
returns.
The motivation for this patch is to avoid the wait for engine idle call
before each buffer flush in the current DRI driver. With this patch,
the DRI driver can continue to flush its buffer as long as there is
free space in the ring buffer.
This patch adds an additional copy operation on the command buffer. This
buffer copying is necessary to support multiple DRI clients rendering
simultaneously. Otherwise, more CPU time will be spent in the busy loop
waiting for engine idle between DRI context switch. Even in the single
client case, the tradeoff is reasonable in comparision to the kernel
call to check for free buffer space for the client to render directly
to the ring buffer.
|
|
|
|
2. Big change to the XvMC part of the SAREA. OpenGL clients will not suffer
from this, and via XvMC is still alpha. Needed to make future additions
to XvMC (More decoders and overlays) possible.
3. Bumped version number to 1.3.0.
|
|
|
