From 46e078280eaa911866e82d8c93b9be79ceca8584 Mon Sep 17 00:00:00 2001 From: Thomas White Date: Wed, 16 Sep 2009 20:30:34 +0100 Subject: Add register header and implement glClear() (sort of) --- src/mesa/drivers/dri/glamo/glamo_regs.h | 134 ++++++++++++++++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 src/mesa/drivers/dri/glamo/glamo_regs.h (limited to 'src/mesa/drivers/dri/glamo/glamo_regs.h') diff --git a/src/mesa/drivers/dri/glamo/glamo_regs.h b/src/mesa/drivers/dri/glamo/glamo_regs.h new file mode 100644 index 0000000000..ff5c754b20 --- /dev/null +++ b/src/mesa/drivers/dri/glamo/glamo_regs.h @@ -0,0 +1,134 @@ +#ifndef _GLAMO_REGS_H +#define _GLAMO_REGS_H + +/* Smedia Glamo 336x/337x driver + * + * (C) 2007 by OpenMoko, Inc. + * Author: Harald Welte + * All rights reserved. + * + * Modified for Glamo Mesa driver by Thomas White + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +enum glamo_regster_offsets { + GLAMO_REGOFS_GENERIC = 0x0000, + GLAMO_REGOFS_HOSTBUS = 0x0200, + GLAMO_REGOFS_MEMORY = 0x0300, + GLAMO_REGOFS_VIDCAP = 0x0400, + GLAMO_REGOFS_ISP = 0x0500, + GLAMO_REGOFS_JPEG = 0x0800, + GLAMO_REGOFS_MPEG = 0x0c00, + GLAMO_REGOFS_LCD = 0x1100, + GLAMO_REGOFS_MMC = 0x1400, + GLAMO_REGOFS_MPROC0 = 0x1500, + GLAMO_REGOFS_MPROC1 = 0x1580, + GLAMO_REGOFS_CMDQUEUE = 0x1600, + GLAMO_REGOFS_RISC = 0x1680, + GLAMO_REGOFS_2D = 0x1700, + GLAMO_REGOFS_3D = 0x1b00, +}; + + +#define REG_MPEG(x) (GLAMO_REGOFS_MPEG+(x)) + +enum glamo_register_mpeg { + // + GLAMO_REG_MPEG_DC_ADDRL = REG_MPEG(0x3c), + GLAMO_REG_MPEG_DC_ADDRH = REG_MPEG(0x3e), + GLAMO_REG_MPEG_AC_ADDRL = REG_MPEG(0x40), + GLAMO_REG_MPEG_AC_ADDRH = REG_MPEG(0x42), + // + GLAMO_REG_MPEG_SAFE_1 = REG_MPEG(0x60), + GLAMO_REG_MPEG_SAFE_2 = REG_MPEG(0x62), + GLAMO_REG_MPEG_SAFE_3 = REG_MPEG(0x64), + // + GLAMO_REG_MPEG_DEC_OUT0_Y_ADDRL = REG_MPEG(0x6e), + GLAMO_REG_MPEG_DEC_OUT0_Y_ADDRH = REG_MPEG(0x70), + GLAMO_REG_MPEG_DEC_OUT0_U_ADDRL = REG_MPEG(0x72), + GLAMO_REG_MPEG_DEC_OUT0_U_ADDRH = REG_MPEG(0x74), + GLAMO_REG_MPEG_DEC_OUT0_V_ADDRL = REG_MPEG(0x76), + GLAMO_REG_MPEG_DEC_OUT0_V_ADDRH = REG_MPEG(0x78), + GLAMO_REG_MPEG_DEC_OUT1_Y_ADDRL = REG_MPEG(0x7a), + GLAMO_REG_MPEG_DEC_OUT1_Y_ADDRH = REG_MPEG(0x7c), + GLAMO_REG_MPEG_DEC_OUT1_U_ADDRL = REG_MPEG(0x7e), + GLAMO_REG_MPEG_DEC_OUT1_U_ADDRH = REG_MPEG(0x80), + GLAMO_REG_MPEG_DEC_OUT1_V_ADDRL = REG_MPEG(0x82), + GLAMO_REG_MPEG_DEC_OUT1_V_ADDRH = REG_MPEG(0x84), + GLAMO_REG_MPEG_DEC_OUT2_Y_ADDRL = REG_MPEG(0x86), + GLAMO_REG_MPEG_DEC_OUT2_Y_ADDRH = REG_MPEG(0x88), + GLAMO_REG_MPEG_DEC_OUT2_U_ADDRL = REG_MPEG(0x8a), + GLAMO_REG_MPEG_DEC_OUT2_U_ADDRH = REG_MPEG(0x8c), + GLAMO_REG_MPEG_DEC_OUT2_V_ADDRL = REG_MPEG(0x8e), + GLAMO_REG_MPEG_DEC_OUT2_V_ADDRH = REG_MPEG(0x90), + GLAMO_REG_MPEG_DEC_WIDTH = REG_MPEG(0x92), + GLAMO_REG_MPEG_DEC_HEIGHT = REG_MPEG(0x94), + GLAMO_REG_MPEG_SPECIAL = REG_MPEG(0x96), + GLAMO_REG_MPEG_DEC_IN_ADDRL = REG_MPEG(0x98), + GLAMO_REG_MPEG_DEC_IN_ADDRH = REG_MPEG(0x9a), + // + GLAMO_REG_MPEG_DEBLK_THRESHOLD = REG_MPEG(0xc0), + // + GLAMO_REG_MPEG_DEC_STATUS = REG_MPEG(0xc8), + GLAMO_REG_MPEG_DEC_RB0 = REG_MPEG(0xca), + GLAMO_REG_MPEG_DEC_RB1 = REG_MPEG(0xcc), +}; + + +#define REG_2D(x) (GLAMO_REGOFS_2D+(x)) + +enum glamo_register_2d { + GLAMO_REG_2D_SRC_ADDRL = REG_2D(0x00), + GLAMO_REG_2D_SRC_ADDRH = REG_2D(0x02), + GLAMO_REG_2D_SRC_PITCH = REG_2D(0x04), + GLAMO_REG_2D_SRC_X = REG_2D(0x06), + GLAMO_REG_2D_SRC_Y = REG_2D(0x08), + GLAMO_REG_2D_DST_X = REG_2D(0x0a), + GLAMO_REG_2D_DST_Y = REG_2D(0x0c), + GLAMO_REG_2D_DST_ADDRL = REG_2D(0x0e), + GLAMO_REG_2D_DST_ADDRH = REG_2D(0x10), + GLAMO_REG_2D_DST_PITCH = REG_2D(0x12), + GLAMO_REG_2D_DST_HEIGHT = REG_2D(0x14), + GLAMO_REG_2D_RECT_WIDTH = REG_2D(0x16), + GLAMO_REG_2D_RECT_HEIGHT = REG_2D(0x18), + GLAMO_REG_2D_PAT_ADDRL = REG_2D(0x1a), + GLAMO_REG_2D_PAT_ADDRH = REG_2D(0x1c), + GLAMO_REG_2D_PAT_FG = REG_2D(0x1e), + GLAMO_REG_2D_PAT_BG = REG_2D(0x20), + GLAMO_REG_2D_SRC_FG = REG_2D(0x22), + GLAMO_REG_2D_SRC_BG = REG_2D(0x24), + GLAMO_REG_2D_MASK1 = REG_2D(0x26), + GLAMO_REG_2D_MASK2 = REG_2D(0x28), + GLAMO_REG_2D_MASK3 = REG_2D(0x2a), + GLAMO_REG_2D_MASK4 = REG_2D(0x2c), + GLAMO_REG_2D_ROT_X = REG_2D(0x2e), + GLAMO_REG_2D_ROT_Y = REG_2D(0x30), + GLAMO_REG_2D_LEFT_CLIP = REG_2D(0x32), + GLAMO_REG_2D_TOP_CLIP = REG_2D(0x34), + GLAMO_REG_2D_RIGHT_CLIP = REG_2D(0x36), + GLAMO_REG_2D_BOTTOM_CLIP = REG_2D(0x38), + GLAMO_REG_2D_COMMAND1 = REG_2D(0x3A), + GLAMO_REG_2D_COMMAND2 = REG_2D(0x3C), + GLAMO_REG_2D_COMMAND3 = REG_2D(0x3E), + GLAMO_REG_2D_SAFE = REG_2D(0x40), + GLAMO_REG_2D_STATUS = REG_2D(0x42), + GLAMO_REG_2D_ID1 = REG_2D(0x44), + GLAMO_REG_2D_ID2 = REG_2D(0x46), + GLAMO_REG_2D_ID3 = REG_2D(0x48), +}; + +#endif /* _GLAMO_REGS_H */ -- cgit v1.2.3